summaryrefslogtreecommitdiffstats
path: root/arch/mips/math-emu/dsemul.c
Commit message (Collapse)AuthorAgeFilesLines
* MIPS: math-emu: Remove unused handle_dsemul function declarationMarkos Chandras2015-09-031-1/+0
| | | | | | | | | | | handle_dsemul does not exist and it's not being used in the code at all so remove its declaration. The deliberate DS emulation exception is handled by the do_dsemulret C code. Signed-off-by: Markos Chandras <markos.chandras@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/10950/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: math-emu: Correct delay-slot exception propagationMaciej W. Rozycki2015-04-081-1/+1
| | | | | | | | | | | | | | | Restore EPC at the branch whose delay slot is emulated if the delay-slot instruction signals. This is so that code in `fpu_emulator_cop1Handler' does not see EPC having advanced and mistakenly successfully resume userland execution from the location at the branch target in that case. Restoring EPC guarantees an immediate exit from the emulation loop and if EPC hasn't advanced at all since entering the loop, also issuing the signal reported by the delay-slot instruction. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/9701/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: math-emu: Fix delay-slot emulation cache incoherencyMaciej W. Rozycki2015-04-081-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Correct a cache coherency regression introduced with be1664c4 [Another round of fixes for the fp emulator.] for the emulation frame used in delay-slot emulation. Two instructions are copied into the frame and as from the commit referred a cache synchronisation call is made for the second instruction aka `badinst' of the two only. The `flush_cache_sigtramp' interface is reused that guarantees that synchronisation will be made for 8 bytes or 2 instructions starting from the address requested, although if cache lines are wider then a larger area may be synchronised. Change the call to point to the first of the two instructions aka `emul' instead, removing unpredictable behaviour resulting from cache incoherency. This bug only ever manifested itself on systems implementing 4-byte cache lines, typically MIPS I systems, causing all kinds of weirdness. This is because the sequence of two instructions starting from `emul' is 8-byte aligned and for 8-byte or wider cache lines the line synchronised will span both, so the vast majority of systems have escaped unharmed. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/9698/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Add FPU emulator counter for emulated delay slots.David Daney2015-04-011-1/+1
| | | | | | | | | | | Delay slot emulation in the FPU emulator is the only kernel user of an executable stack, it is also very slow. Add a counter so we can see how many of these emulations are done. Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/8634/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: math-emu: Convert debug printks to pr_debug getting.Ralf Baechle2014-05-231-6/+3
| | | | | | And another bunch of #ifdefs bite the dust. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: math-emu: Remove fine example of cargo cult programming.Ralf Baechle2014-05-211-7/+0
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: math-emu: Header file weeding.Ralf Baechle2014-05-211-14/+3
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: math-emu: Use helpers to manipulate CAUSEF_BD flag.Ralf Baechle2014-05-211-1/+1
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: microMIPS: Floating point support.Leonid Yegoshin2013-05-091-6/+24
| | | | | | | Add logic needed to do floating point emulation in microMIPS mode. Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> Signed-off-by: Steven J. Hill <Steven. Hill@imgtec.com>
* Disintegrate asm/system.h for MIPSDavid Howells2012-03-281-1/+0
| | | | | | | | Disintegrate asm/system.h for MIPS. Signed-off-by: David Howells <dhowells@redhat.com> Acked-by: Ralf Baechle <ralf@linux-mips.org> cc: linux-mips@linux-mips.org
* Fix common misspellingsLucas De Marchi2011-03-311-1/+1
| | | | | | Fixes generated by 'codespell' and manually reviewed. Signed-off-by: Lucas De Marchi <lucas.demarchi@profusion.mobi>
* MIPS: Collect FPU emulator statistics per-CPU.David Daney2009-12-171-2/+2
| | | | | | | | | | | | | | | | | | | On SMP systems, the collection of statistics can cause cache line bouncing in the lines associated with the counters. Also there are races incrementing the counters on multiple CPUs. To fix both problems, we collect the statistics in per-CPU variables, and add them up in the debugfs read operation. As a test I ran the LTP float_bessel test on a 12 CPU Octeon system. Without CONFIG_DEBUG_FS : 2602 seconds. With CONFIG_DEBUG_FS: 2640 seconds. With non-cpu-local atomic statistics: 14569 seconds. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Switch FPU emulator trap to BREAK instruction.Ralf Baechle2008-10-301-4/+3
| | | | | | | | | | | | Arguably using the address error handler has always been ugly. But with processors that handle unaligned loads and stores in hardware the current mechanism ceases to work so switch it to a BREAK instruction and allocate break code 514 to the FPU emulator. Yoichi Yuasa provided a build fix for CONFIG_BUG=n. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
* [MIPS] Add some __user tagsAtsushi Nemoto2007-07-131-6/+6
| | | | | Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* header cleaning: don't include smp_lock.h when not usedRandy Dunlap2007-05-081-1/+0
| | | | | | | | | | | | Remove includes of <linux/smp_lock.h> where it is not used/needed. Suggested by Al Viro. Builds cleanly on x86_64, i386, alpha, ia64, powerpc, sparc, sparc64, and arm (all 59 defconfigs). Signed-off-by: Randy Dunlap <randy.dunlap@oracle.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* Now that a struct is the only member left in structRalf Baechle2005-10-291-2/+2
| | | | | | mips_fpu_emulator_stats cleanup that unnecessary nesting of structs. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Gross macro abuse. Get rid of gpreg_t, vaddr_t, REG_TO_VA andRalf Baechle2005-10-291-5/+5
| | | | | | | | VA_TO_REG. Who ever wrote this apparently did enjoy the C Puzzle Book. ISBN 0201604612, a little old but still fun reading for the next blackout ;) Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Cleanup fpuemuprivate declarations.Ralf Baechle2005-10-291-3/+0
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Linux-2.6.12-rc2v2.6.12-rc2Linus Torvalds2005-04-161-0/+172
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
OpenPOWER on IntegriCloud