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* Merge branch 'exec_domain_rip_v2' of git://git.kernel.org/pub/scm/linux/kerne...Linus Torvalds2015-04-151-1/+0
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| * arch: Remove exec_domain from remaining archsRichard Weinberger2015-04-121-1/+0
* | MIPS: KVM: Add base guest MSA supportJames Hogan2015-03-271-0/+1
* | MIPS: KVM: Add base guest FPU supportJames Hogan2015-03-271-0/+38
* | MIPS: Clear [MSA]FPE CSR.Cause after notify_die()James Hogan2015-03-272-11/+19
* | Revert "MIPS: Don't assume 64-bit FP registers for context switch"James Hogan2015-03-271-66/+0
* | MIPS: prevent FP context set via ptrace being discardedPaul Burton2015-03-271-6/+24
* | MIPS: Ensure FCSR cause bits are clear after invoking FPU emulatorPaul Burton2015-03-271-8/+9
* | MIPS: clear MSACSR cause bits when handling MSA FP exceptionPaul Burton2015-03-271-1/+10
* | MIPS: Push .set mips64r* into the functions needing itPaul Burton2015-03-271-1/+1
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* Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds2015-02-2122-281/+3598
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| * MIPS: OCTEON: Delete unused COP2 saving codeAleksey Makarov2015-02-201-26/+0
| * MIPS: OCTEON: Use correct instruction to read 64-bit COP0 registerChandrakala Chavva2015-02-201-3/+3
| * MIPS: OCTEON: Save and restore CP2 SHA3 stateDavid Daney2015-02-202-11/+33
| * MIPS: OCTEON: Fix FP context save.David Daney2015-02-201-12/+7
| * MIPS: OCTEON: Save/Restore wider multiply registers in OCTEON III CPUsDavid Daney2015-02-201-30/+98
| * MIPS: Add set/clear CP0 macros for PageGrain registerSteven J. Hill2015-02-201-1/+1
| * Merge branch 'mipsr6-for-3.20' of git://git.linux-mips.org/pub/scm/mchandras/...Ralf Baechle2015-02-1921-195/+3334
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| | * MIPS: kernel: elf: Improve the overall ABI and FPU mode checksMarkos Chandras2015-02-171-115/+188
| | * MIPS: kernel: process: Do not allow FR=0 on MIPS R6Markos Chandras2015-02-171-0/+4
| | * MIPS: Make use of the ERETNC instruction on MIPS R6Markos Chandras2015-02-173-0/+21
| | * MIPS: kernel: mips-r2-to-r6-emul: Add R2 emulator for MIPS R6Leonid Yegoshin2015-02-174-1/+2407
| | * MIPS: Add LLB bit and related feature for the Config 5 CP0 registerMarkos Chandras2015-02-171-0/+2
| | * MIPS: Emulate the new MIPS R6 BNEZC and JIALC instructionsMarkos Chandras2015-02-171-0/+10
| | * MIPS: Emulate the new MIPS R6 BEQZC and JIC instructionsMarkos Chandras2015-02-171-0/+8
| | * MIPS: Emulate the new MIPS R6 BALC instructionMarkos Chandras2015-02-171-0/+10
| | * MIPS: Emulate the new MIPS R6 BNVC, BNEC and BNEZLAC instructionsMarkos Chandras2015-02-171-1/+5
| | * MIPS: Emulate the new MIPS R6 BOVC, BEQC and BEQZALC instructionsMarkos Chandras2015-02-171-0/+11
| | * MIPS: Emulate the new MIPS R6 branch compact (BC) instructionMarkos Chandras2015-02-171-0/+9
| | * MIPS: Emulate the new MIPS R6 B{L,G}T{Z,}{AL,}C instructionsMarkos Chandras2015-02-171-0/+22
| | * MIPS: Emulate the new MIPS R6 B{L,G}Ε{Z,}{AL,}C instructionsMarkos Chandras2015-02-171-0/+31
| | * MIPS: Emulate the BC1{EQ,NE}Z FPU instructionsMarkos Chandras2015-02-171-29/+72
| | * MIPS: kernel: branch: Do not emulate the branch likelies on MIPS R6Markos Chandras2015-02-171-7/+63
| | * MIPS: kernel: Prepare the JR instruction for emulation on MIPS R6Markos Chandras2015-02-171-2/+9
| | * MIPS: kernel: syscall: Set the appropriate ISA level for MIPS R6Markos Chandras2015-02-171-1/+1
| | * MIPS: kernel: unaligned: Add support for the MIPS R6Leonid Yegoshin2015-02-171-4/+386
| | * MIPS: kernel: cps-vec: Replace "addi" with "addiu"Markos Chandras2015-02-171-8/+8
| | * MIPS: kernel: genex: Set correct ISA levelMarkos Chandras2015-02-171-1/+1
| | * MIPS: kernel: r4k_fpu: Add support for MIPS R6Leonid Yegoshin2015-02-171-3/+9
| | * MIPS: kernel: r4k_switch: Add support for MIPS R6Leonid Yegoshin2015-02-171-6/+8
| | * MIPS: kernel: traps: Add MIPS R6 related definitionsLeonid Yegoshin2015-02-171-5/+5
| | * MIPS: kernel: proc: Add MIPS R6 support to /proc/cpuinfoMarkos Chandras2015-02-171-1/+7
| | * MIPS: kernel: entry.S: Add MIPS R6 related definitionsMarkos Chandras2015-02-171-2/+3
| | * MIPS: kernel: cpu-probe.c: Add support for MIPS R6Leonid Yegoshin2015-02-171-4/+16
| | * MIPS: kernel: cevt-r4k: Add MIPS R6 to the c0_compare_interrupt handlerLeonid Yegoshin2015-02-171-1/+1
| | * MIPS: kernel: cpu-bugs64: Do not check R6 cores for existing 64-bit bugsLeonid Yegoshin2015-02-171-4/+7
| | * MIPS: asm: spram: Add new symbol for MIPS scratch pad storageMarkos Chandras2015-02-171-1/+1
| | * MIPS: Use generic checksum functions for MIPS R6Markos Chandras2015-02-171-0/+2
| | * MIPS: Add MIPS generic QEMU probe supportLeonid Yegoshin2015-02-161-0/+5
| | * MIPS: Add cases for CPU_QEMU_GENERICLeonid Yegoshin2015-02-163-0/+3
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