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* MIPS: Clarify the comment for `__cpu_has_fpu'Maciej W. Rozycki2015-04-081-1/+1
* MIPS: Correct the comment for FPU emulator trapsMaciej W. Rozycki2015-04-081-3/+3
* MIPS: perf: Add hardware perf events support for Loongson-3Huacai Chen2015-04-011-0/+71
* MIPS: Add R16000 detectionJoshua Kinard2015-04-012-2/+8
* MIPS: Provide fallback reboot/poweroff/halt implementationsAndrew Bresticker2015-04-011-0/+25
* MIPS: smp: Make stop_this_cpu() actually stop the CPUAndrew Bresticker2015-04-011-4/+2
* MIPS: LLVMLinux: Fix a 'cast to type not present in union' error.Toma Tabacu2015-04-011-2/+4
* MIPS: Let __dt_register_buses accept a single bus typeKevin Cernekee2015-04-011-1/+4
* MIPS: csrc-sb1250: Implement read_sched_clockDeng-Cheng Zhu2015-04-011-0/+8
* MIPS: csrc-sb1250: Remove FSF mail address from GPL noticeDeng-Cheng Zhu2015-04-011-4/+0
* MIPS: csrc-sb1250: Extract hpt cycle acquisition from sb1250_hpt_readDeng-Cheng Zhu2015-04-011-2/+9
* MIPS: cevt-txx9: Implement read_sched_clockDeng-Cheng Zhu2015-04-011-0/+9
* MIPS: csrc-ioasic: Implement read_sched_clockDeng-Cheng Zhu2015-04-011-0/+9
* MIPS: csrc-ioasic: Remove FSF mail address from GPL noticeDeng-Cheng Zhu2015-04-011-4/+0
* MIPS: csrc-bcm1480: Implement read_sched_clockDeng-Cheng Zhu2015-04-011-0/+8
* MIPS: csrc-bcm1480: Remove FSF mail address from GPL noticeDeng-Cheng Zhu2015-04-011-4/+0
* MIPS: csrc-r4k: Implement read_sched_clockDeng-Cheng Zhu2015-04-011-0/+8
* MIPS, ttyFDC: Add early FDC console supportJames Hogan2015-03-311-0/+2
* MIPS: idle: Workaround wait + FDC problemsJames Hogan2015-03-311-2/+11
* MIPS: Read CPU IRQ line that FDC to routed toJames Hogan2015-03-311-0/+12
* MIPS: Add arch CDMM definitions and probingJames Hogan2015-03-311-0/+2
* MIPS: Allow shared IRQ for timer & perf counterJames Hogan2015-03-311-2/+0
* MIPS: perf: Allow sharing IRQ with timerJames Hogan2015-03-311-3/+5
* MIPS: cevt-r4k: Cleanup c0_compare_interrupt.Ralf Baechle2015-03-311-5/+4
* MIPS: cevt-r4k: Make interrupt handler sharedJames Hogan2015-03-311-1/+7
* MIPS: Remove redundant IPTI==IPPCI logicJames Hogan2015-03-311-2/+1
* MIPS: cevt-r4k: Use CAUSEF_TI, CAUSEF_PCI constantsJames Hogan2015-03-311-1/+1
* MIPS: cevt-r4k: Move handle_perf_irq() out of headerJames Hogan2015-03-311-0/+18
* mips: copy_thread(): rename 'arg' argument to 'kthread_arg'Alex Dowad2015-03-241-2/+8
* Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds2015-02-2122-281/+3598
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| * MIPS: OCTEON: Delete unused COP2 saving codeAleksey Makarov2015-02-201-26/+0
| * MIPS: OCTEON: Use correct instruction to read 64-bit COP0 registerChandrakala Chavva2015-02-201-3/+3
| * MIPS: OCTEON: Save and restore CP2 SHA3 stateDavid Daney2015-02-202-11/+33
| * MIPS: OCTEON: Fix FP context save.David Daney2015-02-201-12/+7
| * MIPS: OCTEON: Save/Restore wider multiply registers in OCTEON III CPUsDavid Daney2015-02-201-30/+98
| * MIPS: Add set/clear CP0 macros for PageGrain registerSteven J. Hill2015-02-201-1/+1
| * Merge branch 'mipsr6-for-3.20' of git://git.linux-mips.org/pub/scm/mchandras/...Ralf Baechle2015-02-1921-195/+3334
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| | * MIPS: kernel: elf: Improve the overall ABI and FPU mode checksMarkos Chandras2015-02-171-115/+188
| | * MIPS: kernel: process: Do not allow FR=0 on MIPS R6Markos Chandras2015-02-171-0/+4
| | * MIPS: Make use of the ERETNC instruction on MIPS R6Markos Chandras2015-02-173-0/+21
| | * MIPS: kernel: mips-r2-to-r6-emul: Add R2 emulator for MIPS R6Leonid Yegoshin2015-02-174-1/+2407
| | * MIPS: Add LLB bit and related feature for the Config 5 CP0 registerMarkos Chandras2015-02-171-0/+2
| | * MIPS: Emulate the new MIPS R6 BNEZC and JIALC instructionsMarkos Chandras2015-02-171-0/+10
| | * MIPS: Emulate the new MIPS R6 BEQZC and JIC instructionsMarkos Chandras2015-02-171-0/+8
| | * MIPS: Emulate the new MIPS R6 BALC instructionMarkos Chandras2015-02-171-0/+10
| | * MIPS: Emulate the new MIPS R6 BNVC, BNEC and BNEZLAC instructionsMarkos Chandras2015-02-171-1/+5
| | * MIPS: Emulate the new MIPS R6 BOVC, BEQC and BEQZALC instructionsMarkos Chandras2015-02-171-0/+11
| | * MIPS: Emulate the new MIPS R6 branch compact (BC) instructionMarkos Chandras2015-02-171-0/+9
| | * MIPS: Emulate the new MIPS R6 B{L,G}T{Z,}{AL,}C instructionsMarkos Chandras2015-02-171-0/+22
| | * MIPS: Emulate the new MIPS R6 B{L,G}Ε{Z,}{AL,}C instructionsMarkos Chandras2015-02-171-0/+31
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