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* Make sure that the processor is actually online or die spectacularly.Ralf Baechle2005-10-291-0/+5
* Avoid SMP cacheflushes. This is a minor optimization of startup butRalf Baechle2005-10-291-0/+2
* Philips PNX8550 support: MIPS32-like core with 2 Trimedias on it.Pete Popov2005-10-293-1/+24
* More AP / SP bits for the 34K, the Malta bits and things. Still wantsRalf Baechle2005-10-296-17/+1890
* Move Origin crapola into a machine-specific header file.Ralf Baechle2005-10-291-37/+6
* Prevent gcc from optimizing a few functions away completly.Ralf Baechle2005-10-291-2/+2
* Detect the MIPS R2 vectored interrupt, external interrupt controllerRalf Baechle2005-10-291-0/+6
* New kernel option nowait allows disabling the use of the wait instruction.Ralf Baechle2005-10-291-0/+16
* Use an irq_enable_hazard hazard barrier in unmask_mips_irq. ThisRalf Baechle2005-10-291-0/+2
* Add inotify syscalls for MIPS.Ralf Baechle2005-10-294-1/+12
* Mark a few variables __read_mostly.Ralf Baechle2005-10-292-7/+11
* Detect the 34K.Ralf Baechle2005-10-292-0/+6
* Setup_frame is now returning a success value.Ralf Baechle2005-10-294-25/+32
* Temporary hack for Qemu and MIPSsim until they get a proper ELF loader.Ralf Baechle2005-10-291-0/+12
* Rename CONFIG_CPU_MIPS{32,64} to CONFIG_CPU_MIPS{32|64}_R1.Ralf Baechle2005-10-293-4/+4
* Avoid defining variables in the middle of a block which breaks olderRalf Baechle2005-10-291-4/+10
* Always use ".set mips3" rather than select between "mips2" or "mips3"Maciej W. Rozycki2005-10-291-2/+2
* Use correct names for bits in the R3k cp0.status register.Maciej W. Rozycki2005-10-291-26/+41
* Mark __die() "noreturn" for real.Maciej W. Rozycki2005-10-291-2/+3
* Redo RM9000 workaround which along with other DSP ASE changes wasRalf Baechle2005-10-294-57/+84
* Enable a suitable ISA for the assembler around ll/sc so that codeMaciej W. Rozycki2005-10-291-4/+8
* For MIPS32/MIPS64 cp0.config.mt == 1 implies a standard (R4k-style)Maciej W. Rozycki2005-10-291-5/+1
* Support the MIPS32 / MIPS64 DSP ASE.Ralf Baechle2005-10-2914-82/+308
* 64-bit fixes for Alchemy code ;)Ralf Baechle2005-10-291-6/+5
* Fix tasteless #ifdef mess in audit_arch(), minor cleanups.Ralf Baechle2005-10-291-17/+12
* __compute_return_epc() uses CFC1 instruction which might result in aRalf Baechle2005-10-291-3/+7
* sys_nfsservctl() needs translation.Maciej W. Rozycki2005-10-291-1/+1
* No point in checking cpu_has_tlb before we've computed the CPU options.Ralf Baechle2005-10-291-4/+4
* Cleanup decoding of MIPSxx config registers.Ralf Baechle2005-10-292-44/+105
* Fix preemption and SMP problems in the FP emulator code.Ralf Baechle2005-10-291-2/+17
* Ustat needs a wrapper on n32.Thiemo Seufer2005-10-291-1/+1
* We pass a kernel pointer to do_sigaltstack in sys32_sigaltstack, soRalf Baechle2005-10-291-0/+4
* NPTL, round one.Ralf Baechle2005-10-2911-7/+118
* Fix BogoMIPS display on UP and some minor cosmetical things.Ralf Baechle2005-10-292-2/+0
* fcntl64 needs to be wrapped for n32.Thiemo Seufer2005-10-291-1/+1
* Fix one more case of computing the return EPC after the registers haveRalf Baechle2005-10-291-1/+1
* When simulating ll/sc compute the return EPC before modifying theRalf Baechle2005-10-291-2/+3
* Detect the 4KEcR2 and for now detect handle it like the 4KEc.Ralf Baechle2005-10-291-0/+4
* Fixed buglet with previous patch that broke non au1x builds.Pete Popov2005-10-291-9/+7
* Remove CONFIG_PM dependency from au1x wait in cpu_probe.Pete Popov2005-10-291-24/+19
* Fix 64bit SMP TLB handler and stack frame handling, optimize 32bit SMPThiemo Seufer2005-10-291-0/+1
* Use compat_sigval_t in struct compat_siginfo.Ralf Baechle2005-10-291-1/+1
* Reformatting, remove debugging code.Ralf Baechle2005-10-291-37/+26
* Get rid of the the remains of 2.4-style ramdisk support.Ralf Baechle2005-10-291-7/+0
* Multithreaded core dumps.Ralf Baechle2005-10-291-0/+8
* sys_futex has 6 arguments.Thiemo Seufer2005-10-291-1/+1
* Export shm_align_mask and flush_data_cache_page.Ralf Baechle2005-10-291-0/+3
* Gcc 4.0 fixes.Ralf Baechle2005-10-291-4/+6
* Fix preemption bug.Ralf Baechle2005-10-291-2/+1
* Sparseify MIPS.Ralf Baechle2005-10-2910-478/+489
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