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* Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds2013-05-1052-663/+2850
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull MIPS updates from Ralf Baechle: - More work on DT support for various platforms - Various fixes that were to late to make it straight into 3.9 - Improved platform support, in particular the Netlogic XLR and BCM63xx, and the SEAD3 and Malta eval boards. - Support for several Ralink SOC families. - Complete support for the microMIPS ASE which basically reencodes the existing MIPS32/MIPS64 ISA to use non-constant size instructions. - Some fallout from LTO work which remove old cruft and will generally make the MIPS kernel easier to maintain and resistant to compiler optimization, even in absence of LTO. - KVM support. While MIPS has announced hardware virtualization extensions this KVM extension uses trap and emulate mode for virtualization of MIPS32. More KVM work to add support for VZ hardware virtualizaiton extensions and MIPS64 will probably already be merged for 3.11. Most of this has been sitting in -next for a long time. All defconfigs have been build or run time tested except three for which fixes are being sent by other maintainers. Semantic conflict with kvm updates done as per Ralf * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (118 commits) MIPS: Add new GIC clockevent driver. MIPS: Formatting clean-ups for clocksources. MIPS: Refactor GIC clocksource code. MIPS: Move 'gic_frequency' to common location. MIPS: Move 'gic_present' to common location. MIPS: MIPS16e: Add unaligned access support. MIPS: MIPS16e: Support handling of delay slots. MIPS: MIPS16e: Add instruction formats. MIPS: microMIPS: Optimise 'strnlen' core library function. MIPS: microMIPS: Optimise 'strlen' core library function. MIPS: microMIPS: Optimise 'strncpy' core library function. MIPS: microMIPS: Optimise 'memset' core library function. MIPS: microMIPS: Add configuration option for microMIPS kernel. MIPS: microMIPS: Disable LL/SC and fix linker bug. MIPS: microMIPS: Add vdso support. MIPS: microMIPS: Add unaligned access support. MIPS: microMIPS: Support handling of delay slots. MIPS: microMIPS: Add support for exception handling. MIPS: microMIPS: Floating point support. MIPS: microMIPS: Fix macro naming in micro-assembler. ...
| * Merge branch 'mti-next' of ↵Ralf Baechle2013-05-0920-135/+861
| |\ | | | | | | | | | git://git.linux-mips.org/pub/scm/sjhill/linux-sjhill into mips-for-linux-next
| | * MIPS: Add new GIC clockevent driver.Raghu Gandham2013-05-092-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | Add new clockevent driver that uses the counter present on the MIPS Global Interrupt Controller. Signed-off-by: Raghu Gandham <Raghu.Gandham@imgtec.com> Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
| | * MIPS: Formatting clean-ups for clocksources.Steven J. Hill2013-05-092-7/+2
| | | | | | | | | | | | | | | | | | Various whitespace and #ifdef removals for GIC and R4K clocksources. Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
| | * MIPS: Refactor GIC clocksource code.Steven J. Hill2013-05-091-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Reorganize some of the GIC clocksource driver code. Below is a list of the various changes. * No longer select CSRC_GIC by default for Malta platform. * Limit choice for either the GIC or R4K clocksource, not both. * Change location in Makefile. * Created new 'gic_read_count' function in common 'irq-gic.c' file. * Change 'git_hpt_read' function in 'csrc-gic.c' to use new function. * Surround GIC specific code in Malta platform code with #ifdef's. * Only initialize the GIC clocksource if it was selected. Original code called it unconditionally if a GIC was found. Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
| | * MIPS: Move 'gic_frequency' to common location.Steven J. Hill2013-05-091-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Move the global variable 'gic_frequency' to be defined in the file 'arch/mips/kernel/irq-gic.c' instead of defining it individually for each platform making use of the GIC. Also change the type to be an unsigned integer instead of signed. Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
| | * MIPS: Move 'gic_present' to common location.Steven J. Hill2013-05-091-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Move the global variable 'gic_present' to be defined in the file 'arch/mips/kernel/irq-gic.c' instead of defining it individually for each platform making use of the GIC. Also change the type to be an unsigned integer instead of signed. Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
| | * MIPS: MIPS16e: Support handling of delay slots.Steven J. Hill2013-05-092-0/+21
| | | | | | | | | | | | | | | | | | | | | Add logic needed to properly calculate exceptions for delay slots when in MIPS16e mode. Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
| | * MIPS: MIPS16e: Add instruction formats.Steven J. Hill2013-05-091-0/+110
| | | | | | | | | | | | | | | | | | | | | Add structures for all the MIPS16e instructions. Also add the enumerations for all the bit fields for opcodes, functions, etc. Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
| | * MIPS: microMIPS: Optimise 'memset' core library function.Steven J. Hill2013-05-091-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | Optimise 'memset' to use microMIPS instructions and/or optimisations for binary size reduction. When the microMIPS ISA is not being used, the library function compiles to the original binary code. Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
| | * MIPS: microMIPS: Disable LL/SC and fix linker bug.Steven J. Hill2013-05-092-2/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Partially revert commit e0c14a260d66ba35935600d6435940a566fe806b and turn off LL/SC when building a pure microMIPS kernel. This is a temporary fix until the cmpxchg assembly macro functions are re-written to not use the HI/LO registers in address calculations. Also add .insn in selected user access functions which would otherwise produce ISA mode jump incompatibilities. This is also a temporary fix. Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
| | * MIPS: microMIPS: Support handling of delay slots.Leonid Yegoshin2013-05-091-5/+17
| | | | | | | | | | | | | | | | | | | | | | | | Add logic needed to properly calculate exceptions for delay slots when in microMIPS mode. Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
| | * MIPS: microMIPS: Add support for exception handling.Steven J. Hill2013-05-092-6/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | All exceptions must be taken in microMIPS mode, never in classic MIPS mode or the kernel falls apart. A few NOP instructions are used to maintain the correct alignment of microMIPS versions of the exception vectors. Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
| | * MIPS: microMIPS: Floating point support.Leonid Yegoshin2013-05-093-0/+20
| | | | | | | | | | | | | | | | | | | | | Add logic needed to do floating point emulation in microMIPS mode. Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> Signed-off-by: Steven J. Hill <Steven. Hill@imgtec.com>
| | * MIPS: microMIPS: Fix macro naming in micro-assembler.Steven J. Hill2013-05-091-2/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The macros did not properly take into account the ISA that the kernel was being compiled with. A classic MIPS kernel will have the standard 'uasm_i_##op' macro functions with 'MM_uasm_i_##op' macro functions for the microMIPS version. A pure microMIPS kernel will have the standard macros with 'CL_uasm_i_##op' macro functions for the classic version. Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
| | * MIPS: Allow ASID size to be determined at boot time.Steven J. Hill2013-05-081-36/+59
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Original patch by Ralf Baechle and removed by Harold Koerfgen with commit f67e4ffc79905482c3b9b8c8dd65197bac7eb508. This allows for more generic kernels since the size of the ASID and corresponding masks can be determined at run-time. This patch is also required for the new Aptiv cores and has been tested on Malta and Malta Aptiv platforms. [ralf@linux-mips.org: Added relevant part of fix https://patchwork.linux-mips.org/patch/5213/] Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | * MIPS: FW: Remove obsolete header file for MTI platforms.Steven J. Hill2013-05-081-47/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove 'arch/mips/include/asm/mips-boards/prom.h' and get rid of all inclusions of it by Malta and SEAD-3 platforms. [ralf@linux-mips.org: Fold in John Crispin <blogic@openwrt.org>'s "MIPS: ar7 powertv build"]. [ralf@linux-mips.org: Fold in John Crispin <blogic@openwrt.org>'s "MIPS: unbreak powertv build"]. [ralf@linux-mips.org: Test. Build. Your. Fscking. Code. Or...] Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
| | * MIPS: FW: Add environment variable processing.Steven J. Hill2013-05-081-0/+47
| | | | | | | | | | | | | | | | | | | | | Add parsing of the environment and command line variables passed to the kernel to the firmware library. Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
| | * MIPS: Add declarations to MIPS Technologies Inc. generic header.Steven J. Hill2013-05-081-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | Add declaration of 'mips_scroll_message' and 'mips_display_message' to the common generic header file for the MIPS Technologies Inc. development boards. Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
| | * MIPS: Add option to disable software I/O coherency.Steven J. Hill2013-05-013-3/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | Some MIPS controllers have hardware I/O coherency. This patch detects those and turns off software coherency. A new kernel command line option also allows the user to manually turn software coherency on or off. Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
| | * MIPS: microMIPS: Add instruction utility macros.Steven J. Hill2013-05-011-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add two new macros for microMIPS. One checks if an exception was taken in either microMIPS or classic MIPS mode. The other checks if a microMIPS instruction is 16-bit or 32-bit in length. [ralf@linux-mips.org: Removed unnecessary parenthesis as noted by Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>] Signed-off-by: Steven J. Hill <sjhill@mips.com> Cc: linux-mips@linux-mips.org Cc: cernekee@gmail.com Cc: kevink@paralogos.com Cc: ddaney.cavm@gmail.com Cc: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Patchwork: https://patchwork.linux-mips.org/patch/4924/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org> (cherry picked from commit 49df26472338b935fd5781bf94a77a88b148a716)
| | * MIPS: microMIPS: uasm: Add microMIPS micro assembler support.Steven J. Hill2013-05-011-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add new file 'uasm-micromips.c' that allows the micro assembler to generate microMIPS ISA code. It can be included in the kernel alongside the classic ISA as long as the platform supports the microMIPS ISA. Signed-off-by: Steven J. Hill <sjhill@mips.com> Cc: linux-mips@linux-mips.org Cc: cernekee@gmail.com Cc: kevink@paralogos.com Cc: ddaney.cavm@gmail.com Patchwork: https://patchwork.linux-mips.org/patch/4923/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org> (cherry picked from commit 5f011a866afbd03a5379f67f4e70e5efbdfc16e9)
| | * MIPS: microMIPS: uasm: Split 'uasm.c' into two files.Steven J. Hill2013-05-011-24/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Split 'uasm.c' into two files. The new file 'uasm-mips.c' has the functions specific to the classic MIPS ISA. The 'uasm.c' file contains common code that can be used by classic or other ISAs that could be supported by the kernel. Signed-off-by: Steven J. Hill <sjhill@mips.com> Cc: linux-mips@linux-mips.org Cc: cernekee@gmail.com Cc: kevink@paralogos.com Cc: ddaney.cavm@gmail.com Patchwork: https://patchwork.linux-mips.org/patch/4922/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org> (cherry picked from commit 0961103562ab958fa74f35043bf4f72e51ed6155)
| | * MIPS: microMIPS: Add instruction formats.Steven J. Hill2013-05-011-0/+449
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add structures for all the microMIPS instructions. Also add the enumerations for all the bit fields for opcodes, functions, etc. Signed-off-by: Steven J. Hill <sjhill@mips.com> Cc: linux-mips@linux-mips.org Cc: cernekee@gmail.com Cc: kevink@paralogos.com Cc: ddaney.cavm@gmail.com Patchwork: https://patchwork.linux-mips.org/patch/4921/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org> (cherry picked from commit d7f19e43a4337d4d40ff5e241172912130d06a4c)
| * | Merge branch 'next/kvm' into mips-for-linux-nextRalf Baechle2013-05-098-4/+752
| |\ \
| | * | MIPS: If KVM is enabled then use the KVM specific routine to flush the TLBs ↵Sanjay Lal2013-05-081-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | on a ASID wrap. Signed-off-by: Sanjay Lal <sanjayl@kymasys.com> Cc: kvm@vger.kernel.org Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | * | KVM/MIPS32: KVM Guest kernel support.Sanjay Lal2013-05-083-2/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Both Guest kernel and Guest Userspace execute in UM. The memory map is as follows: Guest User address space: 0x00000000 -> 0x40000000 Guest Kernel Unmapped: 0x40000000 -> 0x60000000 Guest Kernel Mapped: 0x60000000 -> 0x80000000 - Guest Usermode virtual memory is limited to 1GB. Signed-off-by: Sanjay Lal <sanjayl@kymasys.com> Cc: kvm@vger.kernel.org Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | * | KVM/MIPS32: Arch specific KVM data structures.Sanjay Lal2013-05-082-0/+722
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Sanjay Lal <sanjayl@kymasys.com> Cc: kvm@vger.kernel.org Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | * | MIPS: IP27: Remove pfn_t.Ralf Baechle2013-05-082-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the Linux kernel traditionally pfns are represented by an unsigned long. However a few bits of the SGI IP27 platform code that were ported from IRIX are using pfn_t for historic reasons. This is conflicting with KVM's use of pfn_t. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | Merge branch 'mips-next-3.10' of ↵Ralf Baechle2013-05-0827-263/+1057
| |\ \ \ | | | | | | | | | | | | | | | git://git.linux-mips.org/pub/scm/john/linux-john into mips-for-linux-next
| | * | | MIPS: ralink: add memory definition for MT7620John Crispin2013-05-081-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Populate struct soc_info with the data that describes our RAM window. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5183/
| | * | | MIPS: ralink: add memory definition for RT3883John Crispin2013-05-081-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Populate struct soc_info with the data that describes our RAM window. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5182/
| | * | | MIPS: ralink: add memory definition for RT2880John Crispin2013-05-081-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Populate struct soc_info with the data that describes our RAM window. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5181/
| | * | | MIPS: ralink: add memory definition for RT305xJohn Crispin2013-05-081-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Populate struct soc_info with the data that describes our RAM window. As memory detection fails on RT5350 we read the amount of available memory from the system controller. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5180/
| | * | | MIPS: add detect_memory_region()John Crispin2013-05-081-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a generic way of detecting the available RAM. This function is based on the implementation already used by ath79. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5178/
| | * | | MIPS: ralink: add cpu-feature-overrides.hGabor Juhos2013-05-083-0/+167
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add cpu-feature-overrides.h for RT288x, RT305x and RT3883. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5175/
| | * | | MIPS: ralink: adds support for MT7620 SoC familyJohn Crispin2013-05-081-0/+76
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support code for mt7620 SOC. The code detects the SoC and registers the clk / pinmux settings. Signed-off-by: John Crispin <blogic@openwrt.org> Acked-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5177/
| | * | | MIPS: ralink: adds support for RT3883 SoC familyJohn Crispin2013-05-081-0/+248
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support code for rt3883 SOC. The code detects the SoC and registers the clk / pinmux settings. Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5185/
| | * | | MIPS: ralink: adds support for RT2880 SoC familyJohn Crispin2013-05-081-0/+49
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support code for rt2880 SOC. The code detects the SoC and registers the clk / pinmux settings. Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5176/
| | * | | MIPS: ralink: add RT5350 sdram register definesJohn Crispin2013-05-081-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a few missing defines that are needed to make memory detection work on the RT5350. Signed-off-by: John Crispin <blogic@openwrt.org> Acked-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5169/
| | * | | MIPS: ralink: add RT3352 register definesJohn Crispin2013-05-081-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a few missing defines that are needed to make USB and clock detection work on the RT3352. Signed-off-by: John Crispin <blogic@openwrt.org> Acked-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5166/
| | * | | MIPS: move mips_{set,get}_machine_name() to a more generic placeJohn Crispin2013-05-082-4/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Previously this functionality was only available to users of the mips_machine api. Moving the code to prom.c allows us to also add a OF wrapper. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5164/
| | * | | MIPS: Init new mmu_context for each possible CPU to avoid memory corruptionHuacai Chen2013-05-081-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, init_new_context() only for each online CPU, this may cause memory corruption when CPU hotplug and fork() happens at the same time. To avoid this, we make init_new_context() cover each possible CPU. Scenario: 1, CPU#1 is being offline; 2, On CPU#0, do_fork() call dup_mm() and copy a mm_struct to the child; 3, On CPU#0, dup_mm() call init_new_context(), since CPU#1 is offline and init_new_context() only covers the online CPUs, child has the same asid as its parent on CPU#1 (however, child's asid should be 0); 4, CPU#1 is being online; 5, Now, if both parent and child run on CPU#1, memory corruption (e.g. segfault, bus error, etc.) will occur. Signed-off-by: Huacai Chen <chenhc@lemote.com> Acked-by: David Daney <david.daney@cavium.com> Patchwork: http://patchwork.linux-mips.org/patch/4995/ Acked-by: John Crispin <blogic@openwrt.org>
| | * | | MIPS: Build uasm-generated code only once to avoid CPU Hotplug problemHuacai Chen2013-05-082-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This and the next patch resolve memory corruption problems while CPU hotplug. Without these patches, memory corruption can triggered easily as below: On a quad-core MIPS platform, use "spawn" of UnixBench-5.1.3 (http:// code.google.com/p/byte-unixbench/) and a CPU hotplug script like this (hotplug.sh): while true; do echo 0 >/sys/devices/system/cpu/cpu1/online echo 0 >/sys/devices/system/cpu/cpu2/online echo 0 >/sys/devices/system/cpu/cpu3/online sleep 1 echo 1 >/sys/devices/system/cpu/cpu1/online echo 1 >/sys/devices/system/cpu/cpu2/online echo 1 >/sys/devices/system/cpu/cpu3/online sleep 1 done Run "hotplug.sh" and then run "spawn 10000", spawn will get segfault after a few minutes. This patch: Currently, clear_page()/copy_page() are generated by Micro-assembler dynamically. But they are unavailable until uasm_resolve_relocs() has finished because jump labels are illegal before that. Since these functions are shared by every CPU, we only call build_clear_page()/ build_copy_page() only once at boot time. Without this patch, programs will get random memory corruption (segmentation fault, bus error, etc.) while CPU Hotplug (e.g. one CPU is using clear_page() while another is generating it in cpu_cache_init()). For similar reasons we modify build_tlb_refill_handler()'s invocation. V2: 1, Rework the code to make CPU#0 can be online/offline. 2, Introduce cpu_has_local_ebase feature since some types of MIPS CPU need a per-CPU tlb_refill_handler(). Signed-off-by: Huacai Chen <chenhc@lemote.com> Signed-off-by: Hongbing Hu <huhb@lemote.com> Acked-by: David Daney <david.daney@cavium.com> Patchwork: http://patchwork.linux-mips.org/patch/4994/ Acked-by: John Crispin <blogic@openwrt.org>
| | * | | MIPS: Netlogic: Merge platform usb.h to usb-init.cJayachandran C2013-05-081-64/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The definitions are not used anywhere else, and merging it will make adding the new USB definitions for XLPII series easier. While there, cleanup some whitespace in usb-init.c. There is no change to logic due to this commit. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Patchwork: http://patchwork.linux-mips.org/patch/5027/ Acked-by: John Crispin <blogic@openwrt.org>
| | * | | MIPS: Netlogic: Remove unused codeJayachandran C2013-05-081-36/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove unused functions and redundant comments from arch/mips/include/asm/netlogic/haldefs.h Signed-off-by: Jayachandran C <jchandra@broadcom.com> Patchwork: http://patchwork.linux-mips.org/patch/5029/ Acked-by: John Crispin <blogic@openwrt.org>
| | * | | MIPS: Netlogic: Add 32-bit support for XLPJayachandran C2013-05-081-6/+50
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update asm/netlogic/haldefs.h to extend register access functions nlm_{read,write}_reg64() for 32-bit compilation. When compiled for 32-bit the functions will read 64 IO registers with interrupts disabled. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Patchwork: http://patchwork.linux-mips.org/patch/5026/ Acked-by: John Crispin <blogic@openwrt.org>
| | * | | MIPS: Netlogic: Avoid using fixed PIC IRT indexJayachandran C2013-05-081-53/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The index for a device interrupt in the PIC interrupt routing table changes for different chips in the XLP family. Avoid using the fixed entries and derive the index value from the SoC device header. Add workarounds for some devices which do not report the IRT index correctly. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Patchwork: http://patchwork.linux-mips.org/patch/5025/ Acked-by: John Crispin <blogic@openwrt.org>
| | * | | MIPS: Netlogic: Remove unused EIMR/EIRR functionsJayachandran C2013-05-081-6/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove the definitions of {read,write}_c0_{eirr,eimr}. These functions are now unused after the PIC and IRQ code has been updated to use optimized EIMR/EIRR functions which work on both 32-bit and 64-bit. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Patchwork: http://patchwork.linux-mips.org/patch/5021/ Acked-by: John Crispin <blogic@openwrt.org>
| | * | | MIPS: Netlogic: Optimize and fix write_c0_eimr()Jayachandran C2013-05-081-8/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove the irq save/restore from write_c0_eimr(), as it is always called with interrupts off. This allows us to remove workaround in write_c0_eimr() to fix up the flags used by local_irq_save. This fixup worked on XLR, but will break when 32-bit support is added to r2 cpus like XLP. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Patchwork: http://patchwork.linux-mips.org/patch/5022/ Acked-by: John Crispin <blogic@openwrt.org>
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