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* MIPS: Add core files for MIPS SEAD-3 development platform.Steven J. Hill2012-09-135-0/+177
* MIPS: Add support for the 1074K core.Steven J. Hill2012-09-132-0/+3
* MIPS: Loongson 2: Sort out clock managment.Ralf Baechle2012-08-012-12/+0
* Merge branch 'akpm' (Andrew's patch-bomb)Linus Torvalds2012-07-301-1/+0
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| * ipc: use Kconfig options for __ARCH_WANT_[COMPAT_]IPC_PARSE_VERSIONWill Deacon2012-07-301-1/+0
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*---------. \ Merge branches 'next/generic', 'next/alchemy', 'next/bcm63xx', 'next/cavium',...Ralf Baechle2012-07-2538-231/+1208
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| | | | | | * MIPS: Netlogic: remove cpu_has_dc_aliases define for XLPJayachandran C2012-07-241-1/+0
| | | | | | * MIPS: Netlogic: Add IRQ mappings for more devicesJayachandran C2012-07-241-0/+3
| | | | | | * MIPS: Netlogic: USB support for XLPGanesan Ramalingam2012-07-244-1/+75
| | | | | | * MIPS: Netlogic: XLP PCIe controller support.Ganesan Ramalingam2012-07-243-2/+85
| | | | | | * MIPS: Netlogic: Platform NAND/NOR flash supportGanesan Ramalingam2012-07-242-0/+159
| | | | | | * MIPS: Netlogic: Remove NETLOGIC_ prefixJayachandran C2012-07-241-29/+30
| | | | | | * MIPS: Netlogic: SMP wakeup code updateJayachandran C2012-07-241-1/+3
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| | | | | * MIPS: Loongson 1B: Add board supportKelvin Cheung2012-07-257-0/+244
| | | | | * MIPS: Add CPU support for Loongson1BKelvin Cheung2012-07-232-1/+4
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| | | | * MTD: NAND: JZ4740: Multi-bank support with autodetectionMaarten ter Huurne2012-07-231-0/+4
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| | | * i2c: Convert i2c-octeon.c to use device tree.David Daney2012-07-231-5/+0
| | | * MIPS: Prune some target specific code out of prom.cDavid Daney2012-07-231-3/+0
| | | * MIPS: OCTEON: Remove unneeded OCTEON_IRQ_* defines.David Daney2012-07-231-38/+2
| | | * MIPS: Octeon: Remove use of OCTEON_IRQ_RST.David Daney2012-07-231-2/+3
| | | * MIPS: OCTEON: Remove some unused files.David Daney2012-07-232-66/+0
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| | * MIPS: BCM63XX: Add PCIe Support for BCM6328Jonas Gorski2012-07-243-0/+69
| | * MIPS: BCM63XX: Add basic BCM6328 supportJonas Gorski2012-07-245-1/+169
| | * MIPS: BCM63XX: Add flash type detectionJonas Gorski2012-07-242-0/+15
| | * MIPS: BCM63XX: Move flash registration out of board_bcm963xx.cJonas Gorski2012-07-241-0/+6
| | * MIPS: BCM63XX: add RNG peripheral definitionsFlorian Fainelli2012-07-242-0/+23
| | * MIPS: OCTEON: Remove some unused files.David Daney2012-07-242-66/+0
| | * MIPS: BCM63xx: Add stub to register the SPI platform driverFlorian Fainelli2012-07-231-0/+89
| | * MIPS: BCM63xx: Define internal registers offsets of the SPI controllerFlorian Fainelli2012-07-231-0/+119
| | * MIPS: BCM63xx: Remove SPI2 registerFlorian Fainelli2012-07-231-9/+1
| | * MIPS: BCM63xx: Define SPI register sizes.Florian Fainelli2012-07-231-0/+4
| | * MIPS: BCM63xx: Define BCM6358 SPI base addressFlorian Fainelli2012-07-231-1/+1
| | * MIPS: BCM63xx: Add IRQ_SPI and CPU specific SPI IRQ valuesFlorian Fainelli2012-07-231-0/+7
| | * MIPS: BCM63XX: Be consistent in clock bits enable namingFlorian Fainelli2012-07-231-18/+18
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| * MIPS: Fixup ordering of micro assembler instructions.Steven J. Hill2012-07-231-49/+51
| * MIPS: Unify memcpy.S and memcpy-inatomic.SDavid Daney2012-07-231-3/+3
| * MIPS: loongson: use IS_ENABLED()Florian Fainelli2012-07-231-1/+2
| * MIPS: TX49XX: use IS_ENABLED()Florian Fainelli2012-07-231-1/+1
| * MIPS: SMTC: Support for Multi-threaded FPUsSteven J. Hill2012-07-232-0/+19
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* MIPS: Fix bug.h MIPS build regressionYoichi Yuasa2012-07-192-1/+1
* MIPS: BCM63XX: Fix BCM6368 IPSec clock bitFlorian Fainelli2012-07-191-1/+1
* MIPS: cmpxchg.h: Add missing includeAaro Koskinen2012-07-191-0/+1
* MIPS: Fix typo multipy -> multiplyRalf Baechle2012-07-191-2/+2
* MIPS: Properly align the .data..init_task section.David Daney2012-07-191-2/+2
* MIPS: Fix race condition with FPU thread task flag during context switch.Leonid Yegoshin2012-07-191-2/+4
* MIPS: Don't panic on 5KEc.Leonid Yegoshin2012-07-191-1/+1
* MIPS: Add support for the M14Kc core.Steven J. Hill2012-07-061-2/+3
* MIPS: MT: Fix indentation damage.Ralf Baechle2012-07-061-1/+1
* MIPS: Clean-up GIC and vectored interrupts.Steven J. Hill2012-07-062-1/+24
* MIPS: Provide a symbol for the legacy performance counter interrupt.Ralf Baechle2012-07-061-0/+1
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