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* MIPS: BCM63XX: Add PCIe Support for BCM6328Jonas Gorski2012-07-243-0/+69
| | | | | | | | | | | | | Add support for the PCIe port found on BCM6328. Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> Cc: linux-mips@linux-mips.org Cc: Maxime Bizon <mbizon@freebox.fr> Cc: Florian Fainelli <florian@openwrt.org> Cc: Kevin Cernekee <cernekee@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/3956/ Reviewed-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BCM63XX: Add basic BCM6328 supportJonas Gorski2012-07-245-1/+169
| | | | | | | | | | | | | | This includes CPU speed, memory size detection and working UART, but lacking the appropriate drivers, no support for attached flash. Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> Cc: linux-mips@linux-mips.org Cc: Maxime Bizon <mbizon@freebox.fr> Cc: Florian Fainelli <florian@openwrt.org> Cc: Kevin Cernekee <cernekee@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/3951/ Reviewed-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BCM63XX: Add flash type detectionJonas Gorski2012-07-242-0/+15
| | | | | | | | | | | | | | | On BCM6358 and BCM6368 the attached flash type is exposed through a bootstrapping register. Use it for auto detecting the flash type on those and default to parallel flash for earlier SoCs. Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> Cc: linux-mips@linux-mips.org Cc: Maxime Bizon <mbizon@freebox.fr> Cc: Florian Fainelli <florian@openwrt.org> Cc: Kevin Cernekee <cernekee@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/3954/ Reviewed-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BCM63XX: Move flash registration out of board_bcm963xx.cJonas Gorski2012-07-241-0/+6
| | | | | | | | | | | | | board_bcm963xx.c is already large enough. Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> Cc: linux-mips@linux-mips.org Cc: Maxime Bizon <mbizon@freebox.fr> Cc: Florian Fainelli <florian@openwrt.org> Cc: Kevin Cernekee <cernekee@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/3952/ Reviewed-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BCM63XX: add RNG peripheral definitionsFlorian Fainelli2012-07-242-0/+23
| | | | | | | | | Signed-off-by: Florian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Cc: mpm@selenic.com Cc: herbert@gondor.apana.org.au Patchwork: https://patchwork.linux-mips.org/patch/3326/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BCM63xx: Add stub to register the SPI platform driverFlorian Fainelli2012-07-231-0/+89
| | | | | | | | | | | | | | This patch adds the necessary stub to register the SPI platform driver. Since the registers are shuffled between the 4 BCM63xx CPUs supported by this SPI driver we also need to generate the internal register layout and export this layout for the driver to use it properly. Signed-off-by: Florian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Cc: grant.likely@secretlab.ca Cc: spi-devel-general@lists.sourceforge.net Patchwork: https://patchwork.linux-mips.org/patch/3321/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BCM63xx: Define internal registers offsets of the SPI controllerFlorian Fainelli2012-07-231-0/+119
| | | | | | | | | | | | | BCM6338, BCM6348, BCM6358 and BCM6368 basically use the same SPI controller though the internal registers are shuffled, which still allows a common driver to drive that IP block. Signed-off-by: Florian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Cc: grant.likely@secretlab.ca Cc: spi-devel-general@lists.sourceforge.net Patchwork: https://patchwork.linux-mips.org/patch/3318/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BCM63xx: Remove SPI2 registerFlorian Fainelli2012-07-231-9/+1
| | | | | | | | | | | | | | This register was introduced with the support of the BCM6368 CPU in the idea that its internal layout was different from the other CPUs SPI controller. The controller is actually the same as the one present on BCM6358 so we can remove this register and use the usual SPI register instead. Signed-off-by: Florian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Cc: grant.likely@secretlab.ca Cc: spi-devel-general@lists.sourceforge.net Patchwork: https://patchwork.linux-mips.org/patch/3316/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BCM63xx: Define SPI register sizes.Florian Fainelli2012-07-231-0/+4
| | | | | | | | | | | | There are two distinct sizes for the SPI register depending on the SoC generation (6338 & 6348 vs 6358 & 6368). Signed-off-by: Florian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Cc: grant.likely@secretlab.ca Cc: spi-devel-general@lists.sourceforge.net Patchwork: https://patchwork.linux-mips.org/patch/3314/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BCM63xx: Define BCM6358 SPI base addressFlorian Fainelli2012-07-231-1/+1
| | | | | | | | | Signed-off-by: Florian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Cc: grant.likely@secretlab.ca Cc: spi-devel-general@lists.sourceforge.net Patchwork: https://patchwork.linux-mips.org/patch/3315/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BCM63xx: Add IRQ_SPI and CPU specific SPI IRQ valuesFlorian Fainelli2012-07-231-0/+7
| | | | | | | | | Signed-off-by: Florian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Cc: grant.likely@secretlab.ca Cc: spi-devel-general@lists.sourceforge.net Patchwork: https://patchwork.linux-mips.org/patch/3320/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BCM63XX: Be consistent in clock bits enable namingFlorian Fainelli2012-07-231-18/+18
| | | | | | | | | | Remove the _CLK suffix from the BCM6368 clock bits definitions to be consistent with what is already present. Signed-off-by: Florian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3312/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BCM63XX: Fix BCM6368 IPSec clock bitFlorian Fainelli2012-07-191-1/+1
| | | | | | | | | | | The IPsec clock bit is 18 and not 17. Signed-off-by: Florian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Cc: mpm@selenic.com Cc: herbert@gondor.apana.org.au Patchwork: https://patchwork.linux-mips.org/patch/3323/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BCM63XX: Add missing include for bcm63xx_gpio.hJonas Gorski2012-05-151-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | bcm63xx_gpio.h uses macros defined in bcm63xx_cpu.h without including it, leading to the following build failure: CC [M] drivers/mmc/core/cd-gpio.o In file included from arch/mips/include/asm/mach-bcm63xx/gpio.h:4:0, from arch/mips/include/asm/gpio.h:4, from include/linux/gpio.h:30, from drivers/mmc/core/cd-gpio.c:12: arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h: In function 'bcm63xx_gpio_count': arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h:10:2: error: implicit declaration of function 'bcm63xx_get_cpu_id' arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h:11:7: error: 'BCM6358_CPU_ID' undeclared (first use in this function) arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h:11:7: note: each undeclared identifier is reported only once for each function it appears in arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h:13:7: error: 'BCM6338_CPU_ID' undeclared (first use in this function) arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h:15:7: error: 'BCM6345_CPU_ID' undeclared (first use in this function) arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h:17:7: error: 'BCM6368_CPU_ID' undeclared (first use in this function) arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h:19:7: error: 'BCM6348_CPU_ID' undeclared (first use in this function) make[7]: *** [drivers/mmc/core/cd-gpio.o] Error 1 Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> Cc: stable@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: Maxime Bizon <mbizon@freebox.fr> Cc: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds2012-01-147-235/+658
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (119 commits) MIPS: Delete unused function add_temporary_entry. MIPS: Set default pci cache line size. MIPS: Flush huge TLB MIPS: Octeon: Remove SYS_SUPPORTS_HIGHMEM. MIPS: Octeon: Add support for OCTEON II PCIe MIPS: Octeon: Update PCI Latency timer and enable more error reporting. MIPS: Alchemy: Update cpu-feature-overrides MIPS: Alchemy: db1200: Improve PB1200 detection. MIPS: Alchemy: merge Au1000 and Au1300-style IRQ controller code. MIPS: Alchemy: chain IRQ controllers to MIPS IRQ controller MIPS: Alchemy: irq: register pm at irq init time MIPS: Alchemy: Touchscreen support on DB1100 MIPS: Alchemy: Hook up IrDA on DB1000/DB1100 net/irda: convert au1k_ir to platform driver. MIPS: Alchemy: remove unused board headers MTD: nand: make au1550nd.c a platform_driver MIPS: Netlogic: Mark Netlogic chips as SMT capable MIPS: Netlogic: Add support for XLP 3XX cores MIPS: Netlogic: Merge some of XLR/XLP wakup code MIPS: Netlogic: Add default XLP config. ... Fix up trivial conflicts in arch/mips/kernel/{perf_event_mipsxx.c, traps.c} and drivers/tty/serial/Makefile
| * MIPS: BCM63xx: Fix GPIO set/get for BCM6345Florian Fainelli2011-12-071-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | On BCM6345, the register offsets for the set/get GPIO registers is wrong. Use the same logic as the one present in arch/mips/bcm63xx/irq.c to define the correct gpio_out_low_reg value when support for BCM6345 is compiled in. Signed-off-by: Florian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3010/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: BCM63xx: Remove BCM6345 hacks to read base boot addressFlorian Fainelli2011-12-071-1/+1
| | | | | | | | | | | | | | | | | | | | | | Though BCM6345 does not technically have the same MPI register layout than the other SoCs, reading the chip-select registers is done the same way, and particularly for chip-select 0, which is the boot flash. Signed-off-by: Florian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3009/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: BCM63xx: Fix SDRAM size computation for BCM6345Florian Fainelli2011-12-071-0/+2
| | | | | | | | | | | | | | | | | | | | Instead of hardcoding the amount of available RAM, read the number of effective multiples of 8MB from SDRAM_MBASE_REG. Signed-off-by: Florian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3008/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: BCM63XX: Add support for bcm6368 CPU.Maxime Bizon2011-12-074-2/+212
| | | | | | | | | | | | | | Signed-off-by: Maxime Bizon <mbizon@freebox.fr> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2892/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: BCM63XX: Add external irq support for non 6348 CPUs.Maxime Bizon2011-12-071-9/+22
| | | | | | | | | | | | | | Signed-off-by: Maxime Bizon <mbizon@freebox.fr> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2899/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: BCM63XX: Introduce bcm_readq & bcm_writeq.Maxime Bizon2011-12-071-0/+2
| | | | | | | | | | | | | | | | | | | | | | Needed for upcoming 6368 CPU support. [ralf@linux-mips.org: Changed function names as per Sergei's comments.] Signed-off-by: Maxime Bizon <mbizon@freebox.fr> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2896/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: BCM63XX: Prepare irq code to handle different external irq hardware ↵Maxime Bizon2011-12-072-7/+12
| | | | | | | | | | | | | | | | | | | | | | | | implementation. External irq only works for 6348, change code to prepare support of other CPUs. Signed-off-by: Maxime Bizon <mbizon@freebox.fr> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2895/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: BCM63XX: Change irq code to prepare for per-cpu peculiarity.Maxime Bizon2011-12-071-2/+8
| | | | | | | | | | | | | | | | | | No functionnal change is introduced by this patch. Signed-off-by: Maxime Bizon <mbizon@freebox.fr> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2894/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: BCM63XX: Add more register sets & missing register definitions.Maxime Bizon2011-12-072-2/+261
| | | | | | | | | | | | | | | | | | Needed for upcoming 6368 CPU support. Signed-off-by: Maxime Bizon <mbizon@freebox.fr> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2893/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: BCM63XX: Cleanup cpu registers.Maxime Bizon2011-12-071-212/+99
| | | | | | | | | | | | | | | | | | | | Use preprocessor when possible to avoid duplicated and error-prone code. Signed-off-by: Maxime Bizon <mbizon@freebox.fr> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2897/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: BCM63XX: Hook up plat_ioremap to intercept soc registers remapping.Maxime Bizon2011-12-071-0/+38
| | | | | | | | | | | | | | | | | | | | Internal SOC registers can be directly accessed, no need to waste a TLB entry. Signed-off-by: Maxime Bizon <mbizon@freebox.fr> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2890/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: BCM63XX: bcm963xx_tag.h: make crc fields integersJonas Gorski2012-01-091-6/+5
|/ | | | | | | | All CRC32 fields are 32 bit integers, so define them as such to prevent unnecessary casts if we want to use them. Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* MIPS: Move FIXADDR_TOP into spaces.hKevin Cernekee2011-07-251-0/+17
| | | | | | | | | | | | | | | Memory maps and addressing quirks are normally defined in <spaces.h>. There are already three targets that need to override FIXADDR_TOP, and others exist. This will be a cleaner approach than adding lots of ifdefs in fixmap.h . Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Cc: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/1573/ Acked-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BCM63xx: Remove duplicate PERF_IRQSTAT_REG definitionJonas Gorski2011-07-201-1/+0
| | | | | | | | Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> Cc: linux-mips@linux-mips.org Acked-by: Florian Fainelli <florian@openwrt.org> Patchwork: https://patchwork.linux-mips.org/patch/2461/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: bcm63xx: Fix header_crc comment in bcm963xx_tag.hJonas Gorski2011-05-101-1/+1
| | | | | | | | | The CRC32 actually includes the tag_version. Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2275/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Fix common misspellingsLucas De Marchi2011-03-311-1/+1
| | | | | | Fixes generated by 'codespell' and manually reviewed. Signed-off-by: Lucas De Marchi <lucas.demarchi@profusion.mobi>
* mtd: add Broadcom BCM63xx image tag partition parserFlorian Fainelli2010-10-251-0/+97
| | | | | | | | | | | This patch adds support for parsing Broadcom BCM63xx image tag format and creating MTD partitions accordingly. This driver is a platform_device which can be instantiated accordingly by bcm63xx board support code. Signed-off-by: Daniel Dickinson <cshore@csolve.net> Signed-off-by: Mike Albon <malbon@openwrt.org> Signed-off-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* MIPS: AR7, BCM63xx: fix gpio_to_irq() return valueYoichi Yuasa2010-07-051-1/+1
| | | | | | | | | The return value of gpio_to_irq() is not a pointer but an integer. Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org> Cc: linux-mips <linux-mips@linux-mips.org> Patchwork: http://patchwork.linux-mips.org/patch/1280/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BCM63xx: Avoid namespace clash on GPIO_DIR_{IN,OUT}Florian Fainelli2010-05-211-2/+2
| | | | | | | | | | This is too generic a name, so prefix it with BCM63XX_ to avoid potential namespace clashes when including <asm/gpio.h>. Signed-off-by: Florian Fainelli <ffainelli@freebox.fr> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/1171/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BCM63xx: Fix typo in cpu-feature-overrides file.Maxime Bizon2010-04-121-1/+1
| | | | | | | | | | | Fix typo: CONFIG_BCMCPU_IS_63xx does not exist; CONFIG_BCM63XX_CPU_63xx is the valid config option. Signed-off-by: Maxime Bizon <mbizon@freebox.fr> To: linux-mips@linux-mips.org Cc: Maxime Bizon <mbizon@freebox.fr> Patchwork: http://patchwork.linux-mips.org/patch/901/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BCM63xx: Add support for second uart.Maxime Bizon2010-04-123-0/+23
| | | | | | | | | | | | | The BCm63xx SOC has two uarts. Some boards use the second one for bluetooth. This patch changes platform device registration code to handle this. Changes to the UART driver were already merged in 6a2c7eabfd09ca7986bf96b8958a87ca041a19d8. Signed-off-by: Maxime Bizon <mbizon@freebox.fr> To: linux-mips@linux-mips.org Cc: Maxime Bizon <mbizon@freebox.fr> Patchwork: http://patchwork.linux-mips.org/patch/900/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BCM63xx: Fix BCM6338 and BCM6345 gpio countFlorian Fainelli2010-04-121-0/+4
| | | | | | | | | | The number of GPIOs on BCM6338 is 8, while BCM6345 has only 16 GPIOs available. Signed-off-by: Florian Fainelli <florian@openwrt.org> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/1016/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Nuke trailing blank linesRalf Baechle2010-02-271-1/+0
| | | | | | | Recent git versions now warn about those and they've always been a bit of an annoyance. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BCM63xx: Make bcm63xx_uart_register an initfuncFlorian Fainelli2009-11-021-6/+0
| | | | | | | | | This patch removes the calls to bcm63xx_uart_register in board_bcm963xx.c and make bcm63xx_uart_register an initfunc. Allows us to remove bcm63xx_dev_uart.h which was there to make checkpatch.pl happy. Signed-off-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BCM63xx: Add PCMCIA & Cardbus support.Maxime Bizon2009-09-301-0/+13
| | | | | | Signed-off-by: Maxime Bizon <mbizon@freebox.fr> Reviewed-by: Wolfram Sang <w.sang@pengutronix.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BCM63xx: Add serial driver for bcm63xx integrated UART.Maxime Bizon2009-09-301-0/+6
| | | | | | Signed-off-by: Maxime Bizon <mbizon@freebox.fr> Acked-by: Greg Kroah-Hartman <gregkh@suse.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BCM63xx: Add support for the Broadcom BCM63xx family of SOCs.Maxime Bizon2009-09-1716-0/+1700
Signed-off-by: Maxime Bizon <mbizon@freebox.fr> Signed-off-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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