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* Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds2015-02-212-6/+25
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull MIPS updates from Ralf Baechle: "This is the main pull request for MIPS: - a number of fixes that didn't make the 3.19 release. - a number of cleanups. - preliminary support for Cavium's Octeon 3 SOCs which feature up to 48 MIPS64 R3 cores with FPU and hardware virtualization. - support for MIPS R6 processors. Revision 6 of the MIPS architecture is a major revision of the MIPS architecture which does away with many of original sins of the architecture such as branch delay slots. This and other changes in R6 require major changes throughout the entire MIPS core architecture code and make up for the lion share of this pull request. - finally some preparatory work for eXtendend Physical Address support, which allows support of up to 40 bit of physical address space on 32 bit processors" [ Ahh, MIPS can't leave the PAE brain damage alone. It's like every CPU architect has to make that mistake, but pee in the snow by changing the TLA. But whether it's called PAE, LPAE or XPA, it's horrid crud - Linus ] * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (114 commits) MIPS: sead3: Corrected get_c0_perfcount_int MIPS: mm: Remove dead macro definitions MIPS: OCTEON: irq: add CIB and other fixes MIPS: OCTEON: Don't do acknowledge operations for level triggered irqs. MIPS: OCTEON: More OCTEONIII support MIPS: OCTEON: Remove setting of processor specific CVMCTL icache bits. MIPS: OCTEON: Core-15169 Workaround and general CVMSEG cleanup. MIPS: OCTEON: Update octeon-model.h code for new SoCs. MIPS: OCTEON: Implement DCache errata workaround for all CN6XXX MIPS: OCTEON: Add little-endian support to asm/octeon/octeon.h MIPS: OCTEON: Implement the core-16057 workaround MIPS: OCTEON: Delete unused COP2 saving code MIPS: OCTEON: Use correct instruction to read 64-bit COP0 register MIPS: OCTEON: Save and restore CP2 SHA3 state MIPS: OCTEON: Fix FP context save. MIPS: OCTEON: Save/Restore wider multiply registers in OCTEON III CPUs MIPS: boot: Provide more uImage options MIPS: Remove unneeded #ifdef __KERNEL__ from asm/processor.h MIPS: ip22-gio: Remove legacy suspend/resume support mips: pci: Add ifdef around pci_proc_domain ...
| * MIPS: Alchemy: Fix cpu clock calculationManuel Lauss2015-02-201-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current code uses bits 0-6 of the sys_cpupll register to calculate core clock speed. However this is only valid on Au1300, on all earlier models the hardware only uses bits 0-5 to generate core clock. This fixes clock calculation on the MTX1 (Au1500), where bit 6 of cpupll is set as well, which ultimately lead the code to calculate a bogus cpu core clock and also uart base clock down the line. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Reported-by: John Crispin <blogic@openwrt.org> Tested-by: Bruno Randolf <br1@einfach.org> Cc: stable@vger.kernel.org [v3.17+] Cc: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/9279/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Alchemy: remove declaration for set_cpuspecManuel Lauss2015-02-201-1/+0
| | | | | | | | | | | | | | | | | | | | set_cpuspec() has been dropped with commit 074cf656700ddd1d2bd7f815f78e785418beb898 ("MIPS: Alchemy: remove cpu_table.") in late 2008. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Cc: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/9150/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Alchemy: preset loops_per_jiffy based on CPU clockManuel Lauss2015-02-202-0/+9
| | | | | | | | | | | | | | | | | | This was lost during the rewrite of clock framework support. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Cc: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/9149/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Alchemy: fix Au1000/Au1500 LRCLK calculationManuel Lauss2015-02-201-5/+14
| | | | | | | | | | | | | | | | | | | | | | The Au1000 and Au1500 calculate the LRCLK a bit differently than newer models: a single bit in MEM_STCFG0 selects if pclk is divided by 4 or 5. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Cc: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/9148/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: Alchemy: Remove bogus args from alchemy_clk_fgcs_detrTomeu Vizoso2015-02-181-2/+0
| | | | | | | | | | | | | | | | | | | | They were added to this function by mistake when they were added to the clk_ops.determine_rate callback. Fixes: 1c8e600440c7 ("clk: Add rate constraints to clocks") Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Michael Turquette <mturquette@linaro.org>
* | clk: Add rate constraints to clocksTomeu Vizoso2015-02-021-0/+8
|/ | | | | | | | | | | | | | | | Adds a way for clock consumers to set maximum and minimum rates. This can be used for thermal drivers to set minimum rates, or by misc. drivers to set maximum rates to assure a minimum performance level. Changes the signature of the determine_rate callback by adding the parameters min_rate and max_rate. Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> [sboyd@codeaurora.org: set req_rate in __clk_init] Signed-off-by: Michael Turquette <mturquette@linaro.org> [mturquette@linaro.org: min/max rate for sun6i_ahb1_clk_determine_rate migrated clk-private.h changes to clk.c]
* Merge tag 'clk-for-linus-3.19' of ↵Linus Torvalds2014-12-201-5/+5
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.linaro.org/people/mike.turquette/linux Pull clk framework updates from Mike Turquette: "This is much later than usual due to several last minute bugs that had to be addressed. As usual the majority of changes are new drivers and modifications to existing drivers. The core recieved many fixes along with the groundwork for several large changes coming in the future which will better parition clock providers from clock consumers" * tag 'clk-for-linus-3.19' of git://git.linaro.org/people/mike.turquette/linux: (86 commits) clk: samsung: Fix Exynos 5420 pinctrl setup and clock disable failure due to domain being gated ARM: OMAP3: clock: fix boot breakage in legacy mode ARM: OMAP2+: clock: fix DPLL code to use new determine rate APIs clk: Really fix deadlock with mmap_sem clk: mmp: fix sparse non static symbol warning clk: Change clk_ops->determine_rate to return a clk_hw as the best parent clk: change clk_debugfs_add_file to take a struct clk_hw clk: Don't expose __clk_get_accuracy clk: Don't try to use a struct clk* after it could have been freed clk: Remove unused function __clk_get_prepare_count clk: samsung: Fix double add of syscore ops after driver rebind clk: samsung: exynos4: set parent of sclk_hdmiphy to hdmi clk: samsung: exynos4415: Fix build with PM_SLEEP disabled clk: samsung: remove unnecessary inclusion of header files from clk.h clk: samsung: remove unnecessary CONFIG_OF from clk.c clk: samsung: Spelling s/bwtween/between/ clk: rockchip: Add support for the mmc clock phases using the framework clk: rockchip: add bindings for the mmc clocks clk: rockchip: rk3288 export i2s0_clkout for use in DT clk: rockchip: use clock ID for DMC (memory controller) on rk3288 ...
| * clk: Change clk_ops->determine_rate to return a clk_hw as the best parentTomeu Vizoso2014-12-031-5/+5
| | | | | | | | | | | | | | | | This is in preparation for clock providers to not have to deal with struct clk. Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Michael Turquette <mturquette@linaro.org>
* | MIPS: Replace use of phys_t with phys_addr_t.Ralf Baechle2014-11-241-2/+2
| | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: Replace MIPS-specific 64BIT_PHYS_ADDR with generic PHYS_ADDR_T_64BITRalf Baechle2014-11-241-1/+1
| | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: Alchemy: Remove direct access to prepare_count field of struct clkTomeu Vizoso2014-11-241-4/+3
|/ | | | | | | | | | | | | | | Replacing it with a call to __clk_is_prepared(), which isn't entirely equivalent but in practice shouldn't matter. Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Cc: Mike Turquette <mturquette@linaro.org> Cc: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Cc: Manuel Lauss <manuel.lauss@gmail.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8120/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Alchemy: DB1300: Add touch penirq supportManuel Lauss2014-09-221-0/+44
| | | | | | | | | wire up the WM9713 pendown irq support. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Cc: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/7563/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Alchemy: DB1xxx: Explicitly set 50MHz clock for I2C/SPI units.Manuel Lauss2014-09-222-6/+6
| | | | | | | | | | | Add an explicit call to set the desired rate to get the correct clock routing for the PSC clocks. It wasn't broken before, but now it's less affected by bootloader changes. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Cc: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/7554/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Alchemy: devboards: sit and spin after poweroffManuel Lauss2014-09-221-0/+3
| | | | | | | | | | | On boards which don't support poweroff, systemd complains about this fact. In case poweroff fails, just sit and spin in the wait loop. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Cc: Linux-MIPS <linux-mips@linux-mips.org> Cc: Manuel Lauss <manuel.lauss@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/7558/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Alchemy: Fix db1200 PSC clock enablementManuel Lauss2014-08-191-5/+1
| | | | | | | | | | Enable PSC0 (I2C/SPI) clock and leave PSC1 (Audio) alone. This patch restores functionality to both Audio and I2C/SPI. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Cc: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/7544/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Alchemy: remove old clock supportManuel Lauss2014-07-304-108/+5
| | | | | | | | | | With the clock framework in place, remove unused functions and bits, and drop the CLK_IGNORE_UNUSED flag, which is now unneeded. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Cc: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/7473/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Alchemy: au1100fb: use clk frameworkManuel Lauss2014-07-301-0/+14
| | | | | | | | | | Use the clock framework to en/disable the clock to the au1100 framebuffer device. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Cc: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/7474/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Alchemy: db1x00: use clk frameworkManuel Lauss2014-07-303-25/+45
| | | | | | | | | Make use of the clk framework to set up and enable all PSC clocks. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Cc: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/7469/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Alchemy: usb: use clk frameworkManuel Lauss2014-07-301-7/+40
| | | | | | | | | | | | Add use of the common clock framework to set and enable the 48MHz clock source for the onchip OHCI and UDC blocks. Tested on a DB1500. (Au1200 and Au1300 use an external 48MHz crystal). Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Cc: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/7467/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Alchemy: platform: use clk framework for uartsManuel Lauss2014-07-302-20/+12
| | | | | | | | | | Use the clock framework to get the rate of the peripheral clock. Remove the now obsolete get_uart_baud_base function. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Cc: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/7468/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Alchemy: clock framework integration of onchip clocksManuel Lauss2014-07-302-2/+1098
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch introduces common clock framework integration for all configurable on-chip clocks on Alchemy chips: - 2 or 3 PLLs which generate integer multiples of the root rate 12MHz, - 6 dividers which take one of the 3 PLLs as input and divide their rate by either multiples of 2 or 1 (Au1300). - another bank of up to 6 muxes which take either one of the 6 above dividers or one of the PLLs directly and divide their rate further by 1, 2, 3 or 4. - a few other sources which are used by onchip peripherals and are informational. This implementation will take the clock tree as it was set up by boot firmware: all in-kernel boards should continue to work without having to set up the clock tree in board code. CLK_IGNORE_DISABLED will be removed once all drivers have been converted. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Cc: Mike Turquette <mturquette@linaro.org> Cc: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/7466/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Alchemy: remove au_read/write/syncManuel Lauss2014-07-302-18/+19
| | | | | | | | | replace au_read/write/sync with __raw_read/write and wmb. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Cc: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/7465/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Alchemy: add helpers to access static memory ctrl registers.Manuel Lauss2014-07-304-28/+28
| | | | | | | | | | | | | | This patch changes the static memory controller registers to offsets from base, prefixes them with AU1000_ to avoid silent failures due to changed addresses and introduces helpers to access them. No functional changes, comparing assembly of a few select functions shows no differences. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Cc: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/7463/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Alchemy: introduce helpers to access SYS register block.Manuel Lauss2014-07-3011-82/+61
| | | | | | | | | | | | | | | This patch changes all absolute SYS_XY registers to offsets from the SYS block base, prefixes them with AU1000 to avoid silent failures due to changed addresses, and introduces helper functions to read/write them. No functional changes, comparing assembly of a few select functions shows no differences. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Cc: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/7464/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Replace obsolete strict_strto call with kstrtoDaniel Walter2014-06-042-3/+3
| | | | | | | | Signed-off-by: Daniel Walter <dwalter@google.com> Cc: linux-kernel@vger.kernel.org Cc: richard@nod.at Cc: akpm@linux-foundation.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Alchemy: Default to noncoherent IO on Au1200 ABManuel Lauss2014-05-282-24/+8
| | | | | | | | | | CONFIG_DMA_COHERENT is no longer set; default to noncoherent io on Au1200 revision AB to make USB work. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Cc: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/6745/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Merge branch '3.14-fixes' into mips-for-linux-nextRalf Baechle2014-03-312-6/+2
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| * MIPS: Alchemy: Fix unchecked kstrtoul return valueManuel Lauss2014-03-062-6/+2
| | | | | | | | | | | | | | | | | | | | enabled __must_check logic triggers a build error for mtx1 and gpr in the prom init code. Fix by checking the kstrtoul() return value. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Cc: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/6574/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: Fix gigaton of warning building with microMIPS.Ralf Baechle2014-03-311-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With binutils 2.24 the attempt to switch with microMIPS mode to MIPS III mode through .set mips3 results in *lots* of warnings like {standard input}: Assembler messages: {standard input}:397: Warning: the 64-bit MIPS architecture does not support the `smartmips' extension during a kernel build. Fixed by using .set arch=r4000 instead. This breaks support for building the kernel with binutils 2.13 which was supported for 32 bit kernels only anyway and 2.14 which was a bad vintage for MIPS anyway. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: Alchemy: pata_platform for DB1200Manuel Lauss2014-03-261-7/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | The au1xxx-ide driver isn't any faster than pata_platform since it spends a lot of time busy waiting for DMA to finish; faster PIO/DMA modes only work on the db1200 with a certain cpu speed, UDMA is broken, and finally the old IDE layer is on death row, so time to switch to the newer ATA layer. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Cc: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/6662/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: Alchemy: fold mach-db1xxx/db1x00 headers into board codeManuel Lauss2014-03-262-2/+80
| | | | | | | | | | | | | | | | | | Merge the db1200.h and db1300.h headers into their only users. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Cc: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/6660/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: Alchemy: Unify Devboard support.Manuel Lauss2014-03-268-70/+82
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch merges support for all DB1xxx and PB1xxx boards into a single image, along with a new single defconfig for them. Run-tested on DB1300 and DB1500. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Cc: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/6577/ Patchwork: https://patchwork.linux-mips.org/patch/6659/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: Alchemy: Determine cohereny at runtime based on cpu typeManuel Lauss2014-03-262-5/+10
|/ | | | | | | | | | | | All Alchemy chips have coherent DMA, but for example the USB or AC97 peripherals on the Au1000/1500/1100 are not. This patch uses DMA_MAYBE_COHERENT on Alchemy and sets coherentio based on CPU type. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Cc: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/6576/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Alchemy: Fix DB1100 GPIO registrationManuel Lauss2014-02-041-5/+2
| | | | | | | | | | | | | With CONFIG_GPIOLIB=y gpios need to be requested before they can be modified. Request the SD carddetect pins, and drop the SPI direction setup, as the driver does that for us anyway. This gets rid of a lot of WARN_ON()s triggered by GPIO core, and restores functionality of the touschreen controller. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Cc: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/6497/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* mips: delete non-required instances of include <linux/init.h>Paul Gortmaker2014-01-241-1/+0
| | | | | | | | | | | None of these files are actually using any __init type directives and hence don't need to include <linux/init.h>. Most are just a left over from __devinit and __cpuinit removal, or simply due to code getting copied from one driver to the next. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6320/
* MIPS: Panic messages should not end in \n.Ralf Baechle2013-10-291-1/+1
| | | | | | | Panic() is going to add a \n itself and it's annoying if a panic message rolls of the screen on a device with no scrollback. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Alchemy: MTX-1: fix incorrect placement of __initdata tagBartlomiej Zolnierkiewicz2013-09-301-1/+1
| | | | | | | | | | | | __initdata tag should be placed between the variable name and equal sign for the variable to be placed in the intended .init.data section. Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/5934/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Cleanup CP0 PRId and CP1 FPIR register access masksMaciej W. Rozycki2013-09-181-1/+2
| | | | | | | | | | Replace hardcoded CP0 PRId and CP1 FPIR register access masks throughout. The change does not touch places that use shifted or partial masks. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5838/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Idle: Consolidate all declarations in <asm/idle.h>.Ralf Baechle2013-05-222-0/+2
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Kconfig: remove "config MIPS_DISABLE_OBSOLETE_IDE"Paul Bolle2013-05-081-3/+0
| | | | | | | | | | | | | | | | | | The Kconfig symbol MIPS_DISABLE_OBSOLETE_IDE was added in v2.6.10. It has never been used. Let's remove it. The symbol was originally introduced by the following commit commit 2bfa662b64a7ee593f3039c1d3fd81a7766a63cd Author: Pete Popov <ppopov@embeddedalley.com> Date: Tue Oct 12 06:24:19 2004 +0000 - Db1550 bug fixes - updated defconfig - updated Kconfig to use DMA_COHERENT since new silicon is coherent Signed-off-by: Paul Bolle <pebolle@tiscali.nl> Patchwork: http://patchwork.linux-mips.org/patch/5064/ Acked-by: John Crispin <blogic@openwrt.org>
* MIPS: remove obsolete Kconfig macrosPaul Bolle2013-05-081-20/+2
| | | | | | | | | | | | | | | | | | The support for PB1100, PB1500, and PB1550 got merged into the code for DB1000 and DB1550 code in v3.7. When that was done the three related Kconfig symbols were dropped. But not all related Kconfig macros were removed. Do so now. Note that the PB1100 code in the Au1100 LCD driver is removed entirely and not converted to use its current Kconfig macro. That is done because the macros it uses (PB1100_G_CONTROL, PB1100_G_CONTROL_BL, and PB1100_G_CONTROL_VDD) are never defined. Actually only one of these was ever defined (PB1100_G_CONTROL) but that define was removed in v2.6.34. So, as far as I can tell, this code could have never compiled. Signed-off-by: Paul Bolle <pebolle@tiscali.nl> Patchwork: http://patchwork.linux-mips.org/patch/5040/ Acked-by: John Crispin <blogic@openwrt.org>
* MIPS: Whitespace cleanup.Ralf Baechle2013-02-0117-169/+169
| | | | | | | | Having received another series of whitespace patches I decided to do this once and for all rather than dealing with this kind of patches trickling in forever. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Alchemy: Make 32kHz and r4k timer coexist peacefullyManuel Lauss2012-12-271-20/+5
| | | | | | | | | | | | | | | | Now that the r4k timer is registered no matter what, bump the rating of the Alchemy 32kHz timer so that it gets used when it is working, and fall back on the r4k when it isn't. This fixes a timer-related hang on platform with a working 32kHz timer (the better rated c0 timer stops while executing 'wait' leading to (almost) eternal sleep) and an oops on boot on platforms without a working 32kHz timer (due to double registration of the r4k timer). Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Cc: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/4728/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* USB: move common alchemy USB routines to arch/mips/alchemy/common.cFlorian Fainelli2012-10-222-1/+615
| | | | | | | | | | | | A previous patch converted the Alchemy platform to use the OHCI and EHCI platform drivers. As a result, all the common logic to handle USB present in drivers/usb/host/alchemy-common.c has no reason to remain here, so we move it to arch/mips/alchemy/common/usb.c which is a more appropriate place. This change was suggested by Manuel Lauss. Signed-off-by: Florian Fainelli <florian@openwrt.org> Acked-by: Alan Stern <stern@rowland.harvard.edu> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* MIPS: Alchemy: use the OHCI platform driverFlorian Fainelli2012-10-221-2/+33
| | | | | | | | | | | | | | | | | Convert the Alchemy platform to register the ohci-platform driver, now that the ohci-platform driver properly handles the specific ohci-au1xxx resume from suspend case. This also greatly simplifies the power_{on,off} callbacks and make them work on platform device id instead of checking the OHCI controller base address like what was done in ohci-au1xxx.c. Impacted defconfigs are also updated accordingly to select the OHCI platform driver. Signed-off-by: Florian Fainelli <florian@openwrt.org> Acked-by: Alan Stern <stern@rowland.harvard.edu> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* MIPS: Alchemy: use the ehci platform driverFlorian Fainelli2012-10-221-1/+22
| | | | | | | | | | | Use the ehci platform driver power_{on,suspend,off} callbacks to perform the USB block gate enabling/disabling as what the ehci-au1xxx.c driver does. Update the db1200 and db1300 defconfigs to now select the EHCI platform driver. Signed-off-by: Florian Fainelli <florian@openwrt.org> Acked-by: Alan Stern <stern@rowland.harvard.edu> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* MIPS: Alchemy: Merge PB1100/1500 support into DB1000 code.Manuel Lauss2012-10-115-413/+93
| | | | | | | | | | | | | The PB1100/1500 are similar to their DB-cousins but with a few more devices on the bus. This patch adds PB1100/1500 support to the existing DB1100/1500 code. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Cc: lnux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/4338/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Alchemy: merge PB1550 support into DB1550 codeManuel Lauss2012-10-115-292/+161
| | | | | | | | | | | | | | The PB1550 is more or less a DB1550 without the PCI IDE controller, a more complicated (read: configurable) Flash setup and some other minor changes. Like the DB1550 it can be automatically detected by reading the CPLD ID register bits. This patch adds PB1550 detection and setup to the DB1550 code. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/4337/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Alchemy: Single kernel for DB1200/1300/1550Manuel Lauss2012-10-118-91/+114
| | | | | | | | | | | | Combine support for the DB1200/PB1200, DB1300 and DB1550 boards into a single kernel image. defconfig-generated image verified on DB1200, DB1300 and DB1550. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/4335/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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