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* microblaze: Fix module loading on system with WB cacheMichal Simek2010-05-141-0/+2
| | | | | | | There is necessary to flush whole dcache. Icache work should be done in kernel/module.c. Signed-off-by: Michal Simek <monstr@monstr.eu>
* microblaze: export assembly functions used by modulesMichal Simek2010-05-133-0/+3
| | | | | | Export __strncpy_user, memory_size, ioremap_bot for modules. Signed-off-by: Michal Simek <monstr@monstr.eu>
* microblaze: Remove powerpc code from Microblaze portMichal Simek2010-05-131-1/+1
| | | | | | Remove eeh_add_device_tree_late which is powerpc specific code. Signed-off-by: Michal Simek <monstr@monstr.eu>
* microblaze: Remove compilation warnings in cache macroMichal Simek2010-05-131-1/+2
| | | | | | | | | | CC arch/microblaze/kernel/cpu/cache.o arch/microblaze/kernel/cpu/cache.c: In function '__invalidate_dcache_range_wb': arch/microblaze/kernel/cpu/cache.c:398: warning: ISO C90 forbids mixed declarations and code arch/microblaze/kernel/cpu/cache.c: In function '__flush_dcache_range_wb': arch/microblaze/kernel/cpu/cache.c:509: warning: ISO C90 forbids mixed declara Signed-off-by: Michal Simek <monstr@monstr.eu>
* microblaze: export assembly functions used by modulesSteven J. Magnani2010-05-131-0/+10
| | | | | | | | Modules that use copy_{to,from}_user(), memcpy(), and memset() fail to build in certain circumstances. Signed-off-by: Steven J. Magnani <steve@digidescorp.com> Signed-off-by: Michal Simek <monstr@monstr.eu>
* microblaze: fix get_user/put_user side-effectsSteven J. Magnani2010-05-131-18/+69
| | | | | | | | | | | | | | | The Microblaze implementations of get_user() and (MMU) put_user() evaluate the address argument more than once. This causes unexpected side-effects for invocations that include increment operators, i.e. get_user(foo, bar++). This patch also removes the distinction between MMU and noMMU put_user(). Without the patch: $ echo 1234567890 > /proc/sys/kernel/core_pattern $ cat /proc/sys/kernel/core_pattern 12345 Signed-off-by: Steven J. Magnani <steve@digidescorp.com>
* microblaze: re-enable interrupts before calling scheduleSteven J. Magnani2010-05-131-0/+2
| | | | | | | schedule() should not be called with interrupts disabled. Signed-off-by: Steven J. Magnani <steve@digidescorp.com> Signed-off-by: Michal Simek <monstr@monstr.eu>
* microblaze: Defconfig updateMichal Simek2010-05-062-13/+84
| | | | Signed-off-by: Michal Simek <monstr@monstr.eu>
* microblaze: Optimize CACHE_LOOP_LIMITS and CACHE_RANGE_LOOP macrosMichal Simek2010-05-061-27/+35
| | | | | | | | | | | | | | | | | | | | | | | 1. Remove CACHE_ALL_LOOP2 macro because it is identical to CACHE_ALL_LOOP 2. Change BUG_ON to WARN_ON 3. Remove end aligned from CACHE_LOOP_LIMITS. C implementation do not need aligned end address and ASM code do aligned in their macros 4. ASM optimized CACHE_RANGE_LOOP_1/2 macros needs to get aligned end address. Because end address is compound from start + size, end address is the first address which is exclude. Here is the corresponding code which describe it. + int align = ~(line_length - 1); + end = ((end & align) == end) ? end - line_length : end & align; a) end is aligned: it is necessary to subtruct line length because we don't want to work with next cacheline b) end address is not aligned: Just align it to be ready for ASM code. Signed-off-by: Michal Simek <monstr@monstr.eu>
* microblaze: Fix consistent-sync codeMichal Simek2010-05-061-1/+1
| | | | | | PCI_DMA_FROMDEVICE should call invalidation not flushing. Signed-off-by: Michal Simek <monstr@monstr.eu>
* microblaze: Define correct L1_CACHE_SHIFT valueMichal Simek2010-05-061-1/+1
| | | | | | | | | | | | | Microblaze cacheline length is configurable and current cpu uses two cacheline length 4 and 8. We are taking conservative maximum value to be sure that cacheline alignment is satisfied for all cases. Here is the calculation for cacheline lenght 8 32bit=4Byte values which is corresponding with SHIFT 5. Signed-off-by: Michal Simek <monstr@monstr.eu>
* microblaze: cpuinfo shows cache line lengthMichal Simek2010-05-061-4/+6
| | | | | | Show cache line length in /proc/cpuinfo. Signed-off-by: Michal Simek <monstr@monstr.eu>
* microblaze: Fix kmalloc alignment on non-coherent DMA platformsMichal Simek2010-05-061-0/+3
| | | | | | | | | | | | Based on PowerPC patche 52142e756e9bf6485d3d53596e8aff2e816a7253 PowerPC description: On platforms doing non-coherent DMA (4xx, 8xx, ...), it's important that the kmalloc minimum alignment is set to the cache line size, to avoid sharing cache lines between different objects, so that DMA to one of the objects doesn't corrupt the other. Signed-off-by: Michal Simek <monstr@monstr.eu>
* microblaze: Fix typo fault in cache codeMichal Simek2010-05-061-5/+5
| | | | | | Copy & paste error. Signed-off-by: Michal Simek <monstr@monstr.eu>
* microblaze: Fix consistent codeMichal Simek2010-05-063-92/+100
| | | | | | | | | | | | This patch fix consistent code which had problems with consistent_free function. I am not sure if we need to call flush_tlb_all after it but it keeps tlbs synced. I added noMMU and MMU version together. Uncached shadow feature is not tested. Signed-off-by: Michal Simek <monstr@monstr.eu>
* microblaze: pci-dma: use include/linux/dma-mapping.hMichal Simek2010-05-061-8/+0
| | | | | | | Based on af407c6db16aa9ca63559076dbe620220a822580 and f41b177157718abe9a93868bb76e47d4a6f3681d Signed-off-by: Michal Simek <monstr@monstr.eu>
* microblaze: page.h: Remove get_user_page and free_user_pageMichal Simek2010-05-061-5/+0
| | | | | | Remove ancient macros which are here from Linux-2.4 Signed-off-by: Michal Simek <monstr@monstr.eu>
* microblaze: Remove "cache" optimized copy_page functionMichal Simek2010-05-063-39/+2
| | | | | | | | | | | Current implementation doesn't handle dcache_line_length correctly that's why is better to use generic memcpy. Cache optimized function could be good way howto improve performance but must be based on benchmarking not blind function like this. Signed-off-by: Michal Simek <monstr@monstr.eu>
* microblaze: invoke oom-killer from page faultNick Piggin2010-05-061-9/+4
| | | | | | | | | | | | | As explained in commit 1c0fe6e3bd, we want to call the architecture independent oom killer when getting an unexplained OOM from handle_mm_fault, rather than simply killing current. Cc: microblaze-uclinux@itee.uq.edu.au Cc: Michal Simek <monstr@monstr.eu> Cc: linux-arch@vger.kernel.org Signed-off-by: Nick Piggin <npiggin@suse.de> Acked-by: David Rientjes <rientjes@google.com> Acked-by: Michal Simek <monstr@monstr.eu>
* microblaze: fix divide by zero exception messageRandy Dunlap2010-05-061-1/+1
| | | | | | | | | Fix divide exception message to say "divide by zero". Signed-off-by: Randy Dunlap <randy.dunlap@oracle.com> Cc: Michal Simek <monstr@monstr.eu> Cc: microblaze-uclinux@itee.uq.edu.au Signed-off-by: Michal Simek <monstr@monstr.eu>
* microblaze: Add isa_dma_bridge_buggy to dma.hMichal Simek2010-05-061-0/+6
| | | | | | It is necessary for several drivers. Signed-off-by: Michal Simek <monstr@monstr.eu>
* microblaze: Remove ancient codeMichal Simek2010-05-065-111/+0
| | | | | | I found several function which we don't use that's why I am removing them. Signed-off-by: Michal Simek <monstr@monstr.eu>
* microblaze: Quiet section mismatch warnings for MMU versionMichal Simek2010-05-062-15/+16
| | | | | | | | | | | | | Remove section mismatch - based on ppc aproach. WARNING: vmlinux.o(.text+0x64834): Section mismatch in reference from the function __pte_alloc_kernel() to the function .init.text:early_get_page() The function __pte_alloc_kernel() references the function __init early_get_page(). This is often because __pte_alloc_kernel lacks a __init annotation or the annotation of early_get_page is wrong. Signed-off-by: Michal Simek <monstr@monstr.eu>
* microblaze: Quiet section mismatch warningsSteven J. Magnani2010-05-062-2/+4
| | | | | | | | _start is located in .text, which causes mismatch warnings with machine_early_init() and start_kernel() in .init.text. Signed-off-by: Steven J. Magnani <steve@digidescorp.com> Signed-off-by: Michal Simek <monstr@monstr.eu>
* microblaze: Fix IRQ entry/exit ftracingSteven J. Magnani2010-05-061-1/+2
| | | | | | | | | | | | | | | | | Function traces on Microblaze don't include IRQ entry and exit arrows, i.e. 0) | memcpy_toiovec() { 0) ==========> | 0) | do_IRQ() { ... 0) <========== | 0) ! 5414.000 us | } ...because do_IRQ() doesn't have the proper attributes. Signed-off-by: Steven J. Magnani <steve@digidescorp.com> Signed-off-by: Michal Simek <monstr@monstr.eu>
* microblaze: resource/PCI: align functions now return start of resourceMichal Simek2010-05-061-7/+6
| | | | | | | | | | | | | | This change should be part of b26b2d494b659f988b4d75eb394dfa0ddac415c9 Origin description: resource/PCI: align functions now return start of resource As suggested by Linus, align functions should return the start of a resource, not void. An update of "res->start" is no longer necessary. Signed-off-by: Michal Simek <monstr@monstr.eu>
* microblaze: PCI: add pci_bus_for_each_resource(), remove direct ↵Michal Simek2010-05-061-2/+2
| | | | | | | | | | | | | | | | | | | bus->resource[] refs This change should be part of 89a74ecccd1f78e51faf6287e5c0e93a92ac096e Origin description: PCI: add pci_bus_for_each_resource(), remove direct bus->resource[] refs No functional change; this converts loops that iterate from 0 to PCI_BUS_NUM_RESOURCES through pci_bus resource[] table to use the pci_bus_for_each_resource() iterator instead. This doesn't change the way resources are stored; it merely removes dependencies on the fact that they're in a table. Signed-off-by: Michal Simek <monstr@monstr.eu>
* microblaze: Remove unused variable from ptraceMichal Simek2010-04-071-1/+0
| | | | | | Patch b3c1e01a09d6af2dd7811a066ffcfc5171be2bed should do it. Signed-off-by: Michal Simek <monstr@monstr.eu>
* microblaze: io.h: Add io big-endian functionJohn Linn2010-04-071-0/+5
| | | | | | | | Add new io big-endian function. They will be used for uartlite and spi driver. Signed-off-by: John Linn <john.linn@xilinx.com> Signed-off-by: Michal Simek <monstr@monstr.eu>
* microblaze: Fix futex codeMichal Simek2010-04-071-1/+1
| | | | | | Use logical and NOT for ANDN. It was likely type fault. Signed-off-by: Michal Simek <monstr@monstr.eu>
* microblaze: Fix ftrace_update_ftrace_func panicSteven J. Magnani2010-04-071-9/+3
| | | | | | | | | | | | | | | | | | The Microblaze dynamic ftrace code assumes a call ordering that is not met in all scenarios. Specifically, executing a command similar to: echo 105 > /sys/kernel/debug/tracing/set_ftrace_pid before any other tracing-related commands results in a kernel panic: BUG: failure at arch/microblaze/kernel/ftrace.c:198/ftrace_update_ftrace_func()! Recoding ftrace_update_ftrace_func() to use &ftrace_caller directly eliminates the need to capture its address elsewhere (and thus rely on a particular call sequence). Signed-off-by: Steven J. Magnani <steve@digidescorp.com> Signed-off-by: Michal Simek <monstr@monstr.eu>
* Merge branch 'master' into export-slabhTejun Heo2010-04-0524-446/+407
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| * microblaze: Support word copying in copy_tofrom_userMichal Simek2010-04-011-14/+25
| | | | | | | | | | | | | | | | Word copying is used only for aligned addresses. Here is space for improving to use any better copying technique. Look at memcpy implementation. Signed-off-by: Michal Simek <monstr@monstr.eu>
| * microblaze: Print early printk information to log bufferMichal Simek2010-04-011-9/+15
| | | | | | | | | | | | | | If early printk console is not enabled then all messages are written to log buffer. Signed-off-by: Michal Simek <monstr@monstr.eu>
| * microblaze: head.S typo fixMichal Simek2010-04-011-2/+2
| | | | | | | | | | | | I forget to change register name in comments. Signed-off-by: Michal Simek <monstr@monstr.eu>
| * microblaze: Use MICROBLAZE_TLB_SIZE in asm codeMichal Simek2010-04-012-3/+3
| | | | | | | | | | | | | | TLB size was hardcoded in asm code. This patch brings ability to change TLB size only in one place. (mmu.h). Signed-off-by: Michal Simek <monstr@monstr.eu>
| * microblaze: Kconfig Fix - pciMichal Simek2010-04-011-3/+0
| | | | | | | | | | | | I forget to remove pci Kconfig option. Signed-off-by: Michal Simek <monstr@monstr.eu>
| * microblaze: Adding likely macrosMichal Simek2010-04-016-26/+28
| | | | | | | | | | | | | | On the base on GCOV analytics is helpful to add likely/unlikely macros. Signed-off-by: Michal Simek <monstr@monstr.eu>
| * microblaze: Add .type and .size to ASM functionsMichal Simek2010-04-013-1/+22
| | | | | | | | | | | | Cachegrind analysis need this fix to be able to log asm functions. Signed-off-by: Michal Simek <monstr@monstr.eu>
| * microblaze: Fix TLB macrosMichal Simek2010-04-011-1/+2
| | | | | | | | | | | | To be able to do trace TLB operations. Signed-off-by: Michal Simek <monstr@monstr.eu>
| * microblaze: Use instruction with delay slotMichal Simek2010-04-011-8/+5
| | | | | | | | | | | | Sync labels. Signed-off-by: Michal Simek <monstr@monstr.eu>
| * microblaze: Remove additional resr and rear loadingMichal Simek2010-04-011-15/+3
| | | | | | | | | | | | RESR and REAR uses the same regs in whole file. Signed-off-by: Michal Simek <monstr@monstr.eu>
| * microblaze: Change register usage for ESR and EARMichal Simek2010-04-011-35/+35
| | | | | | | | | | | | | | | | This change synchronize register usage in code. ESR = R4 EAR = R3 Signed-off-by: Michal Simek <monstr@monstr.eu>
| * microblaze: Prepare work for optimization in exception codeMichal Simek2010-04-011-6/+3
| | | | | | | | | | | | Any sync branch must follow mts instructions not mfs. Signed-off-by: Michal Simek <monstr@monstr.eu>
| * microblaze: Add DEBUG optionMichal Simek2010-04-011-0/+2
| | | | | | | | | | | | Disable debug option in asm code. Signed-off-by: Michal Simek <monstr@monstr.eu>
| * microblaze: Support systems without lmb bramMichal Simek2010-04-011-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When the system has no lmb bram, main memory should be start from zero because of microblaze vectors. DTS fragment could look like: DDR2_SDRAM: memory@0 { device_type = "memory"; reg = < 0x0 0x10000000 >; } ; Then you have to setup CONFIG_KERNEL_BASE_ADDR=0 which caused that kernel physical start address will be zero. On reset vector place will be jump to 0x100 and on 0x100 starts kernel text. You have to solve how to load the kernel before cpu starts. Tested with XMD. Signed-off-by: Michal Simek <monstr@monstr.eu>
| * microblaze: uaccess: Sync strlen, strnlen, copy_to/from_userMichal Simek2010-04-011-56/+32
| | | | | | | | | | | | Last sync. Signed-off-by: Michal Simek <monstr@monstr.eu>
| * microblaze: uaccess: Unify __copy_tofrom_userMichal Simek2010-04-012-39/+22
| | | | | | | | | | | | Move to generic location. Signed-off-by: Michal Simek <monstr@monstr.eu>
| * microblaze: uaccess: Move functions to generic locationMichal Simek2010-04-013-200/+61
| | | | | | | | | | | | noMMU and MMU use them. Signed-off-by: Michal Simek <monstr@monstr.eu>
| * microblaze: uaccess: Fix put_user for noMMUMichal Simek2010-04-011-22/+56
| | | | | | | | | | | | | | | | Here is small regression on dhrystone tests and I think that on all benchmarking tests. It is due to better checking mechanism in put_user macro Signed-off-by: Michal Simek <monstr@monstr.eu>
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