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* Merge tag 'metag-for-v3.11' of ↵Linus Torvalds2013-07-064-2/+13
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/jhogan/metag Pull Metag architecture changes from James Hogan: - Infrastructure and DT files for TZ1090 SoC (pin control drivers already merged via pinctrl tree). - Panic on boot instead of just warning if cache aliasing possible. - Various SMP/hotplug fixes. - Various other randconfig/sparse fixes. * tag 'metag-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/jhogan/metag: (24 commits) metag: move EXPORT_SYMBOL(csum_partial) to metag_ksyms.c metag: cpu hotplug: route_irq: preserve irq mask metag: kick: add missing irq_enter/exit to kick_handler() metag: smp: don't spin waiting for CPU to start metag: smp: enable irqs after set_cpu_online metag: use clear_tasks_mm_cpumask() metag: tz1090: select and instantiate pinctrl-tz1090-pdc metag: tz1090: select and instantiate pinctrl-tz1090 metag: don't check for cache aliasing on smp cpu boot metag: panic if cache aliasing possible metag: *.dts: include using preprocessor metag: add <dt-bindings/> symlink metag/.gitignore: Extend the *.dtb pattern to match the dtb.S files metag/traps: include setup.h for the per_cpu_trap_init declaration metag/traps: Mark die() as __noreturn to match the declaration. metag/processor.h: Add missing cpuinfo_op declaration. metag/setup: Restrict scope for the capabilities variable metag/mm/cache: Restrict scope for metag_lnkget_probe metag/asm/irq.h: Declare init_IRQ metag/kernel/irq.c: Declare root_domain as static ...
| * metag/traps: Mark die() as __noreturn to match the declaration.Markos Chandras2013-06-131-2/+2
| | | | | | | | | | Signed-off-by: Markos Chandras <markos.chandras@imgtec.com> Signed-off-by: James Hogan <james.hogan@imgtec.com>
| * metag/processor.h: Add missing cpuinfo_op declaration.Markos Chandras2013-06-131-0/+2
| | | | | | | | | | Signed-off-by: Markos Chandras <markos.chandras@imgtec.com> Signed-off-by: James Hogan <james.hogan@imgtec.com>
| * metag/asm/irq.h: Declare init_IRQMarkos Chandras2013-06-131-0/+1
| | | | | | | | | | | | | | | | | | Fixes the following sparce warning: warning: symbol 'init_IRQ' was not declared. Should it be static? Signed-off-by: Markos Chandras <markos.chandras@imgtec.com> Signed-off-by: James Hogan <james.hogan@imgtec.com>
| * metag: init common clk and use "core" clkJames Hogan2013-06-131-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the common clock framework is enabled, call of_clk_init(NULL) in time_init() to register device tree clocks with the clock framework. After this time_init() calls a new function init_metag_clocks(), which looks for a clock named "core" in the node compatible with "img,meta" (usually the root node). If found the get_core_freq machine callback is overridden to obtain the core clock frequency using that clock. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Mike Turquette <mturquette@linaro.org> Cc: Grant Likely <grant.likely@linaro.org> Cc: Rob Herring <rob.herring@calxeda.com> Cc: devicetree-discuss@lists.ozlabs.org
* | Merge branch 'for-linus' of ↵Linus Torvalds2013-07-021-3/+0
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs Pull VFS patches (part 1) from Al Viro: "The major change in this pile is ->readdir() replacement with ->iterate(), dealing with ->f_pos races in ->readdir() instances for good. There's a lot more, but I'd prefer to split the pull request into several stages and this is the first obvious cutoff point." * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs: (67 commits) [readdir] constify ->actor [readdir] ->readdir() is gone [readdir] convert ecryptfs [readdir] convert coda [readdir] convert ocfs2 [readdir] convert fatfs [readdir] convert xfs [readdir] convert btrfs [readdir] convert hostfs [readdir] convert afs [readdir] convert ncpfs [readdir] convert hfsplus [readdir] convert hfs [readdir] convert befs [readdir] convert cifs [readdir] convert freevxfs [readdir] convert fuse [readdir] convert hpfs reiserfs: switch reiserfs_readdir_dentry to inode reiserfs: is_privroot_deh() needs only directory inode, actually ...
| * | consolidate io_remap_pfn_range definitionsAl Viro2013-06-291-3/+0
| |/ | | | | | | Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
* | metag: fix mm/hugetlb.c build breakageJames Hogan2013-06-191-0/+1
|/ | | | | | | | | | | | | | | | | | | | | Commit 106c992a5ebe ("mm/hugetlb: add more arch-defined huge_pte functions") added an include of <asm-generic/hugetlb.h> to each architecture's <asm/hugetlb.h> (except s390). Unfortunately metag was missed which resulted in build errors when hugetlbfs is enabled (see below). Add the include for metag too to fix the build errors: mm/hugetlb.c In function 'make_huge_pte': mm/hugetlb.c +2250 : error: implicit declaration of function 'huge_pte_mkwrite' mm/hugetlb.c +2250 : error: implicit declaration of function 'huge_pte_mkdirty' ... Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Gerald Schaefer <gerald.schaefer@de.ibm.com> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Michal Hocko <mhocko@suse.cz> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* Merge tag 'metag-for-v3.10-rc1' of ↵Linus Torvalds2013-04-303-0/+19
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/jhogan/metag Pull arch/metag update from James Hogan: - Various fixes for the interrupting perf counter handling in metag's perf backend. - Add OProfile support based on perf. - Sets up cache partitions for SMP so bootloader doesn't have to. - Patch from Paul Bolle to remove ARCH_POPULATES_NODE_MAP again (touches microblaze too). - Add TLS pointer regset to metag ptrace api. - Add exported metag DSP extended context handling header <asm/ech.h>. - Increase defconfig log buffer size to 128KiB. - Various fixes, typos, missing exports. * tag 'metag-for-v3.10-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/jhogan/metag: metag: defconfigs: increase log buffer 8KiB => 128KiB metag: avoid unnecessary builtin dtb rebuilds metag: add exported <asm/ech.h> for extended context handling metag: export _metag_da_present and cpu_2_hwthread_id metag: ptrace: Implement NT_METAG_TLS memblock: Kill ARCH_POPULATES_NODE_MAP once more metag: cachepart: fix get_global_dcache_size() typo metag: cachepart: take into account small cache bits metag: smp: copy cache partition and enable GCOn metag: OProfile support metag: perf: prepare for use by oprofile metag: perf: don't reset TXTACTCYC metag: perf: use hard_processor_id() to get thread metag: perf: fix frequency sampling (dynamic period) metag: perf: add missing prev_count updates metag: perf: fixes for interrupting perf counters metag: perf: fix wrap handling in delta calculation metag: perf: fix core internal / perf channel mux
| * metag: add exported <asm/ech.h> for extended context handlingJames Hogan2013-03-272-0/+16
| | | | | | | | | | | | | | | | | | | | | | Add an exported header file <asm/ech.h> containing the definitions of some bits which can be set in D0.8 to indicate to the kernel that certain DSP state should be preserved. The definitions have the same names and values as the ones in the kernel-internal <asm/tbx.h>, to make it easier for DSP assembly code to be compatible between Linux and non-Linux operating systems. Signed-off-by: James Hogan <james.hogan@imgtec.com>
| * metag: smp: copy cache partition and enable GCOnJames Hogan2013-03-151-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When starting an SMP hardware thread, copy the cache partition configuration so that the threads share the same cache partitions. Also enable the GCOn bit if running in the local half of the virtual address space to enable coherency of shared local cache partitions. An atomic unlock system event is executed by the new cpu before any memory is read to ensure that any writes made by the boot cpu prior to full coherency taking effect are visible to the new cpu. This is to allow SMP to work even when the bootloader hasn't configured the caches for coherency. A log message is printed to describe the cache partition changes so that the user is aware of potential unintentional cache wastage if they've configured the cache partitions in the wrong way. Signed-off-by: James Hogan <james.hogan@imgtec.com>
* | arch: Consolidate tsk_is_polling()Thomas Gleixner2013-04-081-2/+0
|/ | | | | | | | | | | | | | | Move it to a common place. Preparatory patch for implementing set/clear for the idle need_resched poll implementation. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Rusty Russell <rusty@rustcorp.com.au> Cc: Paul McKenney <paulmck@linux.vnet.ibm.com> Cc: Peter Zijlstra <peterz@infradead.org> Reviewed-by: Cc: Srivatsa S. Bhat <srivatsa.bhat@linux.vnet.ibm.com> Cc: Magnus Damm <magnus.damm@gmail.com> Link: http://lkml.kernel.org/r/20130321215233.446034505@linutronix.de Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* metag: remove SET_PERSONALITY()James Hogan2013-03-041-3/+0
| | | | | | | | | | | Commit e72837e3e7bae3f182c4ac63c9424e86f1158dd0 ("default SET_PERSONALITY() in linux/elf.h"). The above commit moved the common definition of SET_PERSONALITY() in a bunch of the arch headers to linux/elf.h. Metag shares that common definition so remove it from arch/metag/include/asm/elf.h too. Signed-off-by: James Hogan <james.hogan@imgtec.com>
* metag: Provide dma_get_sgtable()James Hogan2013-03-021-0/+7
| | | | | | | | | | | | | | | | | metag/allmodconfig: drivers/media/v4l2-core/videobuf2-dma-contig.c: In function 'vb2_dc_get_base_sgt': drivers/media/v4l2-core/videobuf2-dma-contig.c:387: error: implicit declaration of function 'dma_get_sgtable' For architectures using dma_map_ops, dma_get_sgtable() is provided in <asm-generic/dma-mapping-common.h>. Metag does not use dma_map_ops yet, hence it should implement it as an inline stub using dma_common_get_sgtable(). Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Geert Uytterhoeven <geert@linux-m68k.org> Acked-by: Marek Szyprowski <m.szyprowski@samsung.com>
* metag: prom.h: remove declaration of metag_dt_memblock_reserve()James Hogan2013-03-021-1/+0
| | | | | | | Metag doesn't have a metag_dt_memblock_reserve() function so remove the declaration from asm/prom.h. Signed-off-by: James Hogan <james.hogan@imgtec.com>
* metag: copy devicetree to non-init memoryJames Hogan2013-03-021-0/+1
| | | | | | | | | | | | | Make a copy of the device tree blob in non-init memory. It is required when using built-in device tree files that the platform code copies the blob to non-init memory prior to calling unflatten_device_tree(), otherwise the strings that the device tree refer to will get poisoned and potentially reused, breaking later reading of the device tree post-init (such as compatible matching in modules, debugfs, and the procfs interface). Signed-off-by: James Hogan <james.hogan@imgtec.com> Reviewed-by: Vineet Gupta <vgupta@synopsys.com>
* metag: move irq enable out of irqflags.h on SMPJames Hogan2013-03-021-6/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | The SMP version of arch_local_irq_enable() uses preempt_disable(), but <asm/irqflags.h> doesn't include <linux/preempt.h> causing the following errors on SMP when pstore/ftrace is enabled (caught by buildbot smp allyesconfig): In file included from include/linux/irqflags.h:15, from fs/pstore/ftrace.c:16: arch/metag/include/asm/irqflags.h: In function 'arch_local_irq_enable': arch/metag/include/asm/irqflags.h:84: error: implicit declaration of function 'preempt_disable' arch/metag/include/asm/irqflags.h:86: error: implicit declaration of function 'preempt_enable_no_resched' However <linux/preempt.h> cannot be easily included from <asm/irqflags.h> as it can cause circular include dependencies in the !SMP case, and potentially in the SMP case in the future. Therefore move the SMP implementation of arch_local_irq_enable() into traps.c and use an inline version of get_trigger_mask() which is also defined in traps.c for SMP. This adds an extra layer of function call / stack push when preempt_disable needs to call other functions, however in the non-preemptive SMP case it should be about as fast, as it was already calling the get_trigger_mask() function which is now used inline. Signed-off-by: James Hogan <james.hogan@imgtec.com>
* metag: protect more non-MMU memory regionsJames Hogan2013-03-021-1/+1
| | | | | | | | | | | | | | Rename setup_txprivext() to setup_priv() and add initialisation of some more per-thread privilege protection registers: - TxPRIVSYSR: 0x04400000-0x047fffff 0x05000000-0x07ffffff 0x84000000-0x87ffffff - TxPIOREG: 0x02000000-0x02ffffff 0x04800000-0x048fffff - TxSYREG: 0x04000000-0x04000fff (except write fetch system event) Signed-off-by: James Hogan <james.hogan@imgtec.com>
* metag: make TXPRIVEXT bits explicitJames Hogan2013-03-021-0/+4
| | | | | | | | | Define PRIV_BITS using explicit constants from <asm/metag_regs.h> rather than with a hard coded value. This also adds a couple of missing definitions for the TXPRIVEXT priv bits for protecting writes to TXTIMER and the trace registers. Signed-off-by: James Hogan <james.hogan@imgtec.com>
* metag: Add JTAG Debug Adapter (DA) supportJames Hogan2013-03-021-0/+43
| | | | | | | | | | | | Add basic JTAG Debug Adapter (DA) support so that drivers which communicate with the DA can detect whether one is actually present (otherwise the target will halt indefinitely). This allows the metag_da TTY driver and imgdafs filesystem driver to be built, updates defconfigs, and sets up the metag_da console early if it's configured in. Signed-off-by: James Hogan <james.hogan@imgtec.com>
* metag: ftrace supportJames Hogan2013-03-022-1/+23
| | | | | | | | | Add ftrace support for metag. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Frederic Weisbecker <fweisbec@gmail.com> Cc: Ingo Molnar <mingo@redhat.com> Reviewed-by: Steven Rostedt <rostedt@goodmis.org>
* metag: PerfJames Hogan2013-03-021-0/+4
| | | | | | | | | | Add Perf support for metag. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Paul Mackerras <paulus@samba.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Arnaldo Carvalho de Melo <acme@ghostprotocols.net>
* metag: Build infrastructureJames Hogan2013-03-022-0/+68
| | | | | | Add metag build infrastructure. Signed-off-by: James Hogan <james.hogan@imgtec.com>
* metag: Various other headersJames Hogan2013-03-0211-0/+526
| | | | | | | | | Add the remaining metag header files: - byteorder.h, swab.h (byte order and swapping) - barrier.h, cpu.h. hwthread.h, processor.h (hardware thread related) - bug.h, elf.h, gpio.h, linkage.h, resource.h (other) Signed-off-by: James Hogan <james.hogan@imgtec.com>
* metag: Stack unwindingJames Hogan2013-03-021-0/+20
| | | | | | Add stack unwinding support for metag. Signed-off-by: James Hogan <james.hogan@imgtec.com>
* metag: Optimised library functionsJames Hogan2013-03-023-0/+117
| | | | | | Add optimised library functions for metag. Signed-off-by: James Hogan <james.hogan@imgtec.com>
* metag: DMAJames Hogan2013-03-021-0/+183
| | | | | | Add DMA mapping code. Signed-off-by: James Hogan <james.hogan@imgtec.com>
* metag: SMP supportJames Hogan2013-03-024-0/+159
| | | | | | | | Add SMP support for metag. This allows Linux to take control of multiple hardware threads on a single Meta core, treating them as separate Linux CPUs. Signed-off-by: James Hogan <james.hogan@imgtec.com>
* metag: Atomics, locks and bitopsJames Hogan2013-03-0213-0/+1395
| | | | | | | | | | | | | | | | | | | | | | Add header files to implement Meta hardware thread locks (used by some other atomic operations), atomics, spinlocks, and bitops. There are 2 main types of atomic primitives for metag (in addition to IRQs off on UP): - LOCK instructions provide locking between hardware threads. - LNKGET/LNKSET instructions provide load-linked/store-conditional operations allowing for lighter weight atomics on Meta2 LOCK instructions allow for hardware threads to acquire voluntary or exclusive hardware thread locks: - LOCK0 releases exclusive and voluntary lock from the running hardware thread. - LOCK1 acquires the voluntary hardware lock, blocking until it becomes available. - LOCK2 implies LOCK1, and additionally acquires the exclusive hardware lock, blocking all other hardware threads from executing. Signed-off-by: James Hogan <james.hogan@imgtec.com>
* metag: Module supportJames Hogan2013-03-021-0/+37
| | | | Signed-off-by: James Hogan <james.hogan@imgtec.com>
* metag: Scheduling/Process managementJames Hogan2013-03-021-0/+155
| | | | Signed-off-by: James Hogan <james.hogan@imgtec.com>
* metag: System CallsJames Hogan2013-03-026-0/+231
| | | | | | | | | | | | | Add metag system call and gateway page interfaces. The metag architecture port uses the generic system call numbers from asm-generic/unistd.h, as well as a user gateway page mapped at 0x6ffff000 which contains fast atomic primitives (depending on SMP) and a fast method of accessing TLS data. System calls use the SWITCH instruction with the immediate 0x440001 to signal a system call. Signed-off-by: James Hogan <james.hogan@imgtec.com>
* metag: IRQ handlingJames Hogan2013-03-022-0/+126
| | | | | | | Add core IRQ handling for metag. The code in irq.c exposes the TBX signal numbers as Linux IRQs. Signed-off-by: James Hogan <james.hogan@imgtec.com>
* metag: TrapsJames Hogan2013-03-022-0/+69
| | | | | | | | | | | | | Add trap code for metag. At the lowest level Meta traps (and return from interrupt instruction - RTI) simply swap the PC and PCX registers and optionally toggle the interrupt status bit (ISTAT). Low level TBX code in tbipcx.S handles the core context save, determine the TBX signal number based on the core trigger that fired (using the TXSTATI status register), and call TBX signal handlers (mostly in traps.c) via a vector table. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Al Viro <viro@zeniv.linux.org.uk>
* metag: Time keepingJames Hogan2013-03-023-0/+84
| | | | | | | | | | | Add time keeping code for metag. Meta hardware threads have 2 timers. The background timer (TXTIMER) is used as a free-running time base, and the interrupt timer (TXTIMERI) is used for the timer interrupt. Both counters traditionally count at approximately 1MHz. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: John Stultz <johnstul@us.ibm.com> Cc: Thomas Gleixner <tglx@linutronix.de>
* metag: ptraceJames Hogan2013-03-022-0/+173
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ptrace interface for metag provides access to some core register sets using the PTRACE_GETREGSET and PTRACE_SETREGSET operations. The details of the internal context structures is abstracted into user API structures to both ease use and allow flexibility to change the internal context layouts. Copyin and copyout functions for these register sets are exposed to allow signal handling code to use them to copy to and from the signal context. struct user_gp_regs (NT_PRSTATUS) provides access to the core general purpose register context. struct user_cb_regs (NT_METAG_CBUF) provides access to the TXCATCH* registers which contains information abuot a memory fault, unaligned access error or watchpoint. This can be modified to alter the way the fault is replayed on resume ("catch replay"), or to prevent the replay taking place. struct user_rp_state (NT_METAG_RPIPE) provides access to the state of the Meta read pipeline which can be used to hide memory latencies in hand optimised data loops. Extended DSP register state, DSP RAM, and hardware breakpoint registers aren't yet exposed through ptrace. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Denys Vlasenko <vda.linux@googlemail.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Tony Lindgren <tony@atomide.com> Cc: "Paul E. McKenney" <paulmck@linux.vnet.ibm.com>
* metag: Device treeJames Hogan2013-03-021-0/+23
| | | | | | | Add device tree files to arch/metag. Signed-off-by: James Hogan <james.hogan@imgtec.com> Reviewed-by: Vineet Gupta <vgupta@synopsys.com>
* metag: Signal handlingJames Hogan2013-03-022-0/+39
| | | | | | | Add signal handling code for metag. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Al Viro <viro@zeniv.linux.org.uk>
* metag: TCM supportJames Hogan2013-03-023-0/+85
| | | | | | Add some TCM support Signed-off-by: James Hogan <james.hogan@imgtec.com>
* metag: Highmem supportJames Hogan2013-03-022-0/+161
| | | | Signed-off-by: James Hogan <james.hogan@imgtec.com>
* metag: Huge TLBJames Hogan2013-03-021-0/+86
| | | | | | Add huge TLB support to the metag architecture. Signed-off-by: James Hogan <james.hogan@imgtec.com>
* metag: Memory handlingJames Hogan2013-03-022-0/+406
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Meta has instructions for accessing: - bytes - GETB (1 byte) - words - GETW (2 bytes) - doublewords - GETD (4 bytes) - longwords - GETL (8 bytes) All accesses must be aligned. Unaligned accesses can be detected and made to fault on Meta2, however it isn't possible to fix up unaligned writes so we don't bother fixing up reads either. This patch adds metag memory handling code including: - I/O memory (io.h, ioremap.c): Actually any virtual memory can be accessed with these helpers. A part of the non-MMUable address space is used for memory mapped I/O. The ioremap() function is implemented one to one for non-MMUable addresses. - User memory (uaccess.h, usercopy.c): User memory is directly accessible from privileged code. - Kernel memory (maccess.c): probe_kernel_write() needs to be overwridden to use the I/O functions when doing a simple aligned write to non-writecombined memory, otherwise the write may be split by the generic version. Note that due to the fact that a portion of the virtual address space is non-MMUable, and therefore always maps directly to the physical address space, metag specific I/O functions are made available (metag_in32, metag_out32 etc). These cast the address argument to a pointer so that they can be used with raw physical addresses. These accessors are only to be used for accessing fixed core Meta architecture registers in the non-MMU region, and not for any SoC/peripheral registers. Signed-off-by: James Hogan <james.hogan@imgtec.com>
* metag: Memory managementJames Hogan2013-03-025-0/+767
| | | | | | | | | | | | | | | | | | | | | | | | Add memory management files for metag. Meta's 32bit virtual address space is split into two halves: - local (0x08000000-0x7fffffff): traditionally local to a hardware thread and incoherent between hardware threads. Each hardware thread has it's own local MMU table. On Meta2 the local space can be globally coherent (GCOn) if the cache partitions coincide. - global (0x88000000-0xffff0000): coherent and traditionally global between hardware threads. On Meta2, each hardware thread has it's own global MMU table. The low 128MiB of each half is non-MMUable and maps directly to the physical address space: - 0x00010000-0x07ffffff: contains Meta core registers and maps SoC bus - 0x80000000-0x87ffffff: contains low latency global core memories Linux usually further splits the local virtual address space like this: - 0x08000000-0x3fffffff: user mappings - 0x40000000-0x7fffffff: kernel mappings Signed-off-by: James Hogan <james.hogan@imgtec.com>
* metag: Cache/TLB handlingJames Hogan2013-03-025-0/+644
| | | | | | | | | | | | | | | | | Add cache and TLB handling code for metag, including the required callbacks used by MM switches and DMA operations. Caches can be partitioned between the hardware threads and the global space, however this is usually configured by the bootloader so Linux doesn't make any changes to this configuration. TLBs aren't configurable, so only need consideration to flush them. On Meta1 the L1 cache was VIVT which required a full flush on MM switch. Meta2 has a VIPT L1 cache so it doesn't require the full flush on MM switch. Meta2 can also have a writeback L2 with hardware prefetch which requires some special handling. Support is optional, and the L2 can be detected and initialised by Linux. Signed-off-by: James Hogan <james.hogan@imgtec.com>
* metag: TBX headerJames Hogan2013-03-021-0/+1425
| | | | | | | Add the main header for the Thread Binary Interface (TBI) library which provides useful low level operations and trap/context management. Signed-off-by: James Hogan <james.hogan@imgtec.com>
* metag: BootJames Hogan2013-03-022-0/+90
| | | | | | | | | | | | | | | | Add boot code for metag. Due to the multi-threaded nature of Meta it is not uncommon for an RTOS or bare metal application to be started on other hardware threads by the bootloader. Since there is a single MMU switch which affects all threads, the MMU is traditionally configured by the bootloader prior to starting Linux. The bootloader passes a structure to Linux which among other things contains information about memory regions which have been mapped. Linux then assumes control of the local heap memory region. A kernel arguments string pointer or a flattened device tree pointer can be provided in the third argument. Signed-off-by: James Hogan <james.hogan@imgtec.com>
* metag: Header for core memory mapped registersJames Hogan2013-03-021-0/+1106
| | | | | | | Add the header <asm/metag_mem.h> describing addresses, fields, and bits of various core memory mapped registers in the low non-MMU region. Signed-off-by: James Hogan <james.hogan@imgtec.com>
* metag: Headers for core arch constantsJames Hogan2013-03-022-0/+1261
Add a couple of header files containing core architecture constants. The first (<asm/metag_isa.h>) contains some constants relating to the instruction set, such as values to give to the CACHEW and CACHER instructions. The second (<asm/metag_regs.h>) contains constants for the core register units directly accessible to various instructions, and for the registers, fields, and bits in those units. The main units described are the control unit (CT.*), the trigger unit (TR.*), and the run-time trace unit (TT.*). Signed-off-by: James Hogan <james.hogan@imgtec.com>
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