| Commit message (Collapse) | Author | Age | Files | Lines |
|---|
| |
|
|
|
|
|
|
|
| |
The older simple ColdFire interrupt controller has no one-to-one mapping
of interrupt numbers to bits in the interrupt mask register. Create a
mapping array that each ColdFire CPU type can populate with its available
interrupts and the bits that each use in the interrupt mask register.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
|
| |
|
|
|
|
|
|
|
|
| |
Currently the code that supports setting the old style ColdFire interrupt
controller mask registers is macros in the include files of each of the
CPU types. Merge all these into a set of real masking functions in the
old Coldfire interrupt controller code proper. All the macros are basically
the same (excepting a register size difference on really early parts).
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
|
|
|
Create an mcfintc.h include file with the definitions for the old style
ColdFire interrupt controller. They are only needed on CPU's that use
this old controller - so isolate them on their own.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
|
