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* Merge linux-2.6 with linux-acpi-2.6Len Brown2005-09-0816-504/+120
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| * [PATCH] bogus #if (simserial)viro@ZenIV.linux.org.uk2005-09-071-1/+1
| | | | | | | | | | Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
| * [PATCH] kprobes: fix bug when probed on task and isr functionsKeshavamurthy Anil S2005-09-071-3/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes a race condition where in system used to hang or sometime crash within minutes when kprobes are inserted on ISR routine and a task routine. The fix has been stress tested on i386, ia64, pp64 and on x86_64. To reproduce the problem insert kprobes on schedule() and do_IRQ() functions and you should see hang or system crash. Signed-off-by: Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com> Signed-off-by: Ananth N Mavinakayanahalli <ananth@in.ibm.com> Acked-by: Prasanna S Panchamukhi <prasanna@in.ibm.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
| * [PATCH] Kprobes/IA64: fix race when break hits and kprobe not foundKeshavamurthy Anil S2005-09-071-0/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch addresses a potential race condition for a case where Kprobe has been removed right after another CPU has taken a break hit. The way this is addressed here is when the CPU that has taken a break hit does not find its corresponding kprobe, then we check to see if the original instruction got replaced with other than break. If it got replaced with other than break instruction, then we continue to execute from the replaced instruction, else if we find that it is still a break, then we let the kernel handle this, as this might be the break instruction inserted by other than kprobe(may be kernel debugger). Signed-off-by: Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
| * [PATCH] Kprobes: prevent possible race conditions ia64 changesPrasanna S Panchamukhi2005-09-076-27/+41
| | | | | | | | | | | | | | | | | | This patch contains the ia64 architecture specific changes to prevent the possible race conditions. Signed-off-by: Prasanna S Panchamukhi <prasanna@in.ibm.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
| * [PATCH] IA64: convert kcalloc to kzallocPekka Enberg2005-09-073-6/+6
| | | | | | | | | | | | | | | | | | This patch converts kcalloc(1, ...) calls to use the new kzalloc() function. Signed-off-by: Pekka Enberg <penberg@cs.helsinki.fi> Cc: "Luck, Tony" <tony.luck@intel.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
| * [PATCH] remove duplicated sys_open32() code from 64bit archsMiklos Szeredi2005-09-072-32/+1
| | | | | | | | | | | | | | | | | | | | | | | | 64 bit architectures all implement their own compatibility sys_open(), when in fact the difference is simply not forcing the O_LARGEFILE flag. So use the a common function instead. Signed-off-by: Miklos Szeredi <miklos@szeredi.hu> Cc: <viro@parcelfarce.linux.theplanet.co.uk> Cc: Christoph Hellwig <hch@lst.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
| * [PATCH] cpusets: Move the ia64 domain setup code to the generic codeJohn Hawkes2005-09-072-445/+1
| | | | | | | | | | | | | | Signed-off-by: John Hawkes <hawkes@sgi.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
| * [PATCH] ia64 cpuset + build_sched_domains() mangles structuresJohn Hawkes2005-09-071-21/+69
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I've already sent this to the maintainers, and this is now being sent to a larger community audience. I have fixed a problem with the ia64 version of build_sched_domains(), but a similar fix still needs to be made to the generic build_sched_domains() in kernel/sched.c. The "dynamic sched domains" functionality has recently been merged into 2.6.13-rcN that sees the dynamic declaration of a cpu-exclusive (a.k.a. "isolated") cpuset and rebuilds the CPU Scheduler sched domains and sched groups to separate away the CPUs in this cpu-exclusive cpuset from the remainder of the non-isolated CPUs. This allows the non-isolated CPUs to completely ignore the isolated CPUs when doing load-balancing. Unfortunately, build_sched_domains() expects that a sched domain will include all the CPUs of each node in the domain, i.e., that no node will belong in both an isolated cpuset and a non-isolated cpuset. Declaring a cpuset that violates this presumption will produce flawed data structures and will oops the kernel. To trigger the problem (on a NUMA system with >1 CPUs per node): cd /dev/cpuset mkdir newcpuset cd newcpuset echo 0 >cpus echo 0 >mems echo 1 >cpu_exclusive I have fixed this shortcoming for ia64 NUMA (with multiple CPUs per node). A similar shortcoming exists in the generic build_sched_domains() (in kernel/sched.c) for NUMA, and that needs to be fixed also. The fix involves dynamically allocating sched_group_nodes[] and sched_group_allnodes[] for each invocation of build_sched_domains(), rather than using global arrays for these structures. Care must be taken to remember kmalloc() addresses so that arch_destroy_sched_domains() can properly kfree() the new dynamic structures. Signed-off-by: John Hawkes <hawkes@sgi.com> Cc: Nick Piggin <nickpiggin@yahoo.com.au> Cc: Ingo Molnar <mingo@elte.hu> Cc: "Luck, Tony" <tony.luck@intel.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
| * [PATCH] x86/x86_64: deferred handling of writes to /proc/irqxx/smp_affinityAshok Raj2005-09-072-38/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When handling writes to /proc/irq, current code is re-programming rte entries directly. This is not recommended and could potentially cause chipset's to lockup, or cause missing interrupts. CONFIG_IRQ_BALANCE does this correctly, where it re-programs only when the interrupt is pending. The same needs to be done for /proc/irq handling as well. Otherwise user space irq balancers are really not doing the right thing. - Changed pending_irq_balance_cpumask to pending_irq_migrate_cpumask for lack of a generic name. - added move_irq out of IRQ_BALANCE, and added this same to X86_64 - Added new proc handler for write, so we can do deferred write at irq handling time. - Display of /proc/irq/XX/smp_affinity used to display CPU_MASKALL, instead it now shows only active cpu masks, or exactly what was set. - Provided a common move_irq implementation, instead of duplicating when using generic irq framework. Tested on i386/x86_64 and ia64 with CONFIG_PCI_MSI turned on and off. Tested UP builds as well. MSI testing: tbd: I have cards, need to look for a x-over cable, although I did test an earlier version of this patch. Will test in a couple days. Signed-off-by: Ashok Raj <ashok.raj@intel.com> Acked-by: Zwane Mwaikambo <zwane@holomorphy.com> Grudgingly-acked-by: Andi Kleen <ak@muc.de> Signed-off-by: Coywolf Qi Hunt <coywolf@lovecn.org> Signed-off-by: Ashok Raj <ashok.raj@intel.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | Merge linux-2.6 into linux-acpi-2.6 testLen Brown2005-09-0330-237/+2040
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| * [IA64] uncached allocator: use generic (not sn2 specific) functionsMartin Hicks2005-08-311-2/+2
| | | | | | | | | | | | | | | | | | Change sn2-specific calls into generic functions. Without this change the uncached allocator will not work on non-sn2 platforms. Signed-off-by: Greg Edwards <edwardsg@sgi.com> Signed-off-by: Martin Hicks <mort@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * Auto-update from upstreamTony Luck2005-08-301-9/+6
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| * \ Pull rationalise-regions into release branchTony Luck2005-08-292-5/+5
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| | * | [IA64] Rationalise Region DefinitionsPeter Chubb2005-08-242-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, region numbers are defined in several files, with several names. For example, we have REGION_KERNEL in asm/page.h and RGN_KERNEL in pgtable.h We also have address definitions that should depend on the RGN_XXX macros, but are currently just long constants. The following patch reorganises all the definitions so that they have the same form (RGN_XXX), are in one place, and that addresses that depend on RGN_XXX are derived from them. (This is a necessary but not sufficient patch to allow UML-like operation on IA64). Thanks to David Mosberger for catching the change I missed in mmu_context.h. Signed-off-by: Peter Chubb <peterc@gelato.unsw.edu.au> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | | Pull ngam-maule-steiner into release branchTony Luck2005-08-2917-212/+1494
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| | * | | [IA64-SGI] fix bte_copy() calling smp_processor_id() while preemptibleRuss Anderson2005-08-261-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | bte_copy() calls calls smp_processor_id(), which will get flagged if preemption if enabled. raw_smp_processor_id() is used instead because we are just using it to pick a BTE interface and are not tied to a specific cpu. Signed-off-by: Russ Anderson (rja@sgi.com) Signed-off-by: Tony Luck <tony.luck@intel.com>
| | * | | [IA64] altix: Abstract irq_affinity at the sn pci providerMark Maule2005-08-264-6/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Altix patch to abstract irq_affinity down to the pci provider level since different SGI hardware implements this in different ways. Signed-off-by: Mark Maule <maule@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| | * | | [IA64] SGI SN remove redundant partition SAL callRuss Anderson2005-08-242-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Clean up of SGI SN partitioning related code. The SN_SAL_GET_SN_INFO SAL call returns the partition ID, making the SN_SAL_SYSCTL_PARTITION_GET SAL call redundant. Remove sn_partid and use sn_partition_id. Signed-off-by: Russ Anderson (rja@sgi.com) Signed-off-by: Tony Luck <tony.luck@intel.com>
| | * | | [IA64] - SGI SN hwperf enhancements -Mark Goodwin2005-08-241-6/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update the SN pci device info to use the nearest node function to allocate driver memory on the nearest node (rather than defaulting to node 0). Signed-off-by: Mark Goodwin <markgw@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| | * | | [IA64] - SGI SN hwperf enhancements -Mark Goodwin2005-08-241-20/+246
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a new exported function for determining the nearest node with CPUs for I/O nodes and fix a bug where the hwperf dynamic misc device was being registered before misc_init(). Signed-off-by: Mark Goodwin <markgw@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| | * | | [IA64] - SGI SN hwperf enhancements - export_pci_topologyMark Goodwin2005-08-241-34/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Bugfix to export PCI topology information in /proc/sgi_sn/sn_topology. Signed-off-by: Mark Goodwin <markgw@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| | * | | [IA64-SGI] - New SN hardware support - ptc_fixesJack Steiner2005-08-173-27/+243
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Shub2 provides a much improved mechanism for issuing internode TLB purges. Add code to support the newer mechanism. There is also some debug code (disabled) that is useful for testing. Collect statistics on the number, type & duration of TLB purges. This data will be useful for making future improvements in the algorithms. Signed-off-by: Jack Steiner <steiner@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| | * | | [IA64-SGI] - New SN hardware support - cpu_relaxJack Steiner2005-08-173-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a few missing calls to "hint @pause". Signed-off-by: Jack Steiner <steiner@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| | * | | [IA64-SGI] - New SN hardware support - bte_fixesJack Steiner2005-08-171-31/+51
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Change the BTE driver so that it works for both shub1 and shub2. Most of the changes are related to the number of cores that use the BTE engine, to the MMR addresses of various shub registers, and to using the correct processor or network physical address. Signed-off-by: Russ Anderson <rja@sgi.com> Signed-off-by: Jack Steiner <steiner@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| | * | | [IA64-SGI] - New SN hardware support - no_warsJack Steiner2005-08-171-10/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Disable some shub1-specific code when running on systems with shub2. Signed-off-by: Jack Steiner <steiner@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| | * | | [IA64-SGI] - New SN hardware support - boot_init_shub2Jack Steiner2005-08-171-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update the addresses of the pio_write_status_addr so that they are correct for newer processors. Shub2 did not number the threads in the order that I had expected. Signed-off-by: Jack Steiner <steiner@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| | * | | [IA64-SGI] - New SN hardware support - use_alias_spaceJack Steiner2005-08-172-13/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use local SHUB alias space when referencing MMRs that are known to be node local. There is a slight performance benefit & code simplification. Signed-off-by: Jack Steiner <steiner@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| | * | | [IA64-SGI] sn pci provider for TIOCE (pciMark Maule2005-08-113-1/+736
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Altix patch to add an SN pci provider for TIOCE, which is SGI's PCI Express implementation. Signed-off-by: Mark Maule <maule@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| | * | | [IA64-SGI] add support for TIO huge-windowMark Maule2005-08-113-24/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Altix patch to add TIO "huge-window" address support to sn_dma_flush(). Update copyright in affected files. Signed-off-by: Mark Maule <maule@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| | * | | [IA64-SGI] abstract force_interrupt() mechanismMark Maule2005-08-113-22/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Altix patch to abstract the force_interrupt() mechanism away from the pcibr provider. Signed-off-by: Mark Maule <maule@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| | * | | [IA64-SGI] altix: cosmetic rename of SGI_PCIBR_ERRORMark Maule2005-08-111-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Cosmetic altix patch to rename SGI_PCIBR_ERROR to something more generic and remove a duplicate #define. Signed-off-by: Mark Maule <maule@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| | * | | [IA64-SGI] Altix only: Add PCI Domain number support.Colin Ngam2005-08-114-14/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch enables PCI Domain numbering on Altix. Signed-off-by: Colin Ngam <cngam@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | | | Pull pending-2.6.14 into release branchTony Luck2005-08-292-12/+1
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| | * | | | [IA64] Delete erroneous copy_page.o in global lib-y listKenneth Chen2005-08-261-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | copy_page.o appeared twice in arch/ia64/lib/Makefile. The one in global lib-y is wrong where it should be just in lib-$(CONFIG_ITANIUM). Both copy_page.o and copy_page_mck.o are build for Itanium2 processor and the link order will pick up the low performing copy_page function (originally written for itanium processor). In this case, we really want the copy_page_mck.o for optimized version. Signed-off-by: Kenneth Chen <kenneth.w.chen@intel.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| | * | | | [IA64] arch/ia64/hp/sim/boot/fw-emu.c: remove egcs workaroundAdrian Bunk2005-08-241-11/+0
| | | |/ / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Kernel 2.6 doesn't support egcs, and I didn't find any user of this function. Signed-off-by: Adrian Bunk <bunk@stusta.de> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | | | Pull acpi-p-state into release branchTony Luck2005-08-295-0/+536
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| | * | | | [IA64] Add ACPI based P-state supportVenkatesh Pallipadi2005-08-265-0/+536
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Patch to support P-state transitions on ia64. This driver is based on ACPI, and uses the ACPI processor driver interface to find out the P-state support information for the processor. This driver plugs into generic cpufreq infrastructure. Once this driver is loaded successfully, ondemand/userspace governor can be used to change the CPU frequency dynamically based on load or on request from userspace process. Refer : ACPI specification - http://www.acpi.info P-state related PAL calls - http://developer.intel.com/design/itanium/downloads/24869909.pdf Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | | | | Pull asm-segment into release branchTony Luck2005-08-293-3/+0
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| | * | | | | [IA64] remove use of asm/segment.hKumar Gala2005-08-243-3/+0
| | | |/ / / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Removed IA64 architecture specific users of asm/segment.h The removal of asm-ia64/segment.h itself can wait until all of the kernel source has been purged of references. Signed-off-by: Kumar Gala <kumar.gala@freescale.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | | | | Pull swiotlb-size into release branchTony Luck2005-08-291-3/+2
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| | * | | | [IA64, X86_64] fix swiotlb sizingAlex Williamson2005-08-181-3/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix swiotlb sizing to match what the comments and the kernel parameters documentation indicate. Given a default 16k page size kernel (ia64) and a 2k swiotlb page size, we're off by a multiple of 8 trying to size the swiotlb. When specified on the boot line, the swiotlb is made 8x bigger than requested. When left to the default value, it's 8x smaller than the comments indicate. For x86_64 the multiplier would be 2x. The patch below fixes this. Now, what's a good default swiotlb size? Apparently we don't really need 64MB. Signed-off-by: Alex Williamson <alex.williamson@hp.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
* | | | | | Auto-update from upstreamLen Brown2005-08-291-9/+6
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| * | | | | [PATCH] convert signal handling of NODEFER to act like other Unix boxes.Steven Rostedt2005-08-291-9/+6
| |/ / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It has been reported that the way Linux handles NODEFER for signals is not consistent with the way other Unix boxes handle it. I've written a program to test the behavior of how this flag affects signals and had several reports from people who ran this on various Unix boxes, confirming that Linux seems to be unique on the way this is handled. The way NODEFER affects signals on other Unix boxes is as follows: 1) If NODEFER is set, other signals in sa_mask are still blocked. 2) If NODEFER is set and the signal is in sa_mask, then the signal is still blocked. (Note: this is the behavior of all tested but Linux _and_ NetBSD 2.0 *). The way NODEFER affects signals on Linux: 1) If NODEFER is set, other signals are _not_ blocked regardless of sa_mask (Even NetBSD doesn't do this). 2) If NODEFER is set and the signal is in sa_mask, then the signal being handled is not blocked. The patch converts signal handling in all current Linux architectures to the way most Unix boxes work. Unix boxes that were tested: DU4, AIX 5.2, Irix 6.5, NetBSD 2.0, SFU 3.5 on WinXP, AIX 5.3, Mac OSX, and of course Linux 2.6.13-rcX. * NetBSD was the only other Unix to behave like Linux on point #2. The main concern was brought up by point #1 which even NetBSD isn't like Linux. So with this patch, we leave NetBSD as the lonely one that behaves differently here with #2. Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | | | | Merge HEAD from ../from-linus Len Brown2005-08-251-0/+1
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| * | | | [PATCH] Export pcibios_bus_to_resourceKeith Owens2005-08-241-0/+1
| | |/ / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | pcibios_bus_to_resource is exported on all architectures except ia64 and sparc. Add exports for the two missing architectures. Needed when Yenta socket support is compiled as a module. Signed-off-by: Keith Owens <kaos@sgi.com> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | | | [IA64] fix allnoconfig buildLen Brown2005-08-252-2/+2
| | | | | | | | | | | | | | | | | | | | cc: Tony Luck <tony.luck@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
* | | | [ACPI] delete CONFIG_ACPI_PCILen Brown2005-08-255-5/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Delete the ability to build an ACPI kernel that does not include PCI support. When such a machine is created and it requires a tuned kernel, send a patch. http://bugzilla.kernel.org/show_bug.cgi?id=1364 Signed-off-by: Len Brown <len.brown@intel.com>
* | | | [ACPI] IA64-related ACPI Kconfig fixesLen Brown2005-08-256-42/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Build issues were mostly in the ACPI=n case -- don't do that. Select ACPI from IA64_GENERIC. Add some missing dependencies on ACPI. Mark BLACKLIST_YEAR and some laptop-only ACPI drivers as X86-only. Let me know when you get an IA64 Laptop. Signed-off-by: Len Brown <len.brown@intel.com>
* | | | [ACPI] delete CONFIG_ACPI_BUSLen Brown2005-08-245-5/+0
| | | | | | | | | | | | | | | | | | | | | | | | it is a synonym for CONFIG_ACPI Signed-off-by: Len Brown <len.brown@intel.com>
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