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* [PATCH] hpet-RTC: cache the comparator registerClemens Ladisch2005-10-301-1/+4
| | | | | | | | | | | | Reads from an HPET register require a round trip to the south bridge and are almost as slow as PCI reads. By caching the last value we've written to the comparator register, we can eliminate all HPET reads from the fast path in the emulated RTC interrupt handler. Signed-off-by: Clemens Ladisch <clemens@ladisch.de> Acked-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] hpet-RTC: fix timer config register accessesClemens Ladisch2005-10-301-7/+2
| | | | | | | | | | | | | | | | Make sure that the RTC timer is in non-periodic mode; some stupid BIOS might have initialized it to periodic mode. Furthermore, don't set the SETVAL bit in the config register. This wouldn't have any effect unless the timer was in period mode (which it isn't), and then the actual timer frequency would be half that of the desired one because incrementing the comparator in the interrupt handler would be done after the hardware has already incremented it itself. Signed-off-by: Clemens Ladisch <clemens@ladisch.de> Acked-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] hpet-RTC: disable interrupt when no longer neededClemens Ladisch2005-10-301-1/+5
| | | | | | | | | | | | | | | When the emulated RTC interrupt is no longer needed, we better disable it; otherwise, we get a spurious interrupt whenever the timer has rolled over and reaches the same comparator value. Having a superfluous interrupt every five minutes doesn't hurt much, but it's bad style anyway. ;-) Signed-off-by: Clemens Ladisch <clemens@ladisch.de> Acked-by: "Pallipadi, Venkatesh" <venkatesh.pallipadi@intel.com> Cc: Andi Kleen <ak@muc.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] sparse cleanups: NULL pointers, C99 struct init.Randy Dunlap2005-10-301-1/+1
| | | | | | | | | | | | Convert most of the remaining "Using plain integer as NULL pointer" sparse warnings to use NULL. (Not duplicating patches that are already in -mm, -bird, or -kj.) Convert isdn driver struct initializer to use C99 syntax. Signed-off-by: Randy Dunlap <rdunlap@xenotime.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] jiffies_64 cleanupThomas Gleixner2005-10-301-4/+0
| | | | | | | | | Define jiffies_64 in kernel/timer.c rather than having 24 duplicated defines in each architecture. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] unify sys_ptrace prototypeChristoph Hellwig2005-10-301-1/+1
| | | | | | | | | | Make sure we always return, as all syscalls should. Also move the common prototype to <linux/syscalls.h> Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Miklos Szeredi <miklos@szeredi.hu> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] create and destroy cache sysfs entries based on cpu notifiersAshok Raj2005-10-301-17/+43
| | | | | | | | | | | | | | | | | | | | cpu cache entries should be populated only when cpu is online and removed when they are logically offlined. Without which entries are not removed when cpu is offlined, or dont appear when we boot with maxcpus=1 and then kick the rest of the cpus via echo 1 to the sysfs online file. - Changed __devinit to __cpuinit for consistency. - Changed sysfs_driver_register to register_cpu_notifier. Signed-off-by: Ashok Raj <ashok.raj@intel.com> Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> Cc: Dave Jones <davej@codemonkey.org.uk> Cc: Zwane Mwaikambo <zwane@holomorphy.com> Cc: Greg KH <greg@kroah.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] i386: srat on non-acpi hw fixMagnus Damm2005-10-301-1/+6
| | | | | | | | | | This patch adds a check for the return value of acpi_find_root_pointer(). Without this patch systems without ACPI support such as QEMU crashes when booting a NUMA kernel with CONFIG_ACPI_SRAT=y. Signed-off-by: Magnus Damm <magnus@valinux.co.jp> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] i386 mpparse: Only ignore lapic information we can't storeEric W. Biederman2005-10-301-16/+19
| | | | | | | | | | | | | | | | | After staring at mpparse.c for a little longer I noticed that when we hit our limit of num_processors we are filtering out information about other processors that we can still store. This patch just reorders the code so we store everything we can. This should avoid the incorrect warning about our boot CPU not being listed by the BIOS that we are now getting in the kexec on panic case, and it should allow us to detect all apicid conflicts even when our physical number of cpus exceeds maxcpus. Signed-off-by: Eric W. Biederman <ebiederm@xmission.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] kdump/i386: apic verification failure fixVivek Goyal2005-10-301-2/+1
| | | | | | | | | | | | | | | | | | | | | o Removes the unnecessary call to local_irq_disable(). o Kdump was failing while second kernel was coming up. Check for presence of boot cpu apic id was failing in (apic_id_registered), hence hitting BUG(). o This should not have failed because before calling setup_local_APIC(), it is ensured that even if BIOS has not reported boot cpu, then hard set the prence of it. Problem happens because of usage of hard_smp_processor_id() which is hardcoded to zero in case of non SMP kernel. In kdump case second kernel can boot on a cpu whose boot cpu id is not zero. o Using boot_cpu_physical_apicid instead to hard set the presence of boot cpu. Signed-off-by: Vivek Goyal <vgoyal@in.ibm.com> Cc: "Eric W. Biederman" <ebiederm@xmission.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] Clean up mtrr compat ioctl codeBrian Gerst2005-10-301-45/+74
| | | | | | | | | | Handle 32-bit mtrr ioctls in the mtrr driver instead of the ia32 compatability layer. Signed-off-by: Brian Gerst <bgerst@didntduck.org> Cc: Andi Kleen <ak@muc.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] x86: vmx cpu feature detectionKamble, Nitin A2005-10-301-1/+1
| | | | | | | | | If VMX feature is available in the CPU, this patch will make it visible in the /proc/cpuinfo with the cpuid detection. Signed-Off-By: Nitin A Kamble <nitin.a.kamble@intel.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] i386 kexec-on-panic: Don't shutdown the apics.Eric W. Biederman2005-10-301-7/+0
| | | | | | | | | | | | | | It is dangerous to shutdown the apics in machine_crash_shutdown. With my previous patch to initialize apics in init_IRQ we should be able to boot a kernel without this. As long as we reinitialize the APICs we don't care what state they were in during bootup. This should make machine_crash_shutdown noticeably more reliable. Signed-off-by: Eric W. Biederman <ebiederm@xmission.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] i386: move apic init in init_IRQsEric W. Biederman2005-10-305-71/+100
| | | | | | | | | | | | | | | | | | | | | | | | All kinds of ugliness exists because we don't initialize the apics during init_IRQs. - We calibrate jiffies in non apic mode even when we are using apics. - We have to have special code to initialize the apics when non-smp. - The legacy i8259 must exist and be setup correctly, even when we won't use it past initialization. - The kexec on panic code must restore the state of the io_apics. - init/main.c needs a special case for !smp smp_init on x86 In addition to pure code movement I needed a couple of non-obvious changes: - Move setup_boot_APIC_clock into APIC_late_time_init for simplicity. - Use cpu_khz to generate a better approximation of loops_per_jiffies so I can verify the timer interrupt is working. - Call setup_apic_nmi_watchdog again after cpu_khz is initialized on the boot cpu. Signed-off-by: Eric W. Biederman <ebiederm@xmission.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] i386 nmi_watchdog: Merge check_nmi_watchdog fixes from x86_64Eric W. Biederman2005-10-301-2/+37
| | | | | | | | | | | | | | | The per cpu nmi watchdog timer is based on an event counter. idle cpus don't generate events so the NMI watchdog doesn't fire and the test to see if the watchdog is working fails. - Add nmi_cpu_busy so idle cpus don't mess up the test. - kmalloc prev_nmi_count to keep kernel stack usage bounded. - Improve the error message on failure so there is enough information to debug problems. Signed-off-by: Eric W. Biederman <ebiederm@xmission.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] i386 io_apic.c: Memorize at bootup where the i8259 is connectedEric W. Biederman2005-10-301-35/+112
| | | | | | | | | | | | | | | | | | | | | | Currently we attempt to restore virtual wire mode on reboot, which only works if we can figure out where the i8259 is connected. This is very useful when we kexec another kernel and likely helpful when dealing with a BIOS that make assumptions about how the system is setup. Since the acpi MADT table does not provide the location where the i8259 is connected we have to look at the hardware to figure it out. Most systems have the i8259 connected the local apic of the cpu so won't be affected but people running Opteron and some serverworks chipsets should be able to use kexec now. In addition this patch removes the hard coded assumption that the io_apic that delivers isa interrups is always known to the kernel as io_apic 0. As there does not appear to be anything to guarantee that assumption is true. Signed-off-by: Eric W. Biederman <ebiederm@xmission.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] x86: when L3 is present show its size in /proc/cpuinfoVenkatesh Pallipadi2005-10-301-7/+1
| | | | | | | | | | | | The code that prints the cache size assumes that L3 always lives in chipset and is shared across CPUs. Which is not really true. I think all the cachesizes reported by cpuid are in the processor itself. The attached patch changes the code to reflect that. Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] fixup bogus e820 entry with mem=Dave Hansen2005-10-301-7/+17
| | | | | | | | | | | | | | | | | This was reported because someone was getting oopses reading /proc/iomem. It was tracked down to a zero-sized 'struct resource' entry which was located right at 4GB. You need two conditions to hit this bug: a BIOS E820_RAM area starting at exactly the boundary where you specify mem= (to get a zero-sized entry), and for the legacy_init_iomem_resources() loop to skip that resource (which only happens at exactly 4G). I think the killing zero-sized e820 entry is the easiest way to fix this. Signed-off-by: Dave Hansen <haveblue@us.ibm.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] x86: bug fix in P6 Machine check initializationVenkatesh Pallipadi2005-10-301-3/+8
| | | | | | | | | | | | | Make P6 MCA initialization code complaint with guidelines in IA-32 SDM Vol3. Bank 0 control register should not be set by OS and clear status registers on all banks on reset. This will prevent false MCE alarms on the systems that has some non-MCE information left-over in MC0_STATUS on reboot. Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] x86: add an accessor function for getting the per-CPU gdtZachary Amsden2005-10-302-23/+26
| | | | | | | | | | Add an accessor function for getting the per-CPU gdt. Callee must already have the CPU. Signed-off-by: Zachary Amsden <zach@vmware.com> Acked-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] x86: bogus tls from gdtZachary Amsden2005-10-301-6/+0
| | | | | | | | | | | | The per-CPU initialization code is copying in bogus data into thread->tls_array. Note that it copies &per_cpu(cpu_gdt_table, cpu), not &per_cpu(cpu_gdt_table, cpu)[GDT_ENTRY_TLS_MIN). That is totally broken and unnecessary. Make the initialization explicitly NULL. Signed-off-by: Zachary Amsden <zach@vmware.com> Acked-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] x86: hot plug CPU to support physical add of new processorsNatalie Protasevich2005-10-303-7/+11
| | | | | | | | | | | | | | The patch allows physical bring-up of new processors (not initially present in the configuration) from facilities such as driver/utility implemented on a platform. The actual method of making processors available is up to the platform implementation. Signed-off-by: Natalie Protasevich <Natalie.Protasevich@unisys.com> Cc: Shaohua Li <shaohua.li@intel.com> Cc: Ashok Raj <ashok.raj@intel.com> Cc: Zwane Mwaikambo <zwane@holomorphy.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] intel_cacheinfo: remove MAX_CACHE_LEAVES limitSiddha, Suresh B2005-10-301-12/+6
| | | | | | | | | | | | | | | | | | Initial internal version of Venki's cpuid(4) deterministic cache parameter identification patch used static arrays of size MAX_CACHE_LEAVES. Final patch which made to the base used dynamic array allocation, with this MAX_CACHE_LEAVES limit hunk still in place. cpuid(4) already has a mechanism to find out the number of cache levels implemented and there is no need for this hardcoded MAX_CACHE_LEAVES limit. So remove the MAX_CACHE_LEAVES limit from the routine which calculates the number of cache levels using cpuid(4) Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com> Cc: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] x86: initialise tss->io_bitmap_owner to somethingBart Oldeman2005-10-301-0/+1
| | | | | | | | | | There exists a field io_bitmap_owner in the TSS that is only checked, but never set to anything else but NULL. Signed-off-by: Bart Oldeman <bartoldeman@users.sourceforge.net> Acked-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] i386 and x86_64 TSC set_cyc2ns_scale imprecisionMathieu Desnoyers2005-10-302-14/+24
| | | | | | | | | | | | | | | | | I just found out that some precision is unnecessarily lost in the arch/i386/kernel/timers/timer_tsc.c:set_cyc2ns_scale function. It uses a cpu_mhz parameter when it could use a cpu_khz. In the specific case of an Intel P4 running at 3001.171 Mhz, the truncation to 3001 Mhz leads to an imprecision of 19 microseconds per second : this is very sad for a timer with nearly nanosecond accuracy. Fix the x86_64 architecture too. Cc: george anzinger <george@mvista.com> Cc: john stultz <johnstul@us.ibm.com> Cc: Andi Kleen <ak@muc.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] mm: i386 sh sh64 ready for split ptlockHugh Dickins2005-10-291-10/+7
| | | | | | | | | | | | | | | | | | | | | Use pte_offset_map_lock, instead of pte_offset_map (or inappropriate pte_offset_kernel) and mm-wide page_table_lock, in sundry arch places. The i386 vm86 mark_screen_rdonly: yes, there was and is an assumption that the screen fits inside the one page table, as indeed it does. The sh __do_page_fault: which handles both kernel faults (without lock) and user mm faults (locked - though it set_pte without locking before). The sh64 flush_cache_range and helpers: which wrongly thought callers held page_table_lock before (only its tlb_start_vma did, and no longer does so); moved the flush loop down, and adjusted the large versus small range decision to consider a range which spans page tables as large. Signed-off-by: Hugh Dickins <hugh@veritas.com> Acked-by: Paul Mundt <lethal@linux-sh.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] Driver Core: fix up all callers of class_device_create()Greg Kroah-Hartman2005-10-282-2/+2
| | | | | | | | The previous patch adding the ability to nest struct class_device changed the paramaters to the call class_device_create(). This patch fixes up all in-kernel users of the function. Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] typo fix in last cpufreq powernow patchChris Wright2005-10-211-1/+1
| | | | | | | | Not sure how it slipped by, but here's a trivial typo fix for powernow. Signed-off-by: Chris Wright <chrisw@osdl.org> [ It's "nurter" backwards.. Maybe we have a hillbilly The Shining fan? ] Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] cpufreq: fix pending powernow timer stuck conditionDave Jones2005-10-211-11/+19
| | | | | | | | | | | | | | | | | | | | AMD recently discovered that on some hardware, there is a race condition possible when a C-state change request goes onto the bus at the same time as a P-state change request. Both requests happen, but the southbridge hardware only acknowledges the C-state change. The PowerNow! driver is then stuck in a loop, waiting for the P-state change acknowledgement. The driver eventually times out, but can no longer perform P-state changes. It turns out the solution is to resend the P-state change, which the southbridge will acknowledge normally. Thanks to Johannes Winkelmann for reporting this and testing the fix. Signed-off-by: Mark Langsdorf <mark.langsdorf@amd.com> Signed-off-by: Dave Jones <davej@redhat.com> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] i386: Don't discard upper 32bits of HWCR on K8Andi Kleen2005-10-101-1/+1
| | | | | | | | | | | Need to use long long, not long when RMWing a MSR. I think it's harmless right now, but still should be better fixed if AMD adds any bits in the upper 32bit of HWCR. Bug was introduced with the TLB flush filter fix for i386 Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] i386: fix stack alignment for signal handlersMarkus F.X.J. Oberhumer2005-10-101-1/+5
| | | | | | | | | | | | | This fixes the setup of the alignment of the signal frame, so that all signal handlers are run with a properly aligned stack frame. The current code "over-aligns" the stack pointer so that the stack frame is effectively always mis-aligned by 4 bytes. But what we really want is that on function entry ((sp + 4) & 15) == 0, which matches what would happen if the stack were aligned before a "call" instruction. Signed-off-by: Markus F.X.J. Oberhumer <markus@oberhumer.com> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] gfp flags annotations - part 1Al Viro2005-10-081-1/+1
| | | | | | | | | | | | - added typedef unsigned int __nocast gfp_t; - replaced __nocast uses for gfp flags with gfp_t - it gives exactly the same warnings as far as sparse is concerned, doesn't change generated code (from gcc point of view we replaced unsigned int with typedef) and documents what's going on far better. Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] i386: include linux/irq.h rather than asm/hw_irq.hNick Piggin2005-09-301-1/+1
| | | | | | | | | | | | I need the following patch to compile -git8 here, otherwise these files fail to compile (asm/hw_irq.h needs definitions from linux/irq.h and that file provides the required include ordering). I did not do a full audit, though there looks to be many other places that should get the same treatment, if this is the right way to do it. Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] Fix up TLB flush filter disablingAndi Kleen2005-09-291-0/+16
| | | | | | | | I checked with AMD and they requested to only disable it for family 15. Also disable it for i386 too. And some style fixes. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] useless includes of linux/irq.h in arch/i386Al Viro2005-09-2618-22/+0
| | | | | | | | | | Most of these guys are simply not needed (pulled by other stuff via asm-i386/hardirq.h). One that is not entirely useless is hilarious - arch/i386/oprofile/nmi_timer_int.c includes linux/irq.h... as a way to get linux/errno.h Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* Partially revert "Fix time going twice as fast problem on ATI Xpress chipsets"Linus Torvalds2005-09-141-10/+0
| | | | | | | | | | | | | | | | | | | Commit 66759a01adbfe8828dd063e32cf5ed3f46696181 introduced the fix for time ticking too fast on some boards by disabling one of the doubly connected timer pins on ATI boards. However, it ends up being _much_ too broad a brush, and that just makes some other ATI boards not work at all since they now have no timer source. So disable the automatic ATI southbridge detection, and just rely on people who see this problem disabling it by hand with the option "disable_timer_pin_1" on the kernel command line. Maybe somebody can figure out the proper tests at a later date. Acked-by: Peter Osterlund <petero2@telia.com> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] Even more fallout from ATI Xpress timer workaroundCal Peake2005-09-131-3/+1
| | | | | | | disable_timer_pin_1 needs IO-APIC, not just local APIC. Signed-off-by: Cal Peake <cp@absolutedigital.net> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] i386: Ignore masked FPU exceptionsChuck Ebbert2005-09-131-2/+3
| | | | | | | | | | | | | | | Masked FPU exceptions should obviously not happen in the first place, but if they do, ignoring them seems to be the right thing to do. Although there is no documentation available for Cyrix MII, I did find erratum F-7 for Winchip C6, "FPU instruction may result in spurious exception under certain conditions" which seems to indicate that this can happen. That would also explain the behaviour Ondrej Zary reported on the MII. Signed-off-by: Chuck Ebbert <76306.1226@compuserve.com> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] arch/i386: Replace custom macro with isdigit()Tobias Klauser2005-09-131-4/+3
| | | | | | | | Replace the custom is_digit() macro with isdigit() from <linux/ctype.h> Signed-off-by: Tobias Klauser <tklauser@nuerscht.ch> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] use add_taint() for setting tainted bit flagsRandy Dunlap2005-09-131-1/+1
| | | | | | | | | Use the add_taint() interface for setting tainted bit flags instead of doing it manually. Signed-off-by: Randy Dunlap <rdunlap@xenotime.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* Fix fallout from ATI Xpress timer workaroundLinus Torvalds2005-09-121-0/+3
| | | | | | | | | ACPI earlyquirks needs to honor the proper config variables, and include the right header file. (Fixes commit 66759a01adbfe8828dd063e32cf5ed3f46696181) Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] x86-64: i386/x86-64: Fix time going twice as fast problem on ATI ↵Chuck Ebbert2005-09-123-0/+16
| | | | | | | | | | | Xpress chipsets Original patch from Bertro Simul This is probably still not quite correct, but seems to be the best solution so far. Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] x86-64: Use ACPI PXM to parse PCI<->node assignmentsAndi Kleen2005-09-121-1/+7
| | | | | | | Since this is shared code I had to implement it for i386 too Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] i386: Don't miss pending signals returning to user mode after signal ↵Roland McGrath2005-09-121-2/+2
| | | | | | | | | processing Signed-off-by: Roland McGrath <roland@redhat.com> Acked-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Acked-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] i386 / uml: add dwarf sections to static link scriptPaolo 'Blaisorblade' Giarrusso2005-09-101-8/+3
| | | | | | | | | | | | | | | | | | | | | | | Inside the linker script, insert the code for DWARF debug info sections. This may help GDB'ing a Uml binary. Actually, it seems that ld is able to guess what I added correctly, but normal linker scripts include this section so it should be correct anyway adding it. On request by Sam Ravnborg <sam@ravnborg.org>, I've added it to asm-generic/vmlinux.lds.s. I've also moved there the stabs debug section, used the new macro in i386 linker script and added DWARF debug section to that. In the truth, I've not been able to verify the difference in GDB behaviour after this change (I've seen large improvements with another patch). This may depend on my binutils version, older one may have worse defaults. However, this section is present in normal linker script, so add it at least for the sake of cleanness. Signed-off-by: Paolo 'Blaisorblade' Giarrusso <blaisorblade@yahoo.it> Acked-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] i386: fix-up schedule_timeout() usageNishanth Aravamudan2005-09-101-2/+1
| | | | | | | | | Use schedule_timeout_interruptible() instead of set_current_state()/schedule_timeout() to reduce kernel size. Signed-off-by: Nishanth Aravamudan <nacc@us.ibm.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] i386/x86_64: make get_cpu_vendor() staticAdrian Bunk2005-09-101-1/+1
| | | | | | | | get_cpu_vendor() no longer has any users in other files. Signed-off-by: Adrian Bunk <bunk@stusta.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] remove ACPI S4bios supportPavel Machek2005-09-101-6/+0
| | | | | | | | | | | | Remove S4BIOS support. It is pretty useless, and only ever worked for _me_ once. (I do not think anyone else ever tried it). It was in feature-removal for a long time, and it should have been removed before. Signed-off-by: Pavel Machek <pavel@suse.cz> Signed-off-by: Adrian Bunk <bunk@stusta.de> Cc: "Brown, Len" <len.brown@intel.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] i386/smpboot: use msleep() instead of schedule_timeout()Nishanth Aravamudan2005-09-101-2/+1
| | | | | | | | | | Replace schedule_timeout() with msleep() to guarantee the task delays as expected. Signed-off-by: Nishanth Aravamudan <nacc@us.ibm.com> Signed-off-by: Domen Puncer <domen@coderock.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* Merge master.kernel.org:/pub/scm/linux/kernel/git/sam/kbuild Linus Torvalds2005-09-093-3/+3
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