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* Blackfin: add serial TX IRQ in individual platform resourceSonic Zhang2011-11-144-4/+24
| | | | | | | | | The serial TX IRQ is not simply (RX IRQ + 1) on some Blackfin chips, so move the values to the platform resources. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Bob Liu <lliubbo@gmail.com>
* Blackfin: irq: remove IRQF_DISABLEDYong Zhang2011-10-262-2/+2
| | | | | | | | This flag is a NOOP and can be removed now. Signed-off-by: Yong Zhang <yong.zhang0@gmail.com> Acked-by: Bob Liu <lliubbo@kernel.org> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: gpio: punt unused GPIO_# definesMike Frysinger2011-07-231-3/+3
| | | | | | | | These defines don't accomplish much as GPIO_# is the same thing as #. Each CPU already provides helpful symbolic defines like GPIO_<PIN> which everyone uses, so just punt these # ones. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: update anomaly lists to latest public infoMike Frysinger2011-07-231-60/+72
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: optimize double fault boot checkingMike Frysinger2011-07-231-24/+12
| | | | | | | | This moves the double fault data used at boot time into a single struct which can then easily be addressed with indexed loads rather than having to explicitly load multiple addresses. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: SMP: optimize start up code a bitMike Frysinger2011-07-231-78/+54
| | | | | | | This just imports all of the optimization work done in the common startup code. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: boards: clean up redundant/dead spi resourcesMike Frysinger2011-07-233-62/+0
| | | | | | | | | | | | The default for the Blackfin SPI driver is 8 bits and dma disabled, so many of the bfin5xx_spi_chip resources are redundant. So punt those parts. Further, drivers should themselves be declaring 16 bit transfers, so for those that do, and for the ones which no longer do 16 bit transfers, drop the bfin5xx_spi_chip resources. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: net2272: move pin setup to boards filesMike Frysinger2011-07-232-0/+46
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: mach/bfin_serial_5xx.h: punt now-unused headerMike Frysinger2011-05-281-52/+0
| | | | | | | | Now that the serial code has been unified in bfin_serial.h, and the Blackfin UART driver pushed its resources to the boards files, we don't need these headers anymore. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Merge git://git.infradead.org/mtd-2.6Linus Torvalds2011-05-271-4/+0
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * git://git.infradead.org/mtd-2.6: (97 commits) mtd: kill CONFIG_MTD_PARTITIONS mtd: remove add_mtd_partitions, add_mtd_device and friends mtd: convert remaining users to mtd_device_register() mtd: samsung onenand: convert to mtd_device_register() mtd: omap2 onenand: convert to mtd_device_register() mtd: txx9ndfmc: convert to mtd_device_register() mtd: tmio_nand: convert to mtd_device_register() mtd: socrates_nand: convert to mtd_device_register() mtd: sharpsl: convert to mtd_device_register() mtd: s3c2410 nand: convert to mtd_device_register() mtd: ppchameleonevb: convert to mtd_device_register() mtd: orion_nand: convert to mtd_device_register() mtd: omap2: convert to mtd_device_register() mtd: nomadik_nand: convert to mtd_device_register() mtd: ndfc: convert to mtd_device_register() mtd: mxc_nand: convert to mtd_device_register() mtd: mpc5121_nfc: convert to mtd_device_register() mtd: jz4740_nand: convert to mtd_device_register() mtd: h1910: convert to mtd_device_register() mtd: fsmc_nand: convert to mtd_device_register() ... Fixed up trivial conflicts in - drivers/mtd/maps/integrator-flash.c: removed in ARM tree - drivers/mtd/maps/physmap.c: addition of afs partition probe type clashing with removal of CONFIG_MTD_PARTITIONS
| * mtd: bfin: convert to mtd_device_register()Jamie Iles2011-05-251-4/+0
| | | | | | | | | | | | | | | | | | | | Convert to mtd_device_register() and remove the CONFIG_MTD_PARTITIONS preprocessor conditionals as partitioning is always available. Cc: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Jamie Iles <jamie@jamieiles.com> Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* | Blackfin: don't touch cpu_possible_map and cpu_present_map directlyKOSAKI Motohiro2011-05-251-4/+10
| | | | | | | | | | | | | | | | | | | | | | We plan to remove cpu_possible_map and cpu_present_map later and we have proper init_cpu_possible() and init_cpu_present() APIs. Therefore this patch rewrites platform_init_cpus and platform_prepare_cpus by their APIs. Signed-off-by: KOSAKI Motohiro <kosaki.motohiro@jp.fujitsu.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | Blackfin: bf548-ezkit/bf561-ezkit: update nor flash layoutMike Frysinger2011-05-251-1/+9
| | | | | | | | | | | | | | | | Both the BF548-EZKIT and the BF561-EZKIT use top boot flashes, so now that Das U-Boot uses the last small sector for its environment, update their nor layout in the kernel accordingly. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | Blackfin: update anomaly lists to latest public infoMike Frysinger2011-05-251-3/+12
| | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | Blackfin: SMP: fix cpudata cache setupMike Frysinger2011-05-251-3/+0
| | | | | | | | | | | | | | | | | | | | After some cache setup reordering changesets, the blackfin_cpudata init was left behind. While cpu0's data was correct, cpu1's data was not. Not that big of a deal as these are only used in the cpuinfo output, but should still be fixed. So move the setup of these fields to the common cache setup function to avoid this happening again in the future. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | Blackfin: bf533/bf537/bf561: convert to BFIN_IRQ helperMike Frysinger2011-05-251-65/+64
| | | | | | | | | | | | | | This brings the parts in line with newer ones, and makes things easier to read at a glance. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | Blackfin: clean up style in irq definesMike Frysinger2011-05-251-225/+154
| | | | | | | | | | | | | | | | | | | | These files had a lot of whitespace damage, mostly due to copying and pasting original files that had damage. The BF561 header also had a lot of unused CONFIG_DEF_xxx defines, so punt them all. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | Blackfin: unify core IRQ definitionsMike Frysinger2011-05-251-116/+1
|/ | | | | | | Start a new common IRQ header and move all of the CEC pieces there. This lets the individual part headers worry just about its SIC defines. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* bfin: Final irq cleanupThomas Gleixner2011-03-291-3/+3
| | | | | | | | | Use the trigger type in irq_data and check level type instead of looking at desc->handle_irq. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Mike Frysinger <vapier@gentoo.org> Cc: uclinux-dist-devel@blackfin.uclinux.org
* Blackfin: SMP: flush CoreB cache when shutting downGraf Yang2011-03-221-0/+9
| | | | | | | | | When CoreB wakes up, it needs to read variables that CoreA might have modified, and might be in CoreB's cache. So kill CoreB's cache before going to sleep so that when we wake up, we are in a coherent state. Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: SMP: convert to irq chip functionsMike Frysinger2011-03-181-1/+5
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: use proper wrapper functions for modifying irq statusThomas Gleixner2011-03-181-1/+1
| | | | | Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: SMP: work around anomaly 05000491Sonic Zhang2011-03-182-10/+6
| | | | | | | | | | | | | | | | In order to safely work around anomaly 05000491, we have to execute IFLUSH from L1 instruction sram. The trouble with multi-core systems is that all L1 sram is visible only to the active core. So we can't just place the functions into L1 and call it directly. We need to setup a jump table and place the entry point in external memory. This will call the right func based on the active core. In the process, convert from the manual relocation of a small bit of code into Core B's L1 to the more general framework we already have in place for loading arbitrary pieces of code into L1. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: SMP: implement cpu_freq supportGraf Yang2011-03-182-29/+18
| | | | | | | Re-use some of the existing cpu hotplugging code in the process. Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: SMP: avoid section mismatch warningsSonic Zhang2011-03-181-1/+1
| | | | | | | | Since coreb_trampoline_start() calls coreb_start(), they need to be in the same section. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: boards: add missing "static" to peripheral listsMike Frysinger2011-01-104-4/+4
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: SMP: kgdb: apply anomaly 257 work aroundSonic Zhang2011-01-101-1/+5
| | | | | | | | | | | When run kgdb testing, it looks like coreb hangs in single step or trap exception without handling anomaly 05000257 properly on bf561 v0.5. But, the anomaly list says it apply to bf561 v0.4 and bellow. Apply its work around to 0.5 temporarily until the behavior and the root cause can be confirmed by the hardware team. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: SMP: kgdb: flush core internal write buffer before flushinvSonic Zhang2011-01-101-0/+5
| | | | | | | | | | KGDB single step in SMP kernel may hang forever in flushinv without a CSYNC ahead. This is because the core internal write buffers need to be flushed before invalidating the data cache to make sure the insn fetch is not out of sync. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: bf561: SMP: add multicore pll handlersMike Frysinger2011-01-101-0/+53
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: unify pll.h headersMike Frysinger2011-01-101-63/+1
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: SMP: rewrite IPI handling to avoid memory allocationYi Li2011-01-102-14/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, sending an interprocessor interrupt (IPI) requires building up a message dynamically which means memory allocation. But often times, we will want to send an IPI in low level contexts where allocation is not possible which may lead to a panic(). So create a per-cpu static array for the message queue and use that instead. Further, while we have two supplemental interrupts, we are currently only using one of them. So use the second one for the most common IPI message of all -- smp_send_reschedule(). This avoids ugly contention for locks which in turn would require an IPI message ... In general, this improves SMP performance, and in some cases allows the SMP port to work in places it wouldn't before. Such as the PREEMPT_RT state where the slab is protected by a per-cpu spin lock. If the slab kmalloc/kfree were to put the task to sleep, and that task was actually the IPI handler, then the system falls down yet again. After running some various stress tests on the system, the static limit of 5 messages seems to work. On the off chance even this overflows, we simply panic(), and we can review that scenario to see if the limit needs to be increased a bit more. Signed-off-by: Yi Li <yi.li@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: bf561: fix mem_map.h SMP overridesGraf Yang2011-01-101-7/+9
| | | | | | | | | The BF561 mem_map.h header has the __ASSEMBLY__/CONFIG_SMP checks out of order which leads to build errors for assembly code that happens to include this file. Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: SMP: tweak platform_request_ipi() usageGraf Yang2011-01-102-2/+4
| | | | | | | | | | This function takes an irq_handler_t function, but the prototype in the header doesn't match the function definition. This is due to the smp headers needing to avoid circular dependencies. So change the function to take a simple pointer. Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: bf561: update a few more SIC_SYSCR locationsMike Frysinger2011-01-102-14/+14
| | | | | | Looks like I missed a few new spots when renaming the SICA macros. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: drop asm/irq.h include from mach headersMike Frysinger2011-01-101-3/+0
| | | | | | | These were only included because of the irq handling of the PLL funcs, and those PLL funcs have been moved out into their own header now. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: clean up mach header includesMike Frysinger2011-01-103-21/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The main asm/blackfin.h header will pull in mach/blackfin.h to get all the fun Blackfin defines. So having any of the sub-mach headers trying to include asm/blackfin.h makes no sense -- punt it. The mach/blackfin.h header takes care of including the part-specific def headers which in turn will include any other needed def file. Similarly, it takes care of pulling in the part-specific cdef header. So move this logic out of the blackfin.h when necessary. Further, make sure the cdef headers do not waste time including the def headers again. Since all parts need the common def/cdef headers, move this logic out of the part-specific headers and into the mach/blackfin.h file. Finally, we need to split the BF539 def header since the BF538 does not have MXVR and we don't want to expose those MMRs. So now all parts should have the same behavior: mach/blackfin.h asm/def_LPBlackfin.h part-specific def.h if ! asm asm/cdef_LPBlackfin.h part-specific cdef.h And the sub def/cdef headers only tail into what they need. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: push gpio (port) defines into common headersMike Frysinger2011-01-102-38/+2
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: dma: constify MMR pointer arrayMike Frysinger2011-01-101-1/+1
| | | | | | The array of pointers is never written, so constify it. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: standardize DMAC traffic control MMRs & MDMA MMRsMike Frysinger2011-01-103-452/+338
| | | | | | | | | | Use the same naming convention for DMA traffic MMRs (most were legacy anyways) so we can avoid useless ifdef trees. Same goes for MDMA names -- this actually allows us to undo a bunch of ifdef redirects that existed for this purpose alone. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: bfin_serial.h: unify heavily duplicated serial codeMike Frysinger2011-01-104-164/+16
| | | | | | | | Each Blackfin port has been duplicating UART structures and defines when there really is no need for it. So start a new bfin_serial.h header to unify all these pieces and give ourselves a fresh start. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: SMP: fix hotplug building after irq header shuffleGraf Yang2011-01-101-0/+2
| | | | | Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Merge branch 'for-linus' of ↵Linus Torvalds2010-10-229-182/+152
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/vapier/blackfin * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/vapier/blackfin: (47 commits) Blackfin: bfin_spi.h: add MMR peripheral layout Blackfin: bfin_ppi.h: start a common PPI/EPPI header Blackfin: bfin_can.h: add missing VERSION/VERSION2 MMRs Blackfin: bf538: add missing SIC_RVECT define Blackfin: bf561: rewrite SICA_xxx to just SIC_xxx Blackfin: bf54x: add missing SIC_RVECT definition Blackfin: H8606: move 8250 irqflags to platform resources Blackfin: glue XIP/ROM kernel kconfigs Blackfin: update sparse flags for latest upstream changes Blackfin: coreb: update ioctl numbers Blackfin: coreb: add gpl module license Blackfin: bf518-ezkit: add ssm2603 codec resources Blackfin: bf51x/bf52x: fix 16/32bit SPORT MMR helpers Blackfin: tll6527m: new board port Blackfin: bf526-ezbrd/bf527-ezkit: add NAND partition for u-boot Blackfin: merge kernel init memory back into main memory region Blackfin: gpio: add peripheral group check Blackfin: dma: bf54x: add missing break for SPORT1 TX IRQ Blackfin: add new cacheflush syscall Blackfin: bf548-ezkit: increase u-boot partition size ...
| * Blackfin: bf561: rewrite SICA_xxx to just SIC_xxxMike Frysinger2010-10-226-107/+83
| | | | | | | | | | | | | | This matches all the other Blackfin ports and keep us from having to write bf561-specific code in many places. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: coreb: update ioctl numbersMike Frysinger2010-10-221-3/+3
| | | | | | | | | | | | | | | | | | We have to use ioctl numbers that don't collide with common code. Otherwise, these ones never even get called because the common fs code swalled all invocations. Reported-by: Kay Duenzer <kduenzer@maku.eu> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: coreb: add gpl module licenseMike Frysinger2010-10-221-0/+1
| | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: i2c-gpio boards: use GPIO_PF# definesMike Frysinger2010-10-221-2/+2
| | | | | | | | | | | | Rather than use raw numbers for the GPIO pins, use proper GPIO defines. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: bf561-ezkit: add AD1836 codec resourcesBarry Song2010-10-221-0/+50
| | | | | | | | | | | | | | | | This board has an AD1836 codec, so make sure we have the right resources declared for it. Signed-off-by: Barry Song <barry.song@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: boards: use proper irq flags with isp1362-hcdMichael Hennerich2010-10-222-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | With the recent kernel update the isp1362-hcd driver evaluates the IORESOURCE_IRQ resource flags and requests the irq with the given polarity/edge settings. However the ISP1362 config requires low level/edge interrupts. Most of the Blackfin boards use some random flag or no flag at all. Make all boards use a know good flag IORESOURCE_IRQ_LOWEDGE. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: bf561-acvilon: fix NAND resourcesValentin Yakovenkov2010-10-221-1/+1
| | | | | | | | | | | | | | | | The NAND platform driver expects the registers to have a "mem" resource type rather than "io". Signed-off-by: Valentin Yakovenkov <yakovenkov@gmail.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: boards: update AD183x resourcesBarry Song2010-10-222-10/+10
| | | | | | | | | | | | | | Make sure we use the right Kconfig names and platform strings. Signed-off-by: Barry Song <barry.song@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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