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* Blackfin arch: move hard coded pin_req to board fileBryan Wu2007-11-124-0/+8
| | | | | | | | | | | Remove some sort of bloaty code, try to get these pin_req arrays built at compile-time - move this static things to the blackfin board file - add pin_req array to struct bfin5xx_spi_master - tested on BF537/BF548 with SPI flash Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: fix libata data struct member from irq_type to irq_flagsMike Frysinger2007-10-301-1/+1
| | | | | | Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: Fix bug set correct baud for spi mmc and enable SPI after DMA.Sonic Zhang2007-10-301-2/+2
| | | | | | | | | | | | | | | | Changes: 1. The baud for spi mmc defined in board file is not used by the old spi driver. A slower value from spi framework is used instead. In latest bug fixing, the correct baud is use which is too high for spi MMC card. 2. SPI is enabled only after DMA is started. 3. MMC detection IRQ is set to 55. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: fix bug BlueTechnix CM-BF537 board config uses wrong IRQ for ↵Michael Hennerich2007-10-291-2/+2
| | | | | | | | net2272 driver Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: use "char bfin_board_name[]" rather than "char ↵Mike Frysinger2007-10-214-4/+4
| | | | | | | | *bfin_board_name" per discussion on lkml as the former uses less storage Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* USB: re-remove <linux/usb_sl811.h>David Brownell2007-10-123-3/+3
| | | | | | | | | | Remove <linux/usb_sl811.h> ... somehow this was recreated when the Blackfin arch was merged, instead of using <linux/usb/sl811.h> which is the correct header. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* Blackfin arch: update platform driver resource information to all board filesBryan Wu2007-10-114-110/+569
| | | | | Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: Port the dm9000 driver to Blackfin by using the correct ↵Alex Landau2007-07-121-0/+26
| | | | | | | | low-level io routines Signed-off-by: Alex Landau <landau.alex@gmail.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: cleanup warnings from checkpatch -- no functional changesMike Frysinger2007-07-125-97/+65
| | | | | | Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: spelling fixesSimon Arlott2007-06-113-3/+3
| | | | | | Signed-off-by: Simon Arlott <simon@fire.lp0.eu> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* blackfin architectureBryan Wu2007-05-077-0/+2190
This adds support for the Analog Devices Blackfin processor architecture, and currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561 (Dual Core) devices, with a variety of development platforms including those avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP, BF561-EZKIT), and Bluetechnix! Tinyboards. The Blackfin architecture was jointly developed by Intel and Analog Devices Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in December of 2000. Since then ADI has put this core into its Blackfin processor family of devices. The Blackfin core has the advantages of a clean, orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC (Multiply/Accumulate), state-of-the-art signal processing engine and single-instruction, multiple-data (SIMD) multimedia capabilities into a single instruction-set architecture. The Blackfin architecture, including the instruction set, is described by the ADSP-BF53x/BF56x Blackfin Processor Programming Reference http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf The Blackfin processor is already supported by major releases of gcc, and there are binary and source rpms/tarballs for many architectures at: http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete documentation, including "getting started" guides available at: http://docs.blackfin.uclinux.org/ which provides links to the sources and patches you will need in order to set up a cross-compiling environment for bfin-linux-uclibc This patch, as well as the other patches (toolchain, distribution, uClibc) are actively supported by Analog Devices Inc, at: http://blackfin.uclinux.org/ We have tested this on LTP, and our test plan (including pass/fails) can be found at: http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel [m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files] Signed-off-by: Bryan Wu <bryan.wu@analog.com> Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl> Signed-off-by: Aubrey Li <aubrey.li@analog.com> Signed-off-by: Jie Zhang <jie.zhang@analog.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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