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* Blackfin arch: remove spurious dash when dcache is offMike Frysinger2009-03-051-3/+3
| | | | | | Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: Random read/write errors are a bad thingRobin Getz2009-03-051-0/+4
| | | | | | | | | Random read/write errors are a bad thing - so don't let anyone (including the test bench) run on something we know is bad. Signed-off-by: Robin Getz <rgetz@blackfin.uclinux.org> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: Update Copyright informationMichael Hennerich2009-02-041-1/+1
| | | | | | Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: define bfin_memmap as static since it is only used hereMike Frysinger2009-02-041-1/+1
| | | | | | Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: read SYSCR on newer parts that mirror the bits of SWRST in itMike Frysinger2009-02-041-0/+6
| | | | | | Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: Print out where the bootmode is coming from (for easier ↵Robin Getz2009-02-041-0/+2
| | | | | | | | debugging). Signed-off-by: Robin Getz <rgetz@blackfin.uclinux.org> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: rewrite get_sclk()/get_vco()Mike Frysinger2009-01-071-15/+16
| | | | | | | | | rewrite get_sclk()/get_vco() based on the assumption sclk/vco never changes (since today it cannot) Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: Faster C implementation of no-MPU CPLB handlerBernd Schmidt2009-01-071-8/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a mixture ofcMichael McTernan's patch and the existing cplb-mpu code. We ditch the old cplb-nompu implementation, which is a good example of why a good algorithm in a HLL is preferrable to a bad algorithm written in assembly. Rather than try to construct a table of all posible CPLBs and search it, we just create a (smaller) table of memory regions and their attributes. Some of the data structures are now unified for both the mpu and nompu cases. A lot of needless complexity in cplbinit.c is removed. Further optimizations: * compile cplbmgr.c with a lot of -ffixed-reg options, and omit saving these registers on the stack when entering a CPLB exception. * lose cli/nop/nop/sti sequences for some workarounds - these don't * make sense in an exception context Additional code unification should be possible after this. [Mike Frysinger <vapier.adi@gmail.com>: - convert CPP if statements to C if statements - remove redundant statements - use a do...while loop rather than a for loop to get slightly better optimization and to avoid gcc "may be used uninitialized" warnings ... we know that the [id]cplb_nr_bounds variables will never be 0, so this is OK - the no-mpu code was the last user of MAX_MEM_SIZE and with that rewritten, we can punt it - add some BUG_ON() checks to make sure we dont overflow the small cplb_bounds array - add i/d cplb entries for the bootrom because there is functions/data in there we want to access - we do not need a NULL trailing entry as any time we access the bounds arrays, we use the nr_bounds variable ] Signed-off-by: Michael McTernan <mmcternan@airvana.com> Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bernd Schmidt <bernds_cb1@t-online.de> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: panic when running on a chip rev below what we are compiled forRobin Getz2009-01-071-1/+4
| | | | | | | | | | | If we are running on a chip revision below what we are compiled for, there will be missing anomaly workarounds, and a panic is inevitable. Do is sooner, rather than later, so people don't look for bugs that already have workarounds (that they turned off). Signed-off-by: Robin Getz <rgetz@blackfin.uclinux.org> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: do not allow people to pass in a diff clkin_hz valueMike Frysinger2009-01-071-0/+4
| | | | | | | | | do not allow people to pass in a diff clkin_hz value when reprogramming clocks -- it is too late currently Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: allow clkin_hz to be specified on the command lineMike Frysinger2009-01-071-3/+21
| | | | | | Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: show_cpuinfo - consolidate ugly castsMike Frysinger2009-01-071-11/+8
| | | | | | | | | rather than use *(unsigned int *)v everywhere, do this once with a local cpu_num variable Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: include linux/mm.h since we use PAGE_ALIGN and suchMike Frysinger2009-01-071-0/+1
| | | | | | Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: rewrite dma_memcpy() and dma in/out functionsMike Frysinger2009-01-071-0/+2
| | | | | | | | | | | | | | - unify all dma in/out functions (takes ~35 lines of code now) - unify dma_memcpy with dma in/out functions (1 place that touches MDMA0 registers) - add support for 32bit transfers - cleanup dma_memcpy code to be much more readable - irqs are disabled only while programming MDMA registers rather than the entire transaction Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: delete now unused "cclk" member of blackfin_cpudataMike Frysinger2009-01-071-1/+0
| | | | | | Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: Fix bug - change cpufreq doesn't take effect on bf537 nowMichael Hennerich2008-11-181-3/+4
| | | | | | | | CCLK is variable: get current CCLK in show_cpuinfo Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: SMP supporting patchset: Blackfin kernel and memory ↵Graf Yang2008-11-181-52/+111
| | | | | | | | | | | | | | management code Blackfin dual core BF561 processor can support SMP like features. https://docs.blackfin.uclinux.org/doku.php?id=linux-kernel:smp-like In this patch, we provide SMP extend to Blackfin kernel and memory management code Singed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: dont warn when running a kernel on the oldest supported siliconMike Frysinger2008-10-281-1/+1
| | | | | | Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: don't copy bss when copying L1Mike Frysinger2008-10-271-5/+5
| | | | | | | | | when copying L1 regions, go to the start of bss rather than end since we have code to zero it out already Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: introducing bfin_addr_dcachableVitja Makarov2008-10-131-0/+1
| | | | | | | | This patch introduces bfin_addr_dcachable() predicate, that simply tests is address in cachable region or not. Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: fix a typo in commentsBryan Wu2008-10-101-1/+1
| | | | | Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: print out error/warning if you are running on the incorrect ↵Robin Getz2008-10-101-16/+27
| | | | | | | | CPU type Signed-off-by: Robin Getz <rgetz@blackfin.uclinux.org> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: Move all the silicon rev handling to one placeMike Frysinger2008-10-091-1/+2
| | | | | | | | | Move all the silicon rev handling to one place (Kconfig) and make sure we warn if you are running on silicon that has not been tested on Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: correct icache size in show_cpuinfo(), let c_start() return ↵Graf Yang2008-10-091-4/+10
| | | | | | | | proper pointer Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: Modify some funtion names to more genernal onesGraf Yang2008-10-081-4/+4
| | | | | | Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: add supporting for double fault debug handlingRobin Getz2008-10-081-10/+20
| | | | | | | Signed-off-by: Robin Getz <rgetz@blackfin.uclinux.org> Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: use %pF when printing out the double fault address so we get ↵Mike Frysinger2008-08-141-1/+1
| | | | | | | | symbol names Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: Print out doublefault addresses, so debug can occurRobin Getz2008-08-141-1/+6
| | | | | | Signed-off-by: Robin Getz <rgetz@blackfin.uclinux.org> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: cleanup cache lock codeMike Frysinger2008-08-141-1/+1
| | | | | | | | | | | - remove cheesy read_iloc() function - move invalidate_entire_icache function to lock.S - export proper prototypes for functions in lock.S - only build lock.S when BFIN_ICACHE_LOCK is enabled Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: convert L2 defines to be the same as the L1 definesMike Frysinger2008-08-131-7/+7
| | | | | | Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: move async memory programming into common setup_arch() as the ↵Mike Frysinger2008-08-061-0/+10
| | | | | | | | banks dont really need to be setup fully as early as head.S Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: If we double fault, rather than hang forever, resetRobin Getz2008-07-261-2/+5
| | | | | | Signed-off-by: Robin Getz <rgetz@blackfin.uclinux.org> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: When icache is off, make sure people know itRobin Getz2008-07-261-5/+12
| | | | | | Signed-off-by: Robin Getz <rgetz@blackfin.uclinux.org> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: cache the values of vco/sclk/cclk as the overhead of doing so ↵Mike Frysinger2008-07-261-10/+34
| | | | | | | | (~24 bytes) is worth avoiding the software mult/div routines Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: check the EXTBANKS field of the DDRCTL1 register to see if we ↵Mike Frysinger2008-07-261-0/+2
| | | | | | | | are using both memory banks Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: Extend sram malloc to handle L2 SRAM.Sonic Zhang2008-07-191-0/+10
| | | | | | | | | | | | Extend system call to alloc L2 SRAM in application. Automatically move following sections to L2 SRAM: 1. kernel built-in l2 attribute section 2. kernel module l2 attribute section 3. elf-fdpic application l2 attribute section Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: Remove redundant kernel optionMichael Hennerich2008-07-141-9/+5
| | | | | | | | | use kernel command line mem and max_mem bootargs to limit availabe memory instead. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* [Blackfin] arch: take DDR DEVWD into consideration as well for BF548Michael Hennerich2008-04-251-6/+13
| | | | | | | Pointed-out-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* [Blackfin] arch: BF54x memsizes are in mbits, not mbytesMike Frysinger2008-04-251-4/+4
| | | | | | | Pointed-out-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* [Blackfin] arch: detect the memory available in the system on the fly by defaultMike Frysinger2008-04-251-1/+44
| | | | | | | | | detect the memory available in the system on the fly by default rather than forcing people to set this manually in the kconfig Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* [Blackfin] arch: now that we can panic() early, dont need the delayed L1 ↵Mike Frysinger2008-04-241-11/+1
| | | | | | | | overflow check Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* [Blackfin] arch: fix bug - Section data_l1_cacheline_aligned should be ↵Sonic Zhang2008-04-241-3/+3
| | | | | | | | | | | | | | | | | | | | | defined in link script of kernel http://blackfin.uclinux.org/gf/project/uclinux-dist/tracker/?action=TrackerItemEdit&tracker_item_id=3978 Section data_l1_cacheline_aligned should be defined in link script of kernel, when L1 data sram bank A is not available. In bf536 with all data cache is enabled, there is no L1 data sram. Current link script won't define section data_l1.cacheline_aligned in this case. But, if user select put cacheline_aligned data into l1 sram in kernel menuconfig, these data will be dropped and access to these data will trigger data CPLB exception. Do panic in l1 relocation code as well. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* [Blackfin] arch: Add a little bit more runtime info for MPURobin Getz2008-04-241-2/+6
| | | | | | Signed-off-by: Robin Getz <rgetz@blackfin.uclinux.org> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* [Blackfin] arch: theres no need to declare ram{end,start,base} in the head.S ↵Mike Frysinger2008-04-241-0/+1
| | | | | | | | | | | | files theres no need to declare ram{end,start,base} in the head.S files when declaring them with the other memory related variables in setup.c is so much simpler/nicer Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* [Blackfin] arch: add code to initialize globals declared in linux/bootmem.h: ↵Yi Li2008-03-261-7/+45
| | | | | | | | max_pfn, max_low_pfn, min_low_pfn. Signed-off-by: Yi Li <yi.li@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* [Blackfin] arch: make sure we export the _bfin_swrst symbol as modules (like ↵Mike Frysinger2008-02-251-0/+1
| | | | | | | | the watchdog) need it Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* [Blackfin] arch: add fixed code to the memory map outputMike Frysinger2008-02-221-1/+3
| | | | | | Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* [Blackfin] arch: fix building with mtd uclinux by putting the mtd_phys ↵Mike Frysinger2008-02-021-3/+4
| | | | | | | | option into the function it actually gets used in Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* [Blackfin] arch: simpler header and update datesMike Frysinger2008-02-021-24/+5
| | | | | | Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* [Blackfin] arch: move the init sections to the end of memoryMike Frysinger2008-02-021-7/+7
| | | | | | | | | | | | | | | Move the init sections to the end of memory so that after they are free, run time memory is all continugous - this should help decrease memory fragementation. When doing this, we also pack some of the other sections a little closer together, to make sure we don't waste memory. To make this happen, we need to rename the .data.init_task section to .init_task.data, so it doesn't get picked up by the linker script glob. Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
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