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* dma-mapping: replace all DMA_32BIT_MASK macro with DMA_BIT_MASK(32)Yang Hongyang2009-04-071-4/+4
| | | | | | | | Replace all DMA_32BIT_MASK macro with DMA_BIT_MASK(32) Signed-off-by: Yang Hongyang<yanghy@cn.fujitsu.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* avr32: add RTS/CTS/CLK pin selection for the USARTsPeter Ma2009-04-011-9/+21
| | | | | | | | | | | Adds extra parameter to AT32 at32_map_usart(), so as to reserve RTS/CTS/CLK pins. All boards under arch/avr32/boards have been updated (trivial change), but not all have been tested. Signed-off-by: Peter Ma <pma@mediamatech.com> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* avr32: at32ap700x: setup DMA for AC97C in the machine codeHans-Christian Egtvedt2009-03-271-16/+35
| | | | | | | | | | | | | | | | | | | | This patch will adjust the setup the DMA controller for the AC97 Controller in the at32ap700x machine code. This setup matches the new ALSA driver for the AC97C. The struct ac97c_platform_data has been moved into its own header file located in the sound include path. Tested on ATSTK1006 + ATSTK1000. This patch will setup the AC97 controller properly for the adjusted machine code. Both EVKLCD10x and Hammerhead board has been updated. Tested on EVKLCD10x, and copied to Hammerhead board. Signed-off-by: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com> [haavard.skinnemoen@atmel.com: fold with board code update] Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* avr32: at32ap700x: setup DMA for ABDAC in the machine codeHans-Christian Egtvedt2009-03-271-7/+22
| | | | | | | | | | | | | | | This patch will adjust the setup the DMA controller for the Audio Bistream DAC in the at32ap700x machine code. This setup matches the new ALSA driver for the ABDAC. Tested on ATSTK1006 + ATSTK1000. This patch will setup the needed platform data for the Audio Bistream DAC used by the Favr-32 board. Signed-off-by: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com> [haavard.skinnemoen@atmel.com: fold board code update] Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* avr32: use gpio_is_valid() to check USBA vbus_pin I/O lineHans-Christian Egtvedt2009-03-261-1/+1
| | | | | | | This patch will use gpio_is_valid() to check the vbus_pin I/O line. Signed-off-by: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* Merge branch 'next' of ↵Linus Torvalds2009-01-091-12/+3
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx * 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx: (22 commits) ioat: fix self test for multi-channel case dmaengine: bump initcall level to arch_initcall dmaengine: advertise all channels on a device to dma_filter_fn dmaengine: use idr for registering dma device numbers dmaengine: add a release for dma class devices and dependent infrastructure ioat: do not perform removal actions at shutdown iop-adma: enable module removal iop-adma: kill debug BUG_ON iop-adma: let devm do its job, don't duplicate free dmaengine: kill enum dma_state_client dmaengine: remove 'bigref' infrastructure dmaengine: kill struct dma_client and supporting infrastructure dmaengine: replace dma_async_client_register with dmaengine_get atmel-mci: convert to dma_request_channel and down-level dma_slave dmatest: convert to dma_request_channel dmaengine: introduce dma_request_channel and private channels net_dma: convert to dma_find_channel dmaengine: provide a common 'issue_pending_all' implementation dmaengine: centralize channel allocation, introduce dma_find_channel dmaengine: up-level reference counting to the module level ...
| * atmel-mci: convert to dma_request_channel and down-level dma_slaveDan Williams2009-01-061-12/+3
| | | | | | | | | | | | | | | | | | | | | | dma_request_channel provides an exclusive channel, so we no longer need to pass slave data through dmaengine. Cc: Haavard Skinnemoen <haavard.skinnemoen@atmel.com> Reviewed-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
* | Merge branch 'move-atmel-mci-h' into boardsHaavard Skinnemoen2009-01-051-1/+1
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| * | atmel-mci: move atmel-mci.h file to include/linuxNicolas Ferre2009-01-051-1/+1
| |/ | | | | | | | | | | | | | | Needed to use the atmel-mci driver in an architecture independant maner. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* | avr32: Hammerhead board supportAlex Raimondi2009-01-051-2/+2
|/ | | | | | | | | | | | | | | | | | | | | The Hammerhead platform is built around a AVR32 32-bit microcontroller from Atmel. It offers versatile peripherals, such as ethernet, usb device, usb host etc. The board also incooperates a power supply and is a Power over Ethernet (PoE) Powered Device (PD). Additonally, a Cyclone III FPGA from Altera is integrated on the board. The FPGA is mapped into the 32-bit AVR memory bus. The FPGA offers two DDR2 SDRAM interfaces, which will cover even the most exceptional need of memory bandwidth. Together with the onboard video decoder the board is ready for video processing. This patch does include the basic support for the fpga device driver, but not the device driver itself. Signed-off-by: Alex Raimondi <mailinglist@miromico.ch> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* avr32: Enable pullup on USART TX linesAnders Blomdell2008-10-241-4/+4
| | | | | | | | | | Make USART initialization conform to Section 24.6.1 in the AT32AP7000 manual, i.e. "To prevent the TXD line from falling when the USART is disabled, the use of an internal pull up is mandatory." Signed-off-by: Anders Blomdell <anders.blomdell@control.lth.se> [haavard.skinnemoen@atmel.com: enable pullup on RX as well] Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* Merge branches 'boards' and 'fixes' of ↵Haavard Skinnemoen2008-10-231-2/+5
|\ | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/hskinnemoen/avr32-2.6
| * avr32: Fix GPIO initcall breakageHaavard Skinnemoen2008-10-231-1/+4
| | | | | | | | | | | | | | | | | | | | Add essential system devices, including GPIO controllers, automatically at core_initcall time. This ensures that the devices are there when the PIO driver gets initialized at postcore_initcall, fixing a bug exposed by commit d6634db8fe1784d0a8e4e156970fec034708446e "avr32: Use platform_driver_probe for pio platform driver". Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
| * avr32: Fix bug in LCD pin setup on port CAlex Raimondi2008-10-231-1/+1
| | | | | | | | | | | | | | Bug was introduced with the new at32_select_periph function. Signed-off-by: Alex Raimondi <mailinglist@miromico.ch> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* | avr32: Fix MIMC200 board use of SPD network pinsMark Jackson2008-10-131-0/+4
|/ | | | | | | | | | | | | | The MIMC200 board uses the SPD output pin from the Ethernet MACs for other purposes. One of these is as a board-reset, so I've had to #define off the SPD output pin declaration. This is probably not the best way of achieving this, but works in the current framework. Signed-off-by: Mark Jackson <mpfj@mimc.co.uk> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* avr32: Allow selecting multiple pins at onceJulien May2008-10-121-128/+179
| | | | | | | | at32_select_periph() now takes an u32 bitmask rather than a single pin. This allows to set multiple pins at once. Signed-off-by: Alex Raimondi <mailinglist@miromico.ch> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* Merge branch 'master' of ↵Haavard Skinnemoen2008-10-121-18/+70
|\ | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/hskinnemoen/atmel-mci-2.6.28
| * atmel-mci: Add experimental DMA supportHaavard Skinnemoen2008-10-051-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds support for DMA transfers through the generic DMA engine framework with the DMA slave extensions. The driver has been tested using mmc-block and ext3fs on several SD, SDHC and MMC+ cards. Reads and writes work fine, with read transfer rates up to 7.5 MiB/s on fast cards with debugging disabled. Unfortunately, the driver has been known to lock up from time to time with DMA enabled, so DMA support is currently optional and marked EXPERIMENTAL. However, I didn't see any problems while testing 13 different cards (MMC, SD and SDHC of different brands and sizes), so I suspect the "Initialize BLKR before sending data transfer command" fix that was posted earlier fixed this as well. Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
| * atmel-mci: Platform code for supporting multiple mmc slotsHaavard Skinnemoen2008-10-051-18/+54
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the necessary platform infrastructure to support multiple mmc/sdcard slots all at once through a single controller. Currently, the driver will use the first valid slot it finds and stick with that, but later patches will add support for switching between several slots on the fly. Extend the platform data structure with per-slot information: MMC/SDcard bus width and card detect/write protect pins. This will affect the pin muxing as well as the capabilities announced to the mmc core. Note that board code is now required to supply a mci_platform_data struct to at32_add_device_mci(). Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* | avr32: Replace static clock list with dynamic linked listAlex Raimondi2008-10-051-9/+13
| | | | | | | | | | | | | | | | This replaces the at32_clock_list array with a linked list. Clocks can now be registered (added) to the list. Signed-off-by: Alex Raimondi <raimondi@miromico.ch> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* | avr32: Allow fine-grained control over LCDC pinsJulien May2008-09-221-70/+25
|/ | | | | | | | | | This replaces the pin_config param with an u64 pin_mask in at32_add_device_lcdc, allowing a board-maintainer to indivually select specific lcdc pins. Signed-off-by: Alex Raimondi <raimondi@miromico.ch> Signed-off-by: Julien May <jmay@miromico.ch> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* avr32: Clean up HMATRIX codeHaavard Skinnemoen2008-08-081-19/+7
| | | | | | | | | | | Introduce a few helper functions for HMATRIX configuration and clean up the register definitions. Also add definitions for the HMATRIX master and slave IDs on the AT32AP700x chips. Also make the definitions in hmatrix.h available to board code by moving it to <mach/hmatrix.h> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* avr32: Use <mach/foo.h> instead of <asm/arch/foo.h>Haavard Skinnemoen2008-08-051-4/+4
| | | | | | | Update all avr32-specific files to use the new platform-specific header locations. Drivers shared with ARM are left alone for now. Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* avr32: some mmc/sd cleanupsDavid Brownell2008-07-271-6/+7
| | | | | | | | | | | | | | | | | | | | Minor cleanups for the MMC/SD support on avr32: - Make at32_add_device_mci() properly initialize "missing" platform data ... so boards like STK1002 won't try GPIO 0. - Switch over to gpio_is_valid() instead of testing for only one designated value. - Provide STK1002 platform data for the unlikely case that switches are set so first Ethernet controller isn't in use. (That's the only way to get card detect and writeprotect switch sensing on the STK1000.) And get rid of one "unused variable" warning. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* Merge commit 'upstream/master'Haavard Skinnemoen2008-07-271-13/+66
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| * Merge branch 'linux-next' of git://git.infradead.org/~dedekind/ubi-2.6David Woodhouse2008-07-251-71/+238
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| | * Merge branch 'for-linus' of ↵Linus Torvalds2008-07-231-13/+14
| | |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx: (24 commits) I/OAT: I/OAT version 3.0 support I/OAT: tcp_dma_copybreak default value dependent on I/OAT version I/OAT: Add watchdog/reset functionality to ioatdma iop_adma: cleanup iop_chan_xor_slot_count iop_adma: document how to calculate the minimum descriptor pool size iop_adma: directly reclaim descriptors on allocation failure async_tx: make async_tx_test_ack a boolean routine async_tx: remove depend_tx from async_tx_sync_epilog async_tx: export async_tx_quiesce async_tx: fix handling of the "out of descriptor" condition in async_xor async_tx: ensure the xor destination buffer remains dma-mapped async_tx: list_for_each_entry_rcu() cleanup dmaengine: Driver for the Synopsys DesignWare DMA controller dmaengine: Add slave DMA interface dmaengine: add DMA_COMPL_SKIP_{SRC,DEST}_UNMAP flags to control dma unmap dmaengine: Add dma_client parameter to device_alloc_chan_resources dmatest: Simple DMA memcpy test client dmaengine: DMA engine driver for Marvell XOR engine iop-adma: fix platform driver hotplug/coldplug dmaengine: track the number of clients using a channel ... Fixed up conflict in drivers/dca/dca-sysfs.c manually
| | | * dmaengine: Driver for the Synopsys DesignWare DMA controllerHaavard Skinnemoen2008-07-081-13/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds a driver for the Synopsys DesignWare DMA controller (aka DMACA on AVR32 systems.) This DMA controller can be found integrated on the AT32AP7000 chip and is primarily meant for peripheral DMA transfer, but can also be used for memory-to-memory transfers. This patch is based on a driver from David Brownell which was based on an older version of the DMA Engine framework. It also implements the proposed extensions to the DMA Engine API for slave DMA operations. The dmatest client shows no problems, but there may still be room for improvement performance-wise. DMA slave transfer performance is definitely "good enough"; reading 100 MiB from an SD card running at ~20 MHz yields ~7.2 MiB/s average transfer rate. Full documentation for this controller can be found in the Synopsys DW AHB DMAC Databook: http://www.synopsys.com/designware/docs/iip/DW_ahb_dmac/latest/doc/dw_ahb_dmac_db.pdf The controller has lots of implementation options, so it's usually a good idea to check the data sheet of the chip it's intergrated on as well. The AT32AP7000 data sheet can be found here: http://www.atmel.com/dyn/products/datasheets.asp?family_id=682 Changes since v4: * Use client_count instead of dma_chan_is_in_use() * Add missing include * Unmap buffers unless client told us not to Changes since v3: * Update to latest DMA engine and DMA slave APIs * Embed the hw descriptor into the sw descriptor * Clean up and update MODULE_DESCRIPTION, copyright date, etc. Changes since v2: * Dequeue all pending transfers in terminate_all() * Rename dw_dmac.h -> dw_dmac_regs.h * Define and use controller-specific dma_slave data * Fix up a few outdated comments * Define hardware registers as structs (doesn't generate better code, unfortunately, but it looks nicer.) * Get number of channels from platform_data instead of hardcoding it based on CONFIG_WHATEVER_CPU. * Give slave clients exclusive access to the channel Acked-by: Maciej Sosnowski <maciej.sosnowski@intel.com>, Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * | | [MTD] [NAND] avr32: atmel_nand platform code for AT32AP700xHåvard Skinnemoen2008-06-071-0/+52
| | |/ | |/| | | | | | | | | | | | | | | | | | | This function initializes and adds a platform_device for a NAND flash interface on SMC chip select 3. Signed-off-by: Håvard Skinnemoen <haavard.skinnemoen@atmel.com> Signed-off-by: David Woodhouse <dwmw2@infradead.org>
* | | avr32: Add platform data for AC97C platform deviceHans-Christian Egtvedt2008-07-241-7/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds platform data to the AC97C platform device. This will let the board add a GPIO line which is connected to the external codecs reset line. The platform data, ac97c_platform_data, must also contain the DMA controller ID, RX channel ID and TX channel ID. Tested with Wolfson WM9712 and AP7000. Signed-off-by: Hans-Christian Egtvedt <hcegtvedt@atmel.com> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* | | avr32: clean up mci platform codeBen Nizette2008-07-181-7/+6
| |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch does a few small cleanups around the atmel mci platform code and in the atmel-mci driver. The platform changes simply removes an unused variable, uses the fact that by the end we always have some form of platform data and notes that GPIO_PIN_NONE != 0. This last point could cause the incorrect attempt to twice reserve pin PA0. While we've got the hood up, add linux/err.h to the atmel-mci.c include list. It needs it and generally pulls it by voodoo but I did once stumble across a config which don't build. This is against Linus' latest git. Signed-off-by: Ben Nizette <bn@niasdigital.com> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* | atmel-mci: Driver for Atmel on-chip MMC controllersHaavard Skinnemoen2008-07-151-5/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a driver for the MMC controller on the AP7000 chips from Atmel. It should in theory work on AT91 systems too with some tweaking, but since the DMA interface is quite different, it's not entirely clear if it's worth merging this with the at91_mci driver. This driver has been around for a while in BSPs and kernel sources provided by Atmel, but this particular version uses the generic DMA Engine framework (with the slave extensions) instead of an avr32-only DMA controller framework. This driver can also use PIO transfers when no DMA channels are available, and for transfers where using DMA may be difficult or impractical for some reason (e.g. the DMA setup overhead is usually not worth it for very short transfers, and badly aligned buffers or lengths are difficult to handle.) Currently, the driver only support PIO transfers. DMA support has been split out to a separate patch to hopefully make it easier to review. The driver has been tested using mmc-block and ext3fs on several SD, SDHC and MMC+ cards. Reads and writes work fine, with read transfer rates up to 3.5 MiB/s on fast cards with debugging disabled. The driver has also been tested using the mmc_test module on the same cards. All tests except 7, 9, 15 and 17 succeed. The first two are unsupported by all the cards I have, so I don't know if the driver handles this correctly. The last two fail because the hardware flags a Data CRC Error instead of a Data Timeout error. I'm not sure how to deal with that. Documentation for this controller can be found in many data sheets from Atmel, including the AT32AP7000 data sheet which can be found here: http://www.atmel.com/dyn/products/datasheets.asp?family_id=682 Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com> Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
* | avr32: Add simple SRAM allocatorHaavard Skinnemoen2008-07-021-0/+26
| | | | | | | | | | | | | | Add SRAM allocator for avr32, which is just a thin wrapper around genalloc. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* | avr32: Enable SDRAMC clock at startupHaavard Skinnemoen2008-07-021-0/+9
| | | | | | | | | | | | | | | | The SDRAM controller needs a clock in order to respond to our commands, and suspend doesn't work very well without the SDRAM in self-refresh mode. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* | avr32: Move setup_platform() into chip-specific fileHaavard Skinnemoen2008-06-281-10/+8
| | | | | | | | | | | | | | | | | | Combine at32_clock_init() and at32_portmux_init() into setup_platform() and remove setup_platform() from at32ap.c. No functional change since all setup_platform() ever did was call those two functions. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* | atmel_pwm: Rename the "mck" clock to "pwm_clk"Sedji Gaouaou2008-06-271-1/+1
| | | | | | | | | | | | | | The name "mck" causes a conflict on AT91. Call it "pwm_clk" instead. Signed-off-by: Sedji Gaouaou <sedji.gaouaou@atmel.com> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* | at32ap700x spi: enable pullups on MISODavid Brownell2008-06-271-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a minor tweak to the at32ap700x pin configuration for the SPI input pin (MISO), enabling the on-chip weak pullup (typical 190K) to (a) ensure a fixed data value for missing or input-only slaves; (b) prevent power waste associated with inputs floating near VDDIO/2. Atmel's boards have no external pullup or pulldown on these pins, so it's unlikely other boards would address these issues with external pulldowns. Were there trouble, board-specific code could turn off the relevant pullup(s). Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* | avr32: Add PSIF platform devicesHans-Christian Egtvedt2008-06-271-0/+77
| | | | | | | | | | | | | | | | | | | | | | This patch adds the PS/2 interface (PSIF) to the device code, split into two platform devices, one for each port. The function for adding the PSIF platform device is also added to the board header file. Signed-off-by: Hans-Christian Egtvedt <hcegtvedt@atmel.com> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* | avr32: Add pin configuration choice to LCDC peripheralHans-Christian Egtvedt2008-06-271-32/+73
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch lets the board code choose which pin out to use for the LCD interface. On AT32AP7000 the LCDC is wired to two sets of pins, which lets the user choose between dual ethernet and 32-bit EBI. For the ATNGW100 board it is vital to have the choice to select the alternative pinout since this pinout is routed to the external headers. Update ATSTK1002 and ATSTK1004 to use the new interface. Signed-off-by: Hans-Christian Egtvedt <hcegtvedt@atmel.com> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* | avr32: Allow board to define oscillator ratesAlex2008-06-271-8/+1
|/ | | | | | | | | | | | On our custom board we have other oscillator rates than on atngw100 and atstk100x. Currently these rates are hardcoded in arch/avr32/mach-at32ap/at32ap700x.c. This patch moves them into board specific code. Signed-off-by: Alex Raimondi <raimondi@miromico.ch> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* avr32: Implement set_rate(), set_parent() and mode() for pll1Hans-Christian Egtvedt2008-04-191-3/+150
| | | | | | | | | | | | | | This patch is a take two of adding full functionality to PLL1 on AT32AP7000. This allows board-specific code and drivers to configure and enable PLL1. This is useful when precise control over the frequency of e.g. a genclock is needed and requested by users for the ABDAC device. The patch is based upon previous patches from both Haavard Skinnemoen and David Brownell. Signed-off-by: Hans-Christian Egtvedt <hcegtvedt@atmel.com> Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* avr32: Generic clockevents supportDavid Brownell2008-04-191-9/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This combines three patches from David Brownell: * avr32: tclib support * avr32: simplify clocksources * avr32: Turn count/compare into a oneshot clockevent device Register both TC blocks (instead of just the first one) so that the AT32/AT91 tclib code will pick them up (instead of just the avr32-only PIT-style clocksource). Rename the first one and its resources appropriately. More cleanups to the cycle counter clocksource code - Disable all the weak symbol magic; remove the AVR32-only TCB-based clocksource code (source and header). - Mark the __init code properly. - Don't forget to report IRQF_TIMER. - Make the system work properly with this clocksource, by preventing use of the CPU "idle" sleep state in the idle loop when it's used. Package the avr32 count/compare timekeeping support as a oneshot clockevent device, so it supports NO_HZ and high res timers. This means it also supports plugging in other clockevent devices and clocksources. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* avr32: pass i2c board info through at32_add_device_twiBen Nizette2008-04-191-1/+6
| | | | | | | | | | | | | | New-style I2C drivers require that motherboard-mounted I2C devices are registered with the I2C core, typically at arch_initcall time. This can be done nice and neat by passing the struct i2c_board_info[] through at32_add_device_twi just like we do for the SPI board info. While we've got the hood up, remove a duplicate declaration of at32_add_device_twi() in board.h. [hskinnemoen@atmel.com: add missing i2c_board_info forward-declaration] Signed-Off-By: Ben Nizette <bn@niasdigital.com> Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* atmel_usba_udc: move endpoint declarations into platform data.Stelian Pop2008-04-061-6/+44
| | | | | | | | | | | | | | The atmel_usba_udc driver is being used by several platforms and arches (avr32 and at91 ATM), and each platform may have different endpoint settings. The patch below moves the endpoint declarations into the platform data and make the necessary adjustments for AVR32 (improved by Haavard Skinnemoen <hskinnemoen@atmel.com>). Signed-off-by: Stelian Pop <stelian@popies.net> Acked-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* Basic PWM driver for AVR32 and AT91David Brownell2008-02-081-0/+54
| | | | | | | | | | | | | | | PWM device setup, and a simple PWM driver exposing a programming interface giving access to each channel's full capabilities. Note that this doesn't support starting several channels in synch. [hskinnemoen@atmel.com: allocate platform device dynamically] [hskinnemoen@atmel.com: Kconfig fix] Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Cc: Andrew Victor <linux@maxim.org.za> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* [AVR32] NMI debuggingHaavard Skinnemoen2008-01-251-0/+1
| | | | | | | | Change the NMI handler to use the die notifier chain to signal anyone who cares. Add a simple "nmi debugger" which hooks into this chain and that may dump registers, task state, etc. when it happens. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* [AVR32] Add support for AT32AP7001 and AT32AP7002Haavard Skinnemoen2008-01-251-0/+1742
These are derivatives of the AT32AP7000 chip, which means that most of the code stays the same. Rename a few files, functions, definitions and config symbols to reflect that they apply to all AP700x chips, and exclude some platform devices from chips where they aren't present. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
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