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* omapfb: lcd_ams_delta: drive control lines over GPIOJanusz Krzysztofik2011-12-222-12/+0
| | | | | | | | | Don't use Amstrad Delta custom I/O functions any longer, use GPIO API instead. Signed-off-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl> Acked-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* MTD: NAND: ams-delta: use GPIO instead of custom I/OJanusz Krzysztofik2011-12-222-36/+0
| | | | | | | | | | | | Don't use Amstrad Delta custom I/O functions for controlling the device, use GPIO API instead. While being at it, add missing gpio_free(AMS_DELTA_GPIO_PIN_NAND_RB). Signed-off-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl> Cc: David Woodhouse <dwmw2@infradead.org> Reviewed-by: Artem Bityutskiy <Artem.Bityutskiy@linux.intel.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: OMAP1: ams-delta: supersede custom led device by leds-gpioJanusz Krzysztofik2011-12-223-58/+49
| | | | | | | | | Now that the Amstrad Delta on-board latches have been converted to GPIO devices, use the generic driver to control on-board LEDs which hang off those latches. Signed-off-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: OMAP1: ams-delta: convert latches to basic_mmio_gpioJanusz Krzysztofik2011-12-223-39/+242
| | | | | | | | | | | | | | | | | | | | | | | | | | Once ready, ams-delta specific device drivers currently calling custom ams_delta_latch[12]_write() functions can be updated to call generic gpio_set_value() instead, which will make them less platform dependent. Even more, some custom ams-delta only drivers can perhaps be dropped from the tree after converting selected ams-delta platform devices to follow generic GPIO based device models. The latch_gpios[] table is initially filled with all latch1 and latch2 GPIO pins in order to register and initialize them from the board file until those are handled by respective existing device drivers (leds, nand, lcd, serio, asoc, serial). That table will get almost empty after the transision process is completed, holding only pins not used by any drivers / connected to unused devices, in order to initialize them from the board file for power saving purposes. The new ams_delta_latch_write() function is a unified replacement for those removed ams_delta_latch[12]_write(), and serves as a temporary wrapper over gpio_set_value(), providing the old API for those not yet updated device drivers, and will be removed after all custom drivers are converted or replaced. Signed-off-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: OMAP1: ams-delta: register latch dependent devices laterJanusz Krzysztofik2011-12-211-8/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In preparation to converting Amstrad Delta on-board latches to basic_mmio_gpio devices, registration of platform devices which depend on latches and will require initialization of their GPIO pins first, should be moved out of .machine_init down to late_initcall level, as the gpio-generic driver is not available until device_initcall time. The latch reset operation, which will be replaced with GPIO initialization, must also be moved to late_initcall for the same reason. Since there was already another, separate arch_initcall function for setting up one of those latch dependent devices, the on-board modem device, reuse that function, i.e., rename it to a name that matches the new purpose, extend with other device setup relocated from .machine_init, and move down to the late_initcall level. While being at it, add missing gpio_free() in case the modem platform device registration fails. Thanks to Tony Lindgren <tony@atomide.com> who suggested this approach instead of shifting up the gpio-generic driver initialization. In addition, defer registration of the Amstrad Delta ASoC and serio devices, done from their device driver files, until late_initcall time, as those drivers will depend on their GPIO pins already requested from the board late_init() function until updated to register their GPIO pins themselves. Signed-off-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: OMAP1: Always reprogram dpll1 rate at bootJanusz Krzysztofik2011-12-082-10/+0
| | | | | | | | | | | | | | | | | | | | | | | | DPLL1 reprogramming to a different rate is actually blocked inside omap1_select_table_rate(). However, it is already forced at boot, for boards which boot at unusable clock rates, and this seems to work correctly. OTOH, we now have a fine, run time performed clock selection algorithm implemented, which prevents less powerfull SoCs from being overclocked unintentionally. Allow reprogramming of dpll1 by default, and use it for switching to the higest supported clock rate with all boards, including those already booting at a usable rate of 60 MHz or above. Created against linux-omap/master tip as of Thu Dec 1, commit f83c2a8cbb59981722d1ab610c79adfd034a2667. Requires the just submitted patch "ARM: OMAP1: Move dpll1 rates selection from config to runtime" to prevent from unintentional overclocking. Tested on Amstrad Delta. Signed-off-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: OMAP1: Update dpll1 default rate reprogramming methodJanusz Krzysztofik2011-12-083-7/+9
| | | | | | | | | | | | | | | According to comments in omap1_select_table_rate(), reprogramming dpll1 is tricky, and should always be done from SRAM. While being at it, move OMAP730 special case handling inside omap_sram_reprogram_clock(). Created on top of version 2 of the series "ARM: OMAP1: Fix dpll1 reprogramming related issues", which it depends on. Tested on Amstrad Delta. Signed-off-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: OMAP1: Move dpll1 rates selection from config to runtimeJanusz Krzysztofik2011-12-088-100/+45
| | | | | | | | | | | | | | | | | | For still better multi-OMAP1 support, expand omap1_rate_table with flags for different SoC types and match them while selecting clock rates. The idea is stolen from current omap24xx clock rate selection algorithm. Since clkdev platform flag definitions are reused here, those had to be expanded with one extra entry for OMAP1710 subtype, as this is the only SoC for which we allow selection of the highest, 216 MHz rate. Once done, remove no longer needed clock rate configure time options. Tested on Amstrad Delta. Signed-off-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl> [tony@atomide.com: updated comments] Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: OMAP1: Set the omap1623 sram size to 16KTony Lindgren2011-12-081-4/+2
| | | | | | | | Now that we're always reprogramming the core clock we must make sure SRAM works. It seems that neither omap1621 or omap1623 has 256K of SRAM. Set the SRAM size to safe value of 16K. Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: OMAP1: recalculate loops per jiffy after dpll1 reprogramJanusz Krzysztofik2011-12-051-1/+6
| | | | | | | | | | | Otherwise timing is inaccurate, resulting in devices which depend on it, like omap-keypad, broken. Tested on Amstrad Delta. Signed-off-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl> [tony@atomide.com: removed comment referencing a development branch] Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: OMAP1: Fix ckctl value used for dpll1 defualt rateJanusz Krzysztofik2011-12-011-1/+1
| | | | | | | | | Use the exact value found in omap1_rate_table, otherwise I have been experiencing issues with correct timekeeping on my Amstrad Delta. Signed-off-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl> [tony@atomide.com: removed comment referencing a development branch] Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: OMAP1: Remove unsafe clock values from omap1_defconfigJanusz Krzysztofik2011-12-011-5/+0
| | | | | | | | | | | | | | | | | | | | | | | DPLL1 reprogramming to a different rate is actually blocked inside omap1_select_table_rate(), resulting in the defalut rate of 60 MHz always used instead of the one selected in .config. OTOH, in omap1_defconfig we currently rely on Kconfig options for the supported MHz rates in case of boards which boot with dpll1 not set correctly by their boot loaders. This means that before we allow for reprogramming of dpll1 rate, we should remove all unsafe clock selections from omap1_defconfig, otherwise it will stop booting on boards with imperfect boot loaders, as it would always try to change to 216MHz. Keep only one safe clock rate per each supported xtal frequency, i.e. 60MHZ dpll1 for 12MHz xtal and 182MHz dpll1 for 13MHz xtal. BTW, this change goes into the direction of removing all OMAP1 clock rate options, planned for next merge window. Signed-off-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: OMAP1: Fix reprogramming of DPLL1 for systems that boot at rates below ↵Tony Lindgren2011-12-011-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | 60MHz Commit e9b7086b80c4d9e354f4edc9e280ae85a60df408 (ARM: OMAP: Fix reprogramming of dpll1 rate) fixed a regression for systems that did not rely on bootloader set rates. However, it also introduced a new problem where the rates selected in .config would not take affect as omap1_select_table_rate currently refuses to reprogram DPLL1 if it's already initialized. This was not a problem earlier, as the reprogramming was done earlier with ck_dpll1_p->rate uninitialized. Fix this by forcing the reprogramming on systems booting at rates below 60MHz. Note that the long term fix is to make the rates SoC specific later on. Thanks for Janusz Krzysztofik <jkrzyszt@tis.icnet.pl> for figuring this one out. Reported-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl> Acked-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl> Signed-off-by: Tony Lindgren <tony@atomide.com>
* Merge branch 'fixes' of ↵Linus Torvalds2011-12-0124-117/+195
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm * 'fixes' of http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm: ARM: 7182/1: ARM cpu topology: fix warning ARM: 7181/1: Restrict kprobes probing SWP instructions to ARMv5 and below ARM: 7180/1: Change kprobes testcase with unpredictable STRD instruction ARM: 7177/1: GIC: avoid skipping non-existent PPIs in irq_start calculation ARM: 7176/1: cpu_pm: register GIC PM notifier only once ARM: 7175/1: add subname parameter to mfp_set_groupg callers ARM: 7174/1: Fix build error in kprobes test code on Thumb2 kernels ARM: 7172/1: dma: Drop GFP_COMP for DMA memory allocations ARM: 7171/1: unwind: add unwind directives to bitops assembly macros ARM: 7170/2: fix compilation breakage in entry-armv.S ARM: 7168/1: use cache type functions for arch_get_unmapped_area ARM: perf: check that we have a platform device when reserving PMU ARM: 7166/1: Use PMD_SHIFT instead of PGDIR_SHIFT in dma-consistent.c ARM: 7165/2: PL330: Fix typo in _prepare_ccr() ARM: 7163/2: PL330: Only register usable channels ARM: 7162/1: errata: tidy up Kconfig options for PL310 errata workarounds ARM: 7161/1: errata: no automatic store buffer drain ARM: perf: initialise used_mask for fake PMU during validation ARM: PMU: remove pmu_init declaration ARM: PMU: re-export release_pmu symbol to modules
| * ARM: 7182/1: ARM cpu topology: fix warningVincent Guittot2011-11-302-2/+2
| | | | | | | | | | | | | | | | | | | | | | kernel/sched.c:7354:2: warning: initialization from incompatible pointer type Align cpu_coregroup_mask prototype interface with sched_domain_mask_f typedef use int cpu instead of unsigned int cpu Cc: <stable@vger.kernel.org> Signed-off-by: Vincent Guittot <vincent.guittot@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: 7181/1: Restrict kprobes probing SWP instructions to ARMv5 and belowJon Medhurst (Tixy)2011-11-302-10/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The SWP instruction is deprecated on ARMv6 and with ARMv7 it will be UNDEFINED when CONFIG_SWP_EMULATE is selected. In this case, probing a SWP instruction will cause an oops when the kprobes emulation code executes an undefined instruction. As the SWP instruction should be rare or non-existent in kernels for ARMv6 and later, we can simply avoid these problems by not allowing probing of these. Reported-by: Leif Lindholm <leif.lindholm@arm.com> Tested-by: Leif Lindholm <leif.lindholm@arm.com> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: 7180/1: Change kprobes testcase with unpredictable STRD instructionJon Medhurst (Tixy)2011-11-301-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is a kprobes testcase for the instruction "strd r2, [r3], r4". This has unpredictable behaviour as it uses r3 for register writeback addressing and also stores it to memory. On a cortex A9, this testcase would fail because the instruction writes the updated value of r3 to memory, whereas the kprobes emulation code writes the original value. Fix this by changing testcase to used r5 instead of r3. Reported-by: Leif Lindholm <leif.lindholm@arm.com> Tested-by: Leif Lindholm <leif.lindholm@arm.com> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: 7177/1: GIC: avoid skipping non-existent PPIs in irq_start calculationWill Deacon2011-11-261-5/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | Commit 4294f8baa ("ARM: gic: add irq_domain support") defines irq_start as irq_start = (irq_start & ~31) + 16; On a platform with a GIC and a CPU without PPIs, this results in irq_start being off by 16. This patch fixes gic_init so that we only carve out a PPI space when PPIs exist for the GIC being initialised. Cc: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: 7176/1: cpu_pm: register GIC PM notifier only onceMarc Zyngier2011-11-261-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When multiple GICs exist on a platform (RealView PB1176/11MP), we must make sure the PM notifier block is only registered once, otherwise we end up corrupting the PM notifier list. The fix is to only register the notifier when initializing the first GIC, as the power management functions seem to iterate over all the registered GICs. Tested on PB11MP and PB1176. Reported-by: Will Deacon <will.deacon@arm.com> Tested-by: Will Deacon <will.deacon@arm.com> Cc: Colin Cross <ccross@android.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: 7174/1: Fix build error in kprobes test code on Thumb2 kernelsJon Medhurst2011-11-262-38/+78
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When compiling kprobes-test-thumb.c an error like below may occur: /tmp/ccKcuJcG.s:19179: Error: offset out of range This is caused by the compiler underestimating the size of the inline assembler instructions containing ".space 0x1000" and failing to spill the literal pool in time to prevent the generation of PC relative load instruction with invalid offsets. The fix implemented by this patch is to replace a single large .space directive by a number of 4 byte .space's. This requires splitting the macros which generate test cases for branch instructions into two forms: one with, and one without support for inserting extra code between branch and target. Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: Jon Medhurst <jon.medhurst@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: 7172/1: dma: Drop GFP_COMP for DMA memory allocationsSumit Bhattacharya2011-11-261-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | dma_alloc_coherent wants to split pages after allocation in order to reduce the memory footprint. This does not work well with GFP_COMP pages, so drop this flag before allocation. This patch is ported from arch/avr32 (commit 3611553ef985ef7c5863c8a94641738addd04cff). [swarren: s/HUGETLB_PAGE/HUGETLBFS/ in comment, minor comment cleanup] Signed-off-by: Sumit Bhattacharya <sumitb@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: 7171/1: unwind: add unwind directives to bitops assembly macrosWill Deacon2011-11-267-22/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The bitops functions (e.g. _test_and_set_bit) on ARM do not have unwind annotations and therefore the kernel cannot backtrace out of them on a fatal error (for example, NULL pointer dereference). This patch annotates the bitops assembly macros with UNWIND annotations so that we can produce a meaningful backtrace on error. Callers of the macros are modified to pass their function name as a macro parameter, enforcing that the macros are used as standalone function implementations. Acked-by: Dave Martin <dave.martin@linaro.org> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: 7170/2: fix compilation breakage in entry-armv.SGuennadi Liakhovetski2011-11-261-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Fix compilation failure, when Thumb support is not enabled: arch/arm/kernel/entry-armv.S: Assembler messages: arch/arm/kernel/entry-armv.S:501: Error: backward ref to unknown label "2:" arch/arm/kernel/entry-armv.S:502: Error: backward ref to unknown label "3:" make[2]: *** [arch/arm/kernel/entry-armv.o] Error 1 Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Reviewed-by: Dave Martin <dave.martin@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: 7168/1: use cache type functions for arch_get_unmapped_areaRob Herring2011-11-261-17/+6
| | | | | | | | | | | | | | | | | | | | There are already cache type decoding functions, so use those instead of custom decode code which only works for ARMv6. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Nicolas Pitre <nico@linaro.org> Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * Merge branch 'for-rmk' of ↵Russell King2011-11-223-11/+11
| |\ | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/will/linux into fixes
| | * ARM: perf: check that we have a platform device when reserving PMUWill Deacon2011-11-221-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Attempting to use a hardware counter on a platform with a supported PMU but where the platform_device (defining the interrupts) has not been registered results in a NULL pointer dereference. This patch fixes the problem by checking that we actually have a platform device registered before attempting to grab the interrupts. Reported-by: Pawel Moll <pawel.moll@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
| | * ARM: perf: initialise used_mask for fake PMU during validationWill Deacon2011-11-171-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When validating an event group, we call pmu->get_event_idx for each group member in order to check that the group can be scheduled as a unit on an empty PMU. As a result of 3fc2c830 ("ARM: perf: remove event limit from pmu_hw_events"), the used_mask member of struct cpu_hw_events must be setup explicitly, something which we don't do for the fake cpu_hw_events used for validation. This patch sets up an empty used_mask for the fake validation cpu_hw_events, preventing NULL deferences when trying to get the event index. Reported-by: Pawel Moll <pawel.moll@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
| | * ARM: PMU: remove pmu_init declarationWill Deacon2011-11-161-10/+0
| | | | | | | | | | | | | | | | | | | | | pmu_init no longer exists, so don't declare it in asm/pmu.h. Reported-by: Pawel Moll <Pawel.Moll@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
| | * ARM: PMU: re-export release_pmu symbol to modulesWill Deacon2011-11-161-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit b0e89590 ("ARM: PMU: move CPU PMU platform device handling and init into perf") inadvertently removed the EXPORT_SYMBOL_GPL on release_pmu, so out-of-tree modules can no longer play nice with perf, even if they tried in the first place. This patch re-exports the symbol. Reported-by: Jon Medhurst (Tixy) <jon.medhurst@linaro.org> Signed-off-by: Will Deacon <will.deacon@arm.com>
| * | ARM: 7166/1: Use PMD_SHIFT instead of PGDIR_SHIFT in dma-consistent.cCatalin Marinas2011-11-211-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 99d1717d (ARM: Add init_consistent_dma_size()) introduces dynamic allocation of the consistent_pte array. The number of PTEs should be calculated based on the number of PMD entries rather than PGD, hence the PMD_SHIFT. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Cc: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | ARM: 7165/2: PL330: Fix typo in _prepare_ccr()Javi Merino2011-11-211-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | scctl should be shifted by CC_SRCCTRL_SHFT and dcctl by CC_DSTCCTRL_SHFT, not the other way round. Reference: <1320244259-10496-4-git-send-email-javi.merino@arm.com> Signed-off-by: Javi Merino <javi.merino@arm.com> Acked-by: Jassi Brar <jassisinghbrar@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | ARM: 7163/2: PL330: Only register usable channelsJavi Merino2011-11-211-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When the manager is running non-secure, the only channels that can issue interrupts are the ones that have a 1 in their corresponding bit in Configuration Register 3. The other ones will generate an abort when trying to signal the end of the transaction so they are useless in non-secure mode. Reference: <1320244259-10496-2-git-send-email-javi.merino@arm.com> Signed-off-by: Javi Merino <javi.merino@arm.com> Acked-by: Jassi Brar <jassisinghbrar@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | ARM: 7162/1: errata: tidy up Kconfig options for PL310 errata workaroundsWill Deacon2011-11-212-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Kconfig options for the PL310 errata workarounds do not use a consistent naming scheme for either the config option or the bool description. This patch tidies up the options by ensuring that the bool descriptions are prefixed with "PL310 errata:" and the config options are prefixed with PL310_ERRATA_, making it much clearer in menuconfig as to what the workarounds are for. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | ARM: 7161/1: errata: no automatic store buffer drainWill Deacon2011-11-212-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch implements a workaround for PL310 erratum 769419. On revisions of the PL310 prior to r3p2, the Store Buffer does not automatically drain. This can cause normal, non-cacheable writes to be retained when the memory system is idle, leading to suboptimal I/O performance for drivers using coherent DMA. This patch adds an optional wmb() call to the cpu_idle loop. On systems with an outer cache, this causes an explicit flush of the store buffer. Cc: stable@vger.kernel.org Acked-by: Catalin Marinas <catalin.marinas@arm.com> Tested-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | Merge branch 'defconfigs-for-arnd' of ↵Arnd Bergmann2011-11-2917-55/+117
|\ \ \ | | | | | | | | | | | | git://git.linaro.org/people/triad/linux-stericsson into fixes
| * | | ARM: ux500: update defconfigLinus Walleij2011-11-291-9/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This updates the Ux500 defconfig with the new drivers for HWSEM and AB5500 core that were merged in the 3.2 cycle. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | ARM: u300: update defconfigLinus Walleij2011-11-291-7/+6
| |/ / | | | | | | | | | | | | | | | | | | | | | This updates the U300 defconfig to support some new drivers like FSMC, sets it to use the MMC clock gating scheme, and removes some stale config options. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | Merge branch 'fixes' of ↵Linus Torvalds2011-11-2014-32/+80
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm * 'fixes' of http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm: ARM: wire up process_vm_writev and process_vm_readv syscalls ARM: 7160/1: setup: avoid overflowing {elf,arch}_name from proc_info_list ARM: 7158/1: add new MFP implement for NUC900 ARM: 7157/1: fix a building WARNING for nuc900 ARM: 7156/1: l2x0: fix compile error on !CONFIG_USE_OF ARM: 7155/1: arch.h: Declare 'pt_regs' locally ARM: 7154/1: mach-bcmring: fix build error in dma.c ARM: 7153/1: mach-bcmring: fix build error in core.c ARM: 7152/1: distclean: Remove generated .dtb files ARM: 7150/1: Allow kernel unaligned accesses on ARMv6+ processors ARM: 7149/1: spi/pl022: Enable clock in probe Revert "ARM: 7098/1: kdump: copy kernel relocation code at the kexec prepare stage"
| | * | ARM: wire up process_vm_writev and process_vm_readv syscallsRussell King2011-11-172-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | These two syscalls were introduced during the last merge window. Add the entries into the ARM call tables for them. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: 7160/1: setup: avoid overflowing {elf,arch}_name from proc_info_listWill Deacon2011-11-121-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | setup_processor copies the arch_name and elf_name fields out of the selected proc_info_list into two fixed size buffers. Since the proc_info_list structure is defined in a proc_*.S assembly file, this can lead to subtle errors if the strings defined there are too long (for example, corrupting the machine ID). This patch uses snprintf instead of sprintf to ensure that these buffers are not overrun. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: 7158/1: add new MFP implement for NUC900wanzongshun2011-11-123-8/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch is to add new MFP implement in mfp.c,since nuc900 mmc driver needs this function support. Signed-off-by: Wan ZongShun <mcuos.com@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: 7157/1: fix a building WARNING for nuc900wanzongshun2011-11-121-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch is to fix a WARNING which is the "modpost: Found 1 section mismatch(es)" for nuc900 platform. Signed-off-by: Wan ZongShun <mcuos.com@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: 7156/1: l2x0: fix compile error on !CONFIG_USE_OFOlof Johansson2011-11-121-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | fae2b89ab1 (ARM: l2x0: add empty l2x0_of_init) adds a static inline function that returns -ENODEV, but at least on tegra cache-l2x0.h is included without errno.h being pulled in first, resulting in compile errors if OF isn't enabled: In file included from arch/arm/mach-tegra/common.c:26: arch/arm/include/asm/hardware/cache-l2x0.h: In function 'l2x0_of_init': arch/arm/include/asm/hardware/cache-l2x0.h:110: error: 'ENODEV' undeclared (first use in this function) arch/arm/include/asm/hardware/cache-l2x0.h:110: error: (Each undeclared identifier is reported only once arch/arm/include/asm/hardware/cache-l2x0.h:110: error: for each function it appears in.) Add errno.h to the include file to make it self-contained. Signed-off-by: Olof Johansson <olof@lixom.net> Acked-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: 7155/1: arch.h: Declare 'pt_regs' locallyFabio Estevam2011-11-091-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the following warning when building imx_v4_v5_defconfig target: CC arch/arm/mach-imx/mach-imx27ipcam.o In file included from arch/arm/mach-imx/mach-imx27ipcam.c:18: /home/fabio/linus/linux-2.6/arch/arm/include/asm/mach/arch.h:47: warning: 'struct pt_regs' declared inside parameter list /home/fabio/linus/linux-2.6/arch/arm/include/asm/mach/arch.h:47: warning: its scope is only this definition or declaration, which is probably not what you want arch/arm/mach-imx/mach-imx27ipcam.c:78: warning: initialization from incompatible pointer type Declare 'struct pt_regs' locally. Cc: Eric Miao <eric.miao@canonical.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: 7154/1: mach-bcmring: fix build error in dma.cMaxin B. John2011-11-091-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fixes this build error: CC arch/arm/mach-bcmring/dma.o arch/arm/mach-bcmring/dma.c: In function 'dma_request_channel_dbg': arch/arm/mach-bcmring/dma.c:1022: error: 'TASK_INTERRUPTIBLE' undeclared (first use in this function) arch/arm/mach-bcmring/dma.c:1022: error: (Each undeclared identifier is reported only once arch/arm/mach-bcmring/dma.c:1022: error: for each function it appears in.) arch/arm/mach-bcmring/dma.c:1024: error: implicit declaration of function 'schedule' arch/arm/mach-bcmring/dma.c:1027: error: implicit declaration of function 'signal_pending' arch/arm/mach-bcmring/dma.c: In function 'dma_free_channel': arch/arm/mach-bcmring/dma.c:1092: error: 'TASK_INTERRUPTIBLE' undeclared (first use in this function) arch/arm/mach-bcmring/dma.c: In function 'dma_map_add_region': arch/arm/mach-bcmring/dma.c:1946: error: dereferencing pointer to incomplete type arch/arm/mach-bcmring/dma.c:1948: error: dereferencing pointer to incomplete type arch/arm/mach-bcmring/dma.c:1955: error: dereferencing pointer to incomplete type make[1]: *** [arch/arm/mach-bcmring/dma.o] Error 1 make: *** [arch/arm/mach-bcmring] Error 2 Signed-off-by: Maxin B. John <maxin.john@gmail.com> Reviewed-by: Jiandong Zheng <jdzheng@broadcom.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: 7153/1: mach-bcmring: fix build error in core.cMaxin B. John2011-11-091-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fixes this build error: CC arch/arm/mach-bcmring/core.o arch/arm/mach-bcmring/core.c: In function 'bcmring_init_timer': arch/arm/mach-bcmring/core.c:238: error: implicit declaration of function 'sp804_clockevents_register' make[1]: *** [arch/arm/mach-bcmring/core.o] Error 1 make: *** [arch/arm/mach-bcmring] Error 2 Signed-off-by: Maxin B. John <maxin.john@gmail.com> Reviewed-by: Jiandong Zheng <jdzheng@broadcom.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: 7152/1: distclean: Remove generated .dtb filesDirk B2011-11-081-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The patch 'arm/dt: Add dtb make rule' adds support to create a .dtb file. But this is never removed afterwards. Remove the generated .dtb file if 'distclean' is called. Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com> Acked-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: Shawn Guo <shawn.guo@freescale.com> Cc: Jason Liu <jason.hui@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: 7150/1: Allow kernel unaligned accesses on ARMv6+ processorsCatalin Marinas2011-11-081-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Recent gcc versions generate unaligned accesses by default on ARMv6 and later processors. This patch ensures that the SCTLR.A bit is always cleared on such processors to avoid kernel traping before alignment_init() is called. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Tested-by: John Linn <John.Linn@xilinx.com> Acked-by: Nicolas Pitre <nico@linaro.org> Cc: stable@vger.kernel.org Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | Revert "ARM: 7098/1: kdump: copy kernel relocation code at the kexec prepare ↵Russell King2011-11-071-18/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | stage" This reverts commit 2b034922af2caa19df86f0c502e76cb6f6e910f9. Will Deacon reports: This is causing kexec to fail. The symptoms are that the .init.text section is not loaded as part of the new kernel image, so when we try to do the SMP/UP fixups we hit a whole sea of poison left there by the previous kernel. So my guess is that machine_kexec_prepare *is* too early for preparing the reboot_code_buffer and, unless anybody has a good reason not to, I'd like to revert the patch causing these problems. Reported-by: Will Deacon <will.deacon@arm.com>
| * | | Merge branch 'pm-fixes' of ↵Linus Torvalds2011-11-201-7/+26
| |\ \ \ | | |_|/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm * 'pm-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: PM / Suspend: Fix bug in suspend statistics update PM / Hibernate: Fix the early termination of test modes PM / shmobile: Fix build of sh7372_pm_init() for CONFIG_PM unset PM Sleep: Do not extend wakeup paths to devices with ignore_children set PM / driver core: disable device's runtime PM during shutdown PM / devfreq: correct Kconfig dependency PM / devfreq: fix use after free in devfreq_remove_device PM / shmobile: Avoid restoring the INTCS state during initialization PM / devfreq: Remove compiler error after irq.h update PM / QoS: Properly use the WARN() macro in dev_pm_qos_add_request() PM / Clocks: Only disable enabled clocks in pm_clk_suspend() ARM: mach-shmobile: sh7372 A3SP no_suspend_console fix PM / shmobile: Don't skip debugging output in pd_power_up()
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