summaryrefslogtreecommitdiffstats
path: root/arch/arm
Commit message (Collapse)AuthorAgeFilesLines
* ARM: pm: pxa: move cpu_suspend into C codeRussell King2011-06-246-59/+33
| | | | | | | | We don't need a veneer for cpu_suspend, it can be called directly from C code now. Move it into the PXA CPU suspend functions, along with the accumulator register saving/restoring. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: pm: samsung: no need to call flush_cache_all()Russell King2011-06-242-4/+0
| | | | | | | | The core suspend code calls flush_cache_all() immediately prior to calling the suspend finisher function, so remove these needless calls from the finisher functions. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: pm: samsung: move cpu_suspend into C codeRussell King2011-06-2411-83/+10
| | | | | | | | Move the call to cpu_suspend into C code, and noticing that all the s3c_cpu_save implementations are now identical, we can move this into the common samsung code. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: pm: mach-s3c64xx: cleanup s3c_cpu_saveRussell King2011-06-241-3/+1
| | | | | | | | s3c_cpu_save does not need to save any registers with the new cpu_suspend calling convention. Remove these redundant instructions. Acked-by: Frank Hofmann <frank.hofmann@tomtom.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: pm: mach-exynos4: cleanup s3c_cpu_saveRussell King2011-06-241-4/+1
| | | | | | | s3c_cpu_save does not need to save any registers with the new cpu_suspend calling convention. Remove these redundant instructions. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: pm: mach-s5pv210: cleanup s3c_cpu_saveRussell King2011-06-241-4/+1
| | | | | | | s3c_cpu_save does not need to save any registers with the new cpu_suspend calling convention. Remove these redundant instructions. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: pm: plat-s3c24xx: cleanup s3c_cpu_saveRussell King2011-06-241-3/+1
| | | | | | | | s3c_cpu_save does not need to save any registers with the new cpu_suspend calling convention. Remove these redundant instructions. Tested-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: pm: sa1100: move cpu_suspend into C codeRussell King2011-06-242-11/+4
| | | | | | | | We don't need a veneer for cpu_suspend, it can be called directly from C code now. Move it into sa11x0_pm_enter() along with the re-enabling of clock switching. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: pm: move cpu_init() call into core codeRussell King2011-06-244-7/+1
| | | | | | | | | | | As we have core code dealing with CPU suspend/resume, we can re-initialize the CPUs exception banked registers via that code rather than having platforms deal with that level of detail. So, move the call to cpu_init() out of platform code into core code. Tested-by: Kevin Hilman <khilman@ti.com> Acked-by: Jean Pihet <j-pihet@ti.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: pm: convert cpu_suspend() to a normal functionRussell King2011-06-248-40/+31
| | | | | | | | | | | | | | | | | cpu_suspend() has a weird calling method which makes it only possible to call from assembly code: it returns with a modified stack pointer to finish the suspend, but on resume, it 'returns' via a provided pointer. We can make cpu_suspend() appear to be a normal function merely by swapping the resume pointer argument and the link register. Do so, and update all callers to take account of this more traditional behaviour. Acked-by: Frank Hofmann <frank.hofmann@tomtom.com> Tested-by: Kevin Hilman <khilman@ti.com> Acked-by: Jean Pihet <j-pihet@ti.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: pm: move sa1100 to use proper suspend func arg0Russell King2011-06-241-4/+4
| | | | | | | | In the previous commit, we introduced an official way to supply an argument to the suspend function. Convert the sa1100 suspend code to use this method. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: pm: rejig suspend follow-on function calling conventionRussell King2011-06-241-4/+5
| | | | | | | | | | Save the suspend function pointer onto the stack for use when returning. Allocate r2 to pass an argument to the suspend function. Acked-by: Frank Hofmann <frank.hofmann@tomtom.com> Tested-by: Kevin Hilman <khilman@ti.com> Acked-by: Jean Pihet <j-pihet@ti.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: pm: reallocate registers to avoid r2, r3Russell King2011-06-241-9/+9
| | | | | | | | | | Avoid using r2 and r3 in the suspend code, allowing these to be passed further into the function as arguments. Acked-by: Frank Hofmann <frank.hofmann@tomtom.com> Tested-by: Kevin Hilman <khilman@ti.com> Acked-by: Jean Pihet <j-pihet@ti.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: pm: preserve r4 - r11 across a suspendRussell King2011-06-241-2/+3
| | | | | | | | | | | Make cpu_suspend()..return function preserve r4 to r11 across a suspend cycle. This is in preparation of relieving platform support code from this task. Acked-by: Frank Hofmann <frank.hofmann@tomtom.com> Tested-by: Kevin Hilman <khilman@ti.com> Acked-by: Jean Pihet <j-pihet@ti.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: pm: extract common code from MULTI_CPU/!MULTI_CPU pathsRussell King2011-06-241-18/+6
| | | | | | | | | | Very little code is different between these two paths now, so extract the common code. Acked-by: Frank Hofmann <frank.hofmann@tomtom.com> Tested-by: Kevin Hilman <khilman@ti.com> Acked-by: Jean Pihet <j-pihet@ti.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: pm: move return address (for cpu_resume) to top of stackRussell King2011-06-241-8/+8
| | | | | | | | | | Move the return address for cpu_resume to the top of stack so that cpu_resume looks more like a normal function. Acked-by: Frank Hofmann <frank.hofmann@tomtom.com> Tested-by: Kevin Hilman <khilman@ti.com> Acked-by: Jean Pihet <j-pihet@ti.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: pm: make MULTI_CPU and !MULTI_CPU resume paths the sameRussell King2011-06-241-9/+3
| | | | | | | | | | | Eliminate the differences between MULTI_CPU and non-MULTI_CPU resume paths, making the saved structure identical irrespective of the way the kernel was configured. Acked-by: Frank Hofmann <frank.hofmann@tomtom.com> Tested-by: Kevin Hilman <khilman@ti.com> Acked-by: Jean Pihet <j-pihet@ti.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: pm: sa1100: no need to re-enable clock switchingRussell King2011-06-241-1/+0
| | | | | | | | | This is now taken care of by calling cpu_proc_init() in the resume path, so eliminate this unnecessary call. Tested-by: Kevin Hilman <khilman@ti.com> Acked-by: Jean Pihet <j-pihet@ti.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: pm: arrange for cpu_proc_init() to be called on resumeRussell King2011-06-242-52/+51
| | | | | | | | | | | | | | | cpu_proc_init() does processor specific initialization, which we do at boot time. We have been omitting to do this on resume, which causes some of this initialization to be skipped. We've also been skipping this on SMP initialization too. Ensure that cpu_proc_init() is always called appropriately by moving it into cpu_init(), and move cpu_init() to a more appropriate point in the boot initialization. Tested-by: Kevin Hilman <khilman@ti.com> Acked-by: Jean Pihet <j-pihet@ti.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: pm: ensure ARMv7 CPUs save and restore the TLS registerRussell King2011-06-241-3/+7
| | | | | | | | | Ensure that the TLS register is saved and restored over a suspend cycle, so that userspace programs don't see a corrupted TLS value. Tested-by: Kevin Hilman <khilman@ti.com> Acked-by: Jean Pihet <j-pihet@ti.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: pm: proc-v7: fix missing struct processor pointers for suspend codeRussell King2011-06-241-3/+3
| | | | | | | | | Add the missing suspend/resume pointers for the suspend code. This is needed when building for multiple CPUs. Tested-by: Kevin Hilman <khilman@ti.com> Acked-by: Jean Pihet <j-pihet@ti.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 6969/1: plat-iop: fix build errorLinus Walleij2011-06-211-0/+1
| | | | | | | | | The iop13xx_defconfig didn't build since the platform code uses defines from <asm/ptrace.h>. Simply add the include so it compiles. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 6961/1: zImage: Add build-time check for correctly-sized proc_type entriesDave Martin2011-06-211-1/+13
| | | | | | | | | | | | | | | It is easy to mis-maintain the proc_types table such that the entries become wrongly-sized and misaligned when the kernel is built in Thumb-2. This patch adds an assembly-time check which will turn most common size/alignment mistakes in this table into build failures, to avoid having to debug the boot-time kernel hang which would happen if the resulting kernel were actually booted. Signed-off-by: Dave Martin <dave.martin@linaro.org> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: SMP: wait for CPU to be marked activeRussell King2011-06-211-1/+5
| | | | | | | | When we bring a CPU online, we should wait for it to become active before entering the idle thread, so we know that the scheduler and thread migration is going to work. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 6963/1: Thumb-2: Relax relocation requirements for non-function symbolsDave Martin2011-06-171-2/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The "Thumb bit" of a symbol is only really meaningful for function symbols (STT_FUNC). However, sometimes a branch is relocated against a non-function symbol; for example, PC-relative branches to anonymous assembler local symbols are typically fixed up against the start-of-section symbol, which is not a function symbol. Some inline assembler generates references of this type, such as fixup code generated by macros in <asm/uaccess.h>. The existing relocation code for R_ARM_THM_CALL/R_ARM_THM_JUMP24 interprets this case as an error, because the target symbol appears to be an ARM symbol; but this is really not the case, since the target symbol is just a base in these cases. The addend defines the precise offset to the target location, but since the addend is encoded in a non-interworking Thumb branch instruction, there is no explicit Thumb bit in the addend. Because these instructions never interwork, the implied Thumb bit in the addend is 1, and the destination is Thumb by definition. This patch removes the extraneous Thumb bit check for non-function symbols, enabling modules containing the affected relocation types to be loaded. No modification to the actual relocation code is required, since this code does not take bit[0] of the location->destination offset into account in any case. Function symbols are always checked for interworking conflicts, as before. Signed-off-by: Dave Martin <dave.martin@linaro.org> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 6962/1: mach-h720x: fix build errorLinus Walleij2011-06-171-0/+2
| | | | | | | | | | The h7201/h7202 machines did not build since they define ARM_DMA_ZONE_OFFSET but do not select ZONE_DMA. Fix it up by selecting ZONE_DMA in their Kconfig. Cc: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 6959/1: SMP build fix for entry-macro-multi.SMagnus Damm2011-06-172-0/+6
| | | | | | | | | | | | | | | | | The assembly code in entry-macro-multi.S does not build without the include asm/assembler.h in the case of CONFIG_SMP=y. Fixes the rather theoretical SMP build of mach-shmobile/entry-intc.c: arch/arm/include/asm/entry-macro-multi.S: Assembler messages: arch/arm/include/asm/entry-macro-multi.S:20: Error: bad instruction `alt_smp(test_for_ipi r0,r6,r5,lr)' arch/arm/include/asm/entry-macro-multi.S:20: Error: bad instruction `alt_up_b(9997f)' make[1]: *** [arch/arm/mach-shmobile/entry-intc.o] Error 1 make: *** [arch/arm/mach-shmobile] Error 2 make: *** Waiting for unfinished jobs.... Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* Merge branch 'rmobile-fixes-for-linus' of ↵Linus Torvalds2011-06-164-71/+161
|\ | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-3.x * 'rmobile-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-3.x: ARM: mach-shmobile: mackerel: tidyup usbhs driver settings ARM: mach-shmobile: Correct SCIF port types for SH7367. ARM: mach-shmobile: sh73a0 gic_arch_extn.irq_set_wake() fix ARM: mach-shmobile: Mackerel USB platform data update ARM: mach-shmobile: AG5EVM SDHI1 platform data update
| * ARM: mach-shmobile: mackerel: tidyup usbhs driver settingsKuninori Morimoto2011-06-151-15/+6
| | | | | | | | | | | | | | | | | | - usb0 pipe is same as default. own pipe config is not needed - usb1 lost get_id function Signed-off-by: Kuninori Morimoto <morimoto.kuninori@renesas.com> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * ARM: mach-shmobile: Correct SCIF port types for SH7367.Paul Mundt2011-06-141-7/+7
| | | | | | | | | | | | | | While SH7377 and others were updated to properly use SCIFA/B port types, SH7367 was left behind. Fix it up accordingly. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * ARM: mach-shmobile: sh73a0 gic_arch_extn.irq_set_wake() fixMagnus Damm2011-06-141-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Initialize ->irq_set_wake() in gic_arch_extn to unbreak wake up from the KEYSC device on AG5EVM in case of Suspend-to-RAM. Without this patch "echo mem > /sys/power/state" and a key press results in the following message on resume: WARNING: at kernel/irq/manage.c:507 irq_set_irq_wake+0x7c/0xd8() Unbalanced IRQ 103 wake disable Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * ARM: mach-shmobile: Mackerel USB platform data updateMagnus Damm2011-06-141-65/+160
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch updates the board specific USB support code for the sh7372 Mackerel board. With this patch applied port CN22 is driven by the recently added renesas_usbhs driver using the first USB controller included in sh7372 aka USBHS0. Hotplugging of USBHS0 unfortunately has to be handled by software polling. The sh7372 SoC itself obviously supports hotplug notification by IRQ but on the Mackerel board this IRQ happens to be used for the touch screen. Also fix the pinmux configuration to avoid setting up unused pins and fix minor spelling errors. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * ARM: mach-shmobile: AG5EVM SDHI1 platform data updateMagnus Damm2011-06-141-3/+1
| | | | | | | | | | | | | | | | | | | | Add a flag for SDHI1 to enable SDIO IRQ, and remove DMA Engine slave id:s to disable DMA as a workaround. Tested on sh73a0/AG5EVM with a BCM4318-based SDIO card. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | Merge branch 'fixes' of master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2011-06-1521-55/+76
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'fixes' of master.kernel.org:/home/rmk/linux-2.6-arm: ARM: footbridge: fix clock event support ARM: footbridge: fix debug macros ARM: initrd: disable initrds outside of memory ARM: extend Code: line by one 16-bit quantity for Thumb instructions ARM: 6955/1: cmpxchg syscall should data abort if page not write ARM: 6954/1: zImage: fix Thumb2 breakage ARM: 6953/1: DT: don't try to access physical address zero ARM: 6949/2: mach-u300: fix compilaton warning in IO accessors Revert "ARM: 6944/1: mm: allow ASID 0 to be allocated to tasks" Revert "ARM: 6943/1: mm: use TTBR1 instead of reserved context ID" davinci: make PCM platform devices static arm: davinci: Fix fallout from generic irq chip conversion ARM: 6894/1: mmci: trigger card detect IRQs on falling and rising edges ARM: 6952/1: fix lockdep warning of "unannotated irqs-off" ARM: 6951/1: include .bss in memory layout information ARM: 6948/1: Fix .size directives for __arm{7,9}tdmi_proc_info ARM: 6947/2: mach-u300: fix compilation error in timer ARM: 6946/1: vexpress: move v2m clock init to init_early ARM: mx51/sdma: Check the chip revision in run-time arm: mxs: include asm/processor.h for cpu_relax()
| * | ARM: footbridge: fix clock event supportRussell King2011-06-111-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | 4e8d7637 (ARM: footbridge: convert to clockevents/clocksource) did not set the cpumask for the clock event device. This causes boot to fail. Add the necessary initialization. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | ARM: footbridge: fix debug macrosRussell King2011-06-111-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | More of the same of 5f2c1b30 (ARM: footbridge: fix debug macros), this time for the DC21285-based debugging code rather than the 8250- based debugging code. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | ARM: initrd: disable initrds outside of memoryRussell King2011-06-111-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | We can't cope with initrds outside of memory, so check that the initrd is within some declared memory to the kernel before using it. Otherwise we're likely to OOPS during boot. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | Merge branch 'davinci-next' of ↵Russell King2011-06-108-7/+152
| |\ \ | | | | | | | | | | | | git://gitorious.org/linux-davinci/linux-davinci into fixes
| | * | davinci: make PCM platform devices staticSekhar Nori2011-06-082-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make the PCM device structures used in devices.c and devices-da8xx.c static as they are used only in the respective files. This was found when trying to build a single image for DaVinci and DA8x devices using runtime P2V support. Signed-off-by: Sekhar Nori <nsekhar@ti.com>
| | * | arm: davinci: Fix fallout from generic irq chip conversionThomas Gleixner2011-06-081-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The code which does the chained handler setup was overwriting chip_data. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Tested-by: Holger Hans Peter Freyther <holger@freyther.de> Signed-off-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
| * | | Merge branch 'for-rmk' of git://git.pengutronix.de/git/imx/linux-2.6 into fixesRussell King2011-06-102-2/+6
| |\ \ \
| | * | | ARM: mx51/sdma: Check the chip revision in run-timeFabio Estevam2011-06-061-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Check the MX51 chip revision in run-time so that the correct SDMA firmware can be loaded. While at it also remove the silicon revision from the sdma_script_start_addrs structure name for MX51. All the MX51 revisions share the same SDMA start addresses. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| | * | | arm: mxs: include asm/processor.h for cpu_relax()Wolfram Sang2011-06-061-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I get this build error as of today: arch/arm/mach-mxs/ocotp.c: In function 'mxs_get_ocotp': arch/arm/mach-mxs/ocotp.c:54: error: implicit declaration of function 'cpu_relax' make[2]: *** [arch/arm/mach-mxs/ocotp.o] Error 1 Looks like it has been indirectly included before which broke now. Include it directly. Signed-off-by: Wolfram Sang <w.sang@pengutronix.de> Cc: Shawn Guo <shawn.guo@freescale.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | ARM: extend Code: line by one 16-bit quantity for Thumb instructionsRussell King2011-06-091-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Dump out the following 16-bit instruction to the faulting instruction in the Code: line. This allows Thumb-2 instructions to be properly encoded. Tested-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | ARM: 6955/1: cmpxchg syscall should data abort if page not writePo-Yu Chuang2011-06-091-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the page to cmpxchg is user mode read only (not write), we should simulate a data abort first. Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | ARM: 6954/1: zImage: fix Thumb2 breakageNicolas Pitre2011-06-091-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit af3e4fd37a "ARM: 6859/1: Add writethrough dcache support for ARM926EJS processor" broke Thumb2 compilation by omitting to maintain the wide encoding for the added branch instructions which made the ARM926EJ-S record smaller than expected, breaking the record walk code. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org> Cc: Mark A. Greer <mgreer@mvista.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | ARM: 6953/1: DT: don't try to access physical address zeroNicolas Pitre2011-06-091-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the DT physical address is zero, this is equivalent to no DT. Especially when the actual RAM physical address is not located at zero, the result of phys_to_virt() would point to la-la-land and crash the kernel, which crash is completely silent this early during boot. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | ARM: 6949/2: mach-u300: fix compilaton warning in IO accessorsLinus Walleij2011-06-092-13/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The IO accessors for U300 were using u32 rather than the nominal void __iomem * type, rectify this by properly defining the virtual base for statically mapped peripherals to be void __iomem *. Requires fixing a field in struct clk as well. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | Revert "ARM: 6944/1: mm: allow ASID 0 to be allocated to tasks"Russell King2011-06-091-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 45b95235b0ac86cef2ad4480b0618b8778847479. Will Deacon reports that: In 52af9c6c ("ARM: 6943/1: mm: use TTBR1 instead of reserved context ID") I updated the ASID rollover code to use only the kernel page tables whilst updating the ASID. Unfortunately, the code to restore the user page tables was part of a later patch which isn't yet in mainline, so this leaves the code quite broken. We're also in the process of eliminating __ARCH_WANT_INTERRUPTS_ON_CTXSW from ARM, so lets revert these until we can properly sort out what we're doing with the context switching. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | Revert "ARM: 6943/1: mm: use TTBR1 instead of reserved context ID"Russell King2011-06-092-10/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 52af9c6cd863fe37d1103035ec7ee22ac1296458. Will Deacon reports that: In 52af9c6c ("ARM: 6943/1: mm: use TTBR1 instead of reserved context ID") I updated the ASID rollover code to use only the kernel page tables whilst updating the ASID. Unfortunately, the code to restore the user page tables was part of a later patch which isn't yet in mainline, so this leaves the code quite broken. We're also in the process of eliminating __ARCH_WANT_INTERRUPTS_ON_CTXSW from ARM, so lets revert these until we can properly sort out what we're doing with the ARM context switching. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
OpenPOWER on IntegriCloud