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* ARM: OMAP2+: only WARN if a GPMC child probe function failJavier Martinez Canillas2013-04-301-3/+2
| | | | | | | | | If any of the GPMC child nodes fails, this shouldn't make the whole gpmc_probe_dt() function to fail. It is better to just WARN and allow other devices probe function to succeed. Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: Jon Hunter <jon-hunter@ti.com>
* ARM: OMAP2+: only search for GPMC DT child nodes on probeJavier Martinez Canillas2013-04-301-23/+10
| | | | | | | | | | | | | | | | | | | The GPMC DT probe function use for_each_node_by_name() to search child device nodes of the GPMC controller. But this function does not use the GPMC device node as the root of the search and instead search across the complete Device Tree. This means that any device node on the DT that is using any of the GPMC child nodes names searched for will be returned even if they are not connected to the GPMC, making the gpmc_probe_xxx_child() function to fail. Fix this by using the GPMC device node as the search root so the search will be restricted to its children. Reported-by: Lars Poeschel <poeschel@lemonage.de> Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: Jon Hunter <jon-hunter@ti.com>
* ARM: OMAP2+: Add GPMC DT support for Ethernet child nodesJavier Martinez Canillas2013-04-031-0/+8
| | | | | | | | | | | | | Besides being used to interface with external memory devices, the General-Purpose Memory Controller can be used to connect Pseudo-SRAM devices such as ethernet controllers to OMAP2+ processors using the TI GPMC as a data bus. This patch allows an ethernet chip to be defined as an GPMC child device node. Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: Jon Hunter <jon-hunter@ti.com>
* ARM: OMAP2+: rename gpmc_probe_nor_child() to gpmc_probe_generic_child()Javier Martinez Canillas2013-04-031-5/+5
| | | | | | | | | | | | | | The gpmc_probe_nor_child() function is used in the GPMC driver to configure the GPMC for a NOR child device node. But this function is quite generic and all the NOR specific configuration is made by the driver of the actual NOR flash memory used. Other Pseudo-SRAM devices such as ethernet controllers need a similar setup so by making this function generic it can be used for those too. Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: Jon Hunter <jon-hunter@ti.com>
* ARM: OMAP2+: return -ENODEV if GPMC child device creation failsJavier Martinez Canillas2013-04-031-0/+1
| | | | | | | | | | | | | | | | gpmc_probe_nor_child() calls of_platform_device_create() to create a platform device for the NOR child. If this function fails the value of ret is returned to the caller but this value is zero since it was assigned the return of a previous call to gpmc_cs_program_settings() that had to succeed or otherwise gpmc_probe_nor_child() would have returned before. This means that if of_platform_device_create() fails, 0 will be returned to the caller instead of an appropriate error code. Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: Jon Hunter <jon-hunter@ti.com> Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
* ARM: OMAP2+: Allow GPMC probe to complete even if CS mapping failsJon Hunter2013-04-031-17/+7
| | | | | | | | | | | | | | | | | | | | When the GPMC driver is probed, we call gpmc_mem_init() to see which chip-selects have already been configured and enabled by the boot-loader and allocate space for them. If we fail to allocate space for one chip-select, then we return failure from the probe and the GPMC driver will not be available. Rather than render the GPMC useless for all GPMC devices, if we fail to allocate space for one chip-select print a warning and disable the chip-select. This way other GPMC clients can still be used. There is no downside to this approach, because all GPMC clients need to request a chip-select before they can use the GPMC and on requesting a chip-select, if memory has not already been reserved for the chip-select then it will be. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
* ARM: OMAP2+: Remove unnecesssary GPMC definitions and variableJon Hunter2013-04-031-7/+5
| | | | | | | | | | With commit 21cc2bd (ARM: OMAP2+: Remove apollon board support) the variable "boot_rom_space" is now not needed and the code surrounding this variable can be cleaned up and simplified. Remove unnecessary definitions and clean-up the comment as well. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
* ARM: OMAP2+: Detect incorrectly aligned GPMC base addressJon Hunter2013-04-031-3/+19
| | | | | | | | | | | | | Each GPMC chip-select can be configured to map 16MB, 32MB, 64MB or 128MB of address space. The physical base address where a chip-select starts is also configurable and must be aligned on a boundary that is equal to or greater than the size of the address space mapped bt the chip-select. When enabling a GPMC chip-select, ensure that the base address is aligned to the appropriate boundary. Reported-by: Mark Jackson <mpfj-list@mimc.co.uk> Signed-off-by: Jon Hunter <jon-hunter@ti.com> Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
* ARM: OMAP2+: Convert ONENAND to retrieve GPMC settings from DTJon Hunter2013-04-031-6/+15
| | | | | | | | | | | | | | | | | | | | | | | When booting with device-tree, retrieve GPMC settings for ONENAND from the device-tree blob. This will allow us to remove all static settings stored in the gpmc-nand.c in the future once the migration to device-tree is complete. The user must now specify the ONENAND device width in the device-tree binding so that the GPMC can be programmed correctly. Therefore, update the device-tree binding documentation for ONENAND devices connected to the GPMC to reflect this. Please note that this does not include GPMC timings for ONENAND. The timings are being calculated at runtime. There is some legacy code that only enables read wait monitoring for non-OMAP3 devices. There are no known OMAP3 device issues that prevent this feature being enabled and so when booting with device-tree use the wait-monitoring settings described in the device-tree blob. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
* ARM: OMAP2+: Convert NAND to retrieve GPMC settings from DTJon Hunter2013-04-031-6/+10
| | | | | | | | | | When booting with device-tree, retrieve GPMC settings for NAND from the device-tree blob. This will allow us to remove all static settings stored in the gpmc-nand.c in the future once the migration to device-tree is complete. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
* ARM: OMAP2+: Add device-tree support for NOR flashJon Hunter2013-04-031-0/+115
| | | | | | | | | | | NOR flash is not currently supported when booting with device-tree on OMAP2+ devices. Add support to detect and configure NOR devices when booting with device-tree. Add documentation for the TI GPMC NOR binding. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
* ARM: OMAP2+: Add additional GPMC timing parametersJon Hunter2013-04-031-47/+47
| | | | | | | | | | | | | | | | | | | | | | Some of the GPMC timings parameters are currently missing from the GPMC device-tree binding. Add these parameters to the binding documentation as well as code to read them. Also add either "-ps" or "-ns" suffix to the GPMC timing properties to indicate whether the timing is in picoseconds or nanoseconds. The existing code in gpmc_read_timings_dt() is checking the value of of_property_read_u32() and only is successful storing the value read in the gpmc_timings structure. Checking the return value in this case is not necessary and we can simply read the value, if present, and store directly in the gpmc_timings structure. Therefore, simplify the code by removing these checks. The comment in the gpmc_read_timings_dt() function, "only for OMAP3430" is also incorrect as it is applicable to all OMAP3+ devices. So correct this too. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
* ARM: OMAP2+: Add function to read GPMC settings from device-treeJon Hunter2013-04-012-0/+42
| | | | | | | | | | | Adds a function to read the various GPMC chip-select settings from device-tree and store them in the gpmc_settings structure. Update the GPMC device-tree binding documentation to describe these options. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
* ARM: OMAP2+: Don't configure of chip-select options in gpmc_cs_configure()Jon Hunter2013-04-013-47/+9
| | | | | | | | | | With the addition of the gpmc_cs_program_settings(), we no longer need or use gpmc_cs_configure() to configure some of the GPMC chip-select options. So rename the function to gpmc_configure() and remove code that modifies options in the CONFIG1 register. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
* ARM: OMAP2+: Convert TUSB to use gpmc_cs_program_settings()Jon Hunter2013-04-011-24/+19
| | | | | | | | | Convert the OMAP2+ TUSB code to use the gpmc_cs_program_settings() function for configuring the various GPMC options instead of directly programming the CONFIG1 register. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
* ARM: OMAP2+: Convert SMC91x to use gpmc_cs_program_settings()Jon Hunter2013-04-011-13/+17
| | | | | | | | | | | | | Convert the OMAP2+ SMC91x code to use the gpmc_cs_program_settings() function for configuring the various GPMC options instead of directly programming the CONFIG1 register. Move configuration of the GPMC settings outside retime function and this does not need to be done if the timings are changed dynamically at runtime. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
* ARM: OMAP2+: Convert NAND to use gpmc_cs_program_settings()Jon Hunter2013-04-011-12/+23
| | | | | | | | | | | | | | | | Convert the OMAP2+ NAND code to use the gpmc_cs_program_settings() function for configuring the various GPMC options instead of directly programming the CONFIG1 register. This moves the configuration of some GPMC options outside the nand_gpmc_retime() because these options should only need to be set once regardless of whether the gpmc timing is changing dynamically at runtime. The programming of where the wait-pin is also moved slightly, but this will not have any impact to existing devices as no boards are currently setting the dev_ready variable. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
* ARM: OMAP2+: Convert ONENAND to use gpmc_cs_program_settings()Jon Hunter2013-04-011-36/+25
| | | | | | | | | Convert the OMAP2+ ONENAND code to use the gpmc_cs_program_settings() function for configuring the various GPMC options instead of directly programming the CONFIG1 register. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
* ARM: OMAP2+: Add function for configuring GPMC settingsJon Hunter2013-04-012-0/+106
| | | | | | | | | | | | | | | | | | | The GPMC has various different configuration options such as bus-width, synchronous or asychronous mode selection, burst mode options etc. Currently, there is no common function for configuring these options and various devices set these options by either programming the GPMC CONFIG1 register directly or by calling gpmc_cs_configure() to set some of the options. Add a new function for configuring all of the GPMC options. Having a common function for configuring this options will simplify code and ease the migration to device-tree. Also add a new capability flag to detect devices that support the address-address-data multiplexing mode. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
* ARM: OMAP2+: Add structure for storing GPMC settingsJon Hunter2013-04-015-40/+72
| | | | | | | | | | | | | | | The GPMC has various different configuration options such as bus-width, synchronous or asychronous mode selection, burst mode options etc. Currently, there is no central structure for storing all these options when configuring the GPMC for a given device. Some of the options are stored in the GPMC timing structure and some are directly programmed into the GPMC configuration register. Add a new structure to store these options and convert code to use this structure. Adding this structure will allow us to create a common function for configuring these options. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
* ARM: OMAP2+: Add variable to store number of GPMC waitpinsJon Hunter2013-04-011-0/+13
| | | | | | | | | | | | | | | | | The GPMC has wait-pin signals that can be assigned to a chip-select to monitor the ready signal of an external device. Add a variable to indicate the total number of wait-pins for a given device. This will allow us to detect if the wait-pin being selected is valid or not. When booting with device-tree read the number of wait-pins from the device-tree blob. When device-tree is not used set the number of wait-pins to 4 which is valid for OMAP2-5 devices. Newer devices that have less wait-pins (such as AM335x) only support booting with device-tree and so hard-coding the wait-pin number when not using device-tree is fine. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
* ARM: OMAP2+: Simplify code configuring ONENAND devicesJon Hunter2013-04-011-16/+10
| | | | | | | | | | | | | | The OMAP2+ code that configures the GPMC for ONENAND devices is copying structures between functions unnecessarily. Avoid this by passing pointers instead and simplify the code. A pointer to structure "omap_onenand_platform_data" is passed to the function omap2_onenand_calc_sync_timings(), but only the flags member of the structure is used. Simplify the code by only passing the flags member and not the entire structure. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
* ARM: omap2: gpmc: Remove redundant chip select out of range checkEzequiel Garcia2013-04-011-9/+1
| | | | | | | | | | This check is done before the call to gpmc_cs_reserved() and gpmc_cs_set_reserved() and it's redundant to do it again in each function. This simplifies the code a bit. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Reviewed-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Jon Hunter <jon-hunter@ti.com>
* ARM: omap2: gpmc-onenand: Replace printk KERN_ERR with dev_warn()Ezequiel Garcia2013-04-011-1/+1
| | | | | | | | | Since the condition is not an error but a warning, replace printk KERN_ERR with dev_warn. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Reviewed-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Jon Hunter <jon-hunter@ti.com>
* ARM: omap2: gpmc-onenand: Replace pr_err() with dev_err()Ezequiel Garcia2013-04-011-3/+4
| | | | | | | | | Do this becasue dev_err() is preferred over pr_err() and because it will match gpmc-nand, thus the code shows looks more consistent. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Reviewed-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Jon Hunter <jon-hunter@ti.com>
* ARM: omap2: gpmc-onenand: Print something useful on CS request failureEzequiel Garcia2013-04-011-1/+2
| | | | | | | | | If CS request fails the current error message is rather unhelpful. Fix it by printing the failing chip select and the error code. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Reviewed-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Jon Hunter <jon-hunter@ti.com>
* ARM: omap2: gpmc-nand: Print something useful on CS request failureEzequiel Garcia2013-04-011-1/+2
| | | | | | | | | If CS request fails the current error message is rather unhelpful. Fix it by printing the failing chip select and the error code. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Reviewed-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Jon Hunter <jon-hunter@ti.com>
* ARM: omap2: gpmc: Fix gpmc_cs_reserved() return valueEzequiel Garcia2013-04-011-2/+2
| | | | | | | | | | | | | | | Currently gpmc_cs_reserved() return value is somewhat inconsistent, returning a negative value on an error condition, a positive value if the chip select is reserved and zero if it's available. Fix this by returning a boolean value as the function name suggests: * true if the chip select is reserved, * false if it's available Suggested-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Reviewed-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Jon Hunter <jon-hunter@ti.com>
* ARM: omap2: gpmc: Remove unused gpmc_round_ns_to_ticks() functionEzequiel Garcia2013-04-011-7/+0
| | | | | | | | | This function is not used anywhere, so it's safe to remove it. This means less code to maintain. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Reviewed-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Jon Hunter <jon-hunter@ti.com>
* ARM: omap2: gpmc: Mark local scoped functions staticEzequiel Garcia2013-04-012-14/+7
| | | | | | | | | This patch marks a bunch of functions that are local to gpmc.c file only as static. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Reviewed-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Jon Hunter <jon-hunter@ti.com>
* ARM: OMAP: Clear GPMC bits when applying new setting.Mark Jackson2013-04-012-1/+8
| | | | | | | | | | | | | | | | | When setting the GPMC device type, make sure any previous bits are cleared down, before applying the new setting. For OMAP4+ devices MUXADDDATA is a 2-bit field (bits 9:8) where as for OMAP2/3 devices it was only a one bit field (bit 9). For OMAP2/3 devices bit 8 is reserved and the OMAP documentation says to write a 0 to this bit. So clearing bit 8 on OMAP2/3 devices should not be a problem. Hence update the code to handle both bits 8 and 9 for all devices. Signed-off-by: Mark Jackson <mpfj@newflow.co.uk> [jon-hunter@ti.com: updated changelog] Signed-off-by: Jon Hunter <jon-hunter@ti.com>
* Merge commit '31d9adca82ce65e5c99d045b5fd917c702b6fce3' into tmpJon Hunter2013-04-011269-38296/+28201
|\ | | | | | | | | Conflicts: arch/arm/plat-omap/dmtimer.c
| * ARM: OMAP2+: Fix broken gpmc supportJon Hunter2013-03-041-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 6797b4fe (ARM: OMAP2+: Prevent potential crash if GPMC probe fails) added code to ensure that GPMC chip-selects could not be requested until the device probe was successful. The chip-selects should have been unreserved at the end of the probe function, but the code to unreserve them appears to have ended up in the gpmc_calc_timings() function and hence, this is causing problems requesting chip-selects. Fix this merge error by unreserving the chip-selects at the end of the probe, but before we call the gpmc child probe functions (for device-tree) which request a chip-select. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Philip Avinash <avinashphilip@ti.com> Tested-by: Grazvydas Ignotas <notasas@gmail.com> [tony@atomide.com: updated description to add breaking commit id] Signed-off-by: Tony Lindgren <tony@atomide.com>
| * ARM: OMAP1: Fix build related to kgdb.h no longer including serial_8250.hTony Lindgren2013-03-041-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 16559ae4 (kgdb: remove #include <linux/serial_8250.h> from kgdb.h) had a side effect of breaking omap1_defconfig build as some headers were included indirectly: arch/arm/mach-omap1/board-h2.c:249: error: ‘INT_KEYBOARD’ undeclared here (not in a function) ... This worked earlier as linux/serial_8250.h included linux/serial_core.h, via linux/serial_8250.h from linux/kgdb.h. Fix this by including the necessary headers directly. Signed-off-by: Tony Lindgren <tony@atomide.com>
| * Merge branch 'for-linus' of git://git.linaro.org/people/rmk/linux-armLinus Torvalds2013-03-038-28/+35
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull late ARM updates from Russell King: "Here is the late set of ARM updates for this merge window; in here is: - The ARM parts of the broadcast timer support, core parts merged through tglx's tree. This was left over from the previous merge to allow the dependency on tglx's tree to be resolved. - A fix to the VFP code which shows up on Raspberry Pi's, as well as fixing the fallout from a previous commit in this area. - A number of smaller fixes scattered throughout the ARM tree" * 'for-linus' of git://git.linaro.org/people/rmk/linux-arm: ARM: Fix broken commit 0cc41e4a21d43 corrupting kernel messages ARM: fix scheduling while atomic warning in alignment handling code ARM: VFP: fix emulation of second VFP instruction ARM: 7656/1: uImage: Error out on build of multiplatform without LOADADDR ARM: 7640/1: memory: tegra_ahb_enable_smmu() depends on TEGRA_IOMMU_SMMU ARM: 7654/1: Preserve L_PTE_VALID in pte_modify() ARM: 7653/2: do not scale loops_per_jiffy when using a constant delay clock ARM: 7651/1: remove unused smp_timer_broadcast #define
| | *-. Merge branches 'devel-stable', 'fixes' and 'mmci' into for-linusRussell King2013-03-0314-34/+64
| | |\ \
| | | * | ARM: Fix broken commit 0cc41e4a21d43 corrupting kernel messagesRussell King2013-03-011-15/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 0cc41e4a21d43 (arch: remove direct definitions of KERN_<LEVEL> uses) is broken - not enough thought was put into changing: .asciz "string" to .asciz "string1" "string2" The problem is that each string gets _separately_ NUL terminated, so the result is a string containing: "string1\0string2\0" rather than: "string1string2\0" With our new printk levels, this ends up as - eg, KERN_DEBUG "string": 0x01 0x00 0x07 0x00 "string" 0x00 which produces lots of \x01 in the kernel log. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * | ARM: fix scheduling while atomic warning in alignment handling codeRussell King2013-02-251-7/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Paolo Pisati reports that IPv6 triggers this warning: BUG: scheduling while atomic: swapper/0/0/0x40000100 Modules linked in: [<c001b1c4>] (unwind_backtrace+0x0/0xf0) from [<c0503c5c>] (__schedule_bug+0x48/0x5c) [<c0503c5c>] (__schedule_bug+0x48/0x5c) from [<c0508608>] (__schedule+0x700/0x740) [<c0508608>] (__schedule+0x700/0x740) from [<c007007c>] (__cond_resched+0x24/0x34) [<c007007c>] (__cond_resched+0x24/0x34) from [<c05086dc>] (_cond_resched+0x3c/0x44) [<c05086dc>] (_cond_resched+0x3c/0x44) from [<c0021f6c>] (do_alignment+0x178/0x78c) [<c0021f6c>] (do_alignment+0x178/0x78c) from [<c00083e0>] (do_DataAbort+0x34/0x98) [<c00083e0>] (do_DataAbort+0x34/0x98) from [<c0509a60>] (__dabt_svc+0x40/0x60) Exception stack(0xc0763d70 to 0xc0763db8) 3d60: e97e805e e97e806e 2c000000 11000000 3d80: ea86bb00 0000002c 00000011 e97e807e c076d2a8 e97e805e e97e806e 0000002c 3da0: 3d000000 c0763dbc c04b98fc c02a8490 00000113 ffffffff [<c0509a60>] (__dabt_svc+0x40/0x60) from [<c02a8490>] (__csum_ipv6_magic+0x8/0xc8) Fix this by using probe_kernel_address() stead of __get_user(). Cc: <stable@vger.kernel.org> Reported-by: Paolo Pisati <p.pisati@gmail.com> Tested-by: Paolo Pisati <p.pisati@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * | ARM: VFP: fix emulation of second VFP instructionRussell King2013-02-251-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Martin Storsjö reports that the sequence: ee312ac1 vsub.f32 s4, s3, s2 ee702ac0 vsub.f32 s5, s1, s0 e59f0028 ldr r0, [pc, #40] ee111a90 vmov r1, s3 on Raspberry Pi (implementor 41 architecture 1 part 20 variant b rev 5) where s3 is a denormal and s2 is zero results in incorrect behaviour - the instruction "vsub.f32 s5, s1, s0" is not executed: VFP: bounce: trigger ee111a90 fpexc d0000780 VFP: emulate: INST=0xee312ac1 SCR=0x00000000 ... As we can see, the instruction triggering the exception is the "vmov" instruction, and we emulate the "vsub.f32 s4, s3, s2" but fail to properly take account of the FPEXC_FP2V flag in FPEXC. This is because the test for the second instruction register being valid is bogus, and will always skip emulation of the second instruction. Cc: <stable@vger.kernel.org> Reported-by: Martin Storsjö <martin@martin.st> Tested-by: Martin Storsjö <martin@martin.st> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * | ARM: 7656/1: uImage: Error out on build of multiplatform without LOADADDROlof Johansson2013-02-231-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On multiplatform kernels, $MACHINE will be empty so there will be no default LOADADDR. Fail to build the uImage target unless one is provided by the developer at build time. Signed-off-by: Olof Johansson <olof@lixom.net> Acked-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * | ARM: 7654/1: Preserve L_PTE_VALID in pte_modify()Catalin Marinas2013-02-211-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Following commit 26ffd0d4 (ARM: mm: introduce present, faulting entries for PAGE_NONE), if a page has been mapped as PROT_NONE, the L_PTE_VALID bit is cleared by the set_pte_ext() code. With LPAE the software and hardware pte share the same location and subsequent modifications of pte range (change_protection()) will leave the L_PTE_VALID bit cleared. This patch adds the L_PTE_VALID bit to the newprot mask in pte_modify(). Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Reported-by: Subash Patel <subash.rp@samsung.com> Tested-by: Subash Patel <subash.rp@samsung.com> Acked-by: Will Deacon <will.deacon@arm.com> Cc: <stable@vger.kernel.org> # 3.8.x Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * | ARM: 7653/2: do not scale loops_per_jiffy when using a constant delay clockNicolas Pitre2013-02-213-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When udelay() is implemented using an architected timer, it is wrong to scale loops_per_jiffy when changing the CPU clock frequency since the timer clock remains constant. The lpj should probably become an implementation detail relevant to the CPU loop based delay routine only and more confined to it. In the mean time this is the minimal fix needed to have expected delays with the timer based implementation when cpufreq is also in use. Reported-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Nicolas Pitre <nico@linaro.org> Tested-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Liviu Dudau <Liviu.Dudau@arm.com> Cc: stable@vger.kernel.org Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | | ARM: 7651/1: remove unused smp_timer_broadcast #defineMark Rutland2013-02-131-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The assignment of clock_event_device::broadcast can be done by timer core as of 12ad100046: "clockevents: Add generic timer broadcast function", and the arm code moved over to this as of 3d06770eef: "arm: Add generic timer broadcast support", but left a dangling #define when !CONFIG_GENERIC_TIMER_BROADCAST. This patch removes the now unused #define. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | | Merge branch 'for-rmk/broadcast' of ↵Russell King2013-02-0455-238/+231
| | |\ \ \ | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/will/linux into devel-stable
| * | \ \ \ Merge tag 'late-mvebu-rebased' of ↵Linus Torvalds2013-02-2842-329/+1195
| |\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC mvebu platform changes from Olof Johansson: "This series contains changes for the Marvell EBU platforms (mvebu, orion, kirkwood, dove) that were not part of the first set of pull requests because of dependencies on the MMC tree, and being submitted a little late. Notable changes are: - More devices get moved out of board files into device tree descriptions. The remaining devices listed in there have patches that will get sent for 3.10, after which we can remove a lot of the board files entirely. We are doing the pinctrl and mmc drivers here, ethernet and PCI still remain. - SMP support for mvebu is improved with support for the local interrupt controller. - The Guruplug board file gets replaced with a DT description. Unfortunately, the dependency on the MMC tree turned out to be a much larger problem than expected, when the MMC maintainer rebased the patches in his tree that all of the patches in this branch are based on, which caused merge conflicts between the new and old versions of those patches. To work around the merge conflicts, this branch rebases all patches on top of the respective MMC patches that did get merged into 3.9. The patches are all identical to the versions that were part of linux-next, but have a new commit date." * tag 'late-mvebu-rebased' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (90 commits) arm: mvebu: enable the SD card slot on Armada 370 Reference Design board ARM: kirkwood: topkick: init mvsdio via DT ARM: kirkwood: nsa310: convert to pinctrl ARM: Kirkwood: topkick: Enable i2c bus. ARM: kirkwood: topkick: convert to pinctrl ARM: dove: convert serial DT nodes to clocks property arm: mvebu: Add SPI flash on Armada 370 DB board arm: mvebu: Add SPI flash on Armada XP-DB board arm: mvebu: Add SPI flash on Armada XP-GP board arm: mvebu: Add support for SPI controller in Armada 370/XP clocksource: update and move armada-370-xp-timer documentation to timer directory arm: mvebu: update DT to support local timers ARM: Dove: convert usb host controller to DT arm: mvebu: Enable USB controllers on Armada 370/XP boards arm: mvebu: Add support for USB host controllers in Armada 370/XP arm: mvebu: add button for OpenBlocks AX3-4 ARM: Kirkwood: Convert NS2 to gpio-poweroff. ARM: Kirkwood: Convert NSA310 I2C to device tree ARM: Kirkwood: Convert NSA310 to use gpio-poweroff driver ARM: Kirkwood: Convert NSA310 to DT based regulators. ...
| | * | | | | arm: mvebu: enable the SD card slot on Armada 370 Reference Design boardFlorian Fainelli2013-02-281-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Armada 370 Reference Design board has one SD card slot, directly connected to the SDIO IP of the SoC, so we enable this IP. there are no GPIOs for card-detect and write-protect so we do not specify any. Signed-off-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| | * | | | | ARM: kirkwood: topkick: init mvsdio via DTJason Cooper2013-02-282-6/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Jason Cooper <jason@lakedaemon.net> Tested-by: Andrew Lunn <andrew@lunn.ch>
| | * | | | | ARM: kirkwood: nsa310: convert to pinctrlJason Cooper2013-02-284-35/+99
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| | * | | | | ARM: Kirkwood: topkick: Enable i2c bus.Andrew Lunn2013-02-281-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a DT node for I2C and pinctrl hog for the pins. There appears to be an i2c bus on topkick with a device on it: i2cdetect 0 WARNING! This program can confuse your I2C bus, cause data loss and worse! I will probe file /dev/i2c-0. I will probe address range 0x03-0x77. Continue? [Y/n] y 0 1 2 3 4 5 6 7 8 9 a b c d e f 00: -- -- -- -- -- -- -- -- -- -- -- -- -- 10: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 20: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 30: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 40: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 50: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 60: -- -- -- -- 64 -- -- -- -- -- -- -- -- -- -- -- 70: -- -- -- -- -- -- -- -- Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| | * | | | | ARM: kirkwood: topkick: convert to pinctrlJason Cooper2013-02-282-42/+90
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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