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* Merge master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2005-11-0716-54/+358
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| * [ARM] Allow SMP if Realview MPcore is selectedRussell King2005-11-071-1/+1
| | | | | | | | | | | | | | This patch puts into place the final piece of the puzzle for SMP support on ARM. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [ARM] 3121/1: unconditionally use XCB=101 on ixp2000Lennert Buytenhek2005-11-071-22/+13
| | | | | | | | | | | | | | | | | | | | | | | | Patch from Lennert Buytenhek Since we have to use XCB=101 instead of XCB=000 on the ixp2400 to prevent it from regularly falling over, and since we have to deal with manual write buffer flushing because of that, we might as well use XCB=101 on all ixp2000 platforms since it's faster than XCB=000. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [ARM] 3118/1: fix and reenable nwfpe extended precision emulation for big-endianLennert Buytenhek2005-11-074-7/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | Patch from Lennert Buytenhek nwfpe extended precision emulation used to be broken on big-endian and was therefore disabled. This patch fixes nwfpe so that it copies extended precision floats to/from userspace in the proper word order (similar to patch #2046, see the description of that patch for an explanation) and reenables the Kconfig option. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [ARM] 3117/1: nwfpe kernel memory info leakLennert Buytenhek2005-11-074-8/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Patch from Lennert Buytenhek The routine that nwfpe uses for converting floats/doubles to extended precision fails to zero two bytes of kernel stack. This is not immediately obvious, as the floatx80 structure has 16 bits of implicit padding (by design.) These two bytes are copied to userspace when an stfe is emulated, causing a possible info leak. Make the padding explicit and zero it out in the relevant places. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [ARM SMP] Add Realview MPcore SMP supportRussell King2005-11-074-0/+253
| | | | | | | | | | | | | | Add SMP support for the MPcore tile fitted to the Realview ARM platform. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * Merge with ARM SMP treeRussell King2005-11-072-17/+39
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| | * [ARM SMP] Add support for shared memory attributeRussell King2005-11-072-17/+39
| | | | | | | | | | | | | | | | | | | | | We need to set the shared memory attribute in the page tables on SMP systems to allow the cache coherency to operate. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | [ARM] Add support for Realview with MPcore tileRussell King2005-11-072-0/+14
| | | | | | | | | | | | | | | | | | | | | Add uniprocessor support for Realview platform fitted with the MPcore (SMP) tile. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | [ARM] realview core.h uses leds_event_t, so include asm/leds.hRussell King2005-11-071-0/+1
| |/ | | | | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | [PATCH] kfree cleanup: archJesper Juhl2005-11-071-2/+1
| | | | | | | | | | | | | | | | | | | | | | This is the arch/ part of the big kfree cleanup patch. Remove pointless checks for NULL prior to calling kfree() in arch/. Signed-off-by: Jesper Juhl <jesper.juhl@gmail.com> Acked-by: Grant Grundler <grundler@parisc-linux.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | [PATCH] consolidate sys_ptrace()Christoph Hellwig2005-11-071-48/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The sys_ptrace boilerplate code (everything outside the big switch statement for the arch-specific requests) is shared by most architectures. This patch moves it to kernel/ptrace.c and leaves the arch-specific code as arch_ptrace. Some architectures have a too different ptrace so we have to exclude them. They continue to keep their implementations. For sh64 I had to add a sh64_ptrace wrapper because it does some initialization on the first call. For um I removed an ifdefed SUBARCH_PTRACE_SPECIAL block, but SUBARCH_PTRACE_SPECIAL isn't defined anywhere in the tree. Signed-off-by: Christoph Hellwig <hch@lst.de> Acked-by: Paul Mackerras <paulus@samba.org> Acked-by: Ralf Baechle <ralf@linux-mips.org> Acked-By: David Howells <dhowells@redhat.com> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Acked-by: Paul Mundt <lethal@linux-sh.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | [PATCH] fix remaining missing includesTim Schmielau2005-11-073-0/+3
|/ | | | | | | | | | Fix more include file problems that surfaced since I submitted the previous fix-missing-includes.patch. This should now allow not to include sched.h from module.h, which is done by a followup patch. Signed-off-by: Tim Schmielau <tim@physik3.uni-rostock.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [ARM] Fix /proc/cpuinfo format for ARM SMPRussell King2005-11-061-1/+6
| | | | | | | | glibc expects to count lines beginning with "processor" to determine the number of processors, not lines beginning with "Processor". So, give glibc the format it expects. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] Don't call dump_cpu_info unless we're bootingRussell King2005-11-061-1/+2
| | | | | | | | We don't want to call dump_cpu_info() from cpu_init() after boot since it produces a lot of unnecessary noise - since cpu_init() gets called on resume and hotplug cpu insertion events. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] Fix second missing declaration of cache_is_vivt()Russell King2005-11-061-1/+0
| | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] Fix missing declaration of cache_is_vivt()Russell King2005-11-061-0/+1
| | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 3113/1: PXA: Allow machines to override (and also reuse) pxa pm functionsRichard Purdie2005-11-061-4/+12
| | | | | | | | | | | | | | Patch from Richard Purdie Update the PXA pm.c file to allow machines (such as the Sharp Zaurus) to override the standard pm functions but reuse/wrap them where needed. The init call is made slightly earlier to give machine code an init level to override them in removing any race. Signed-off-by: Richard Purdie Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 3115/1: small optimizations to exception vector entry codeNicolas Pitre2005-11-061-8/+7
| | | | | | | | | | Patch from Nicolas Pitre Since we know the value of cpsr on entry, we can replace the bic+orr with a single eor. Also remove a possible result delay (at least on XScale). Signed-off-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 3114/1: use ixp2000_reg_wrb in ixp2000 uengine loaderLennert Buytenhek2005-11-061-6/+5
| | | | | | | | | Patch from Lennert Buytenhek Make the uengine loader use ixp2000_reg_wrb in the right places. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 3089/1: ixp4xx AHB/PCI endianness fixAlessandro Zummo2005-11-061-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Patch from Alessandro Zummo This patch fixes AHB/PCI endianness problems when the processor is in little-endian mode. The patch configures the CSR register closely following the directives in [1], paragraph 4.1, page 19. According to the considerations in [1], page 11, while the AHB bus supports both endian modes, on the IXP4XX it always uses big-endian. The PCI bus is connected to the South AHB. A wrong setting in the CSR register will thus cause a malfunctional PCI bus. A schematic diagram of the bus interconnections on the IXP4XX can be found in [1], page 18. The patch has been verified to work on the NSLU2 in both LE and BE modes. The author is Peter Korsgaard. [1] Intel® IXP4XX Product Line of Network Processors and IXC1100 Control Plane Processor: Understanding Big Endian and Little Endian Modes http://www.intel.com/design/network/applnots/25423701.pdf Signed-off-by: Alessandro Zummo <a.zummo@towertech.it> Signed-off-by: Deepak Saxena <dsaxena@plexity.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 3088/1: PXA: Add machine support for the Sharp SL-6000x series of PDAsDirk Opfer2005-11-063-2/+170
| | | | | | | | | | Patch from Dirk Opfer This patch adds basic machine support for the Sharp SL-6000x (Tosa) PDAs. Signed-off-by: Dirk Opfer Signed-off-by: Richard Purdie <rpurdie@rpsys.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [PATCH] ARM: Reverted 2918/1: [update] Base port of Comdial MP1000 platfromRussell King2005-11-048-1204/+2
| | | | No longer maintained
* [ARM] 3097/1: change library link orderingNicolas Pitre2005-11-041-1/+1
| | | | | | | | | | | | | | | | | | | | | | Patch from Nicolas Pitre We have an optimized sha1 routine (arch/arm/lib/sha1.S) meant to override the generic one in lib/sha1.c. Unfortunately lib/lib.a is listed _before_ arch/arm/lib/lib.a in the link argument list and therefore the architecture specific lib functions are not picked up before the generic versions. This patch is a quick fix to change that ordering for ARM. Here's what the kbuild maintainer had to say about it (was also CC'd on lkml): On Wed, 2 Nov 2005, Sam Ravnborg wrote: > This looks like an obvious way to achive correct ordering. > We could change it so arch defines always took precedence but > the above is so simple that it is not worth the effort. Signed-off-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 3087/1: PXA2xx flash platform device conversionTodd Poynor2005-11-042-2/+168
| | | | | | | | | | | | | Patch from Todd Poynor Add platform devices for flash to Lubbock and Mainstone board files. Once in place, the two existing mtd map drivers for the boards will be converted to use a single pxa2xx map driver in the linux-mtd tree. Take 4: flash_platform_data .map_name vs. .name cleaned up, resync with merged irda patch context. Signed-off-by: Todd Poynor <tpoynor@mvista.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 3086/1: ixp2xxx error irq handlingDave Jiang2005-11-041-0/+46
| | | | | | | | | | | | Patch from Dave Jiang This provides support for IXP2xxx error interrupt handling. Previously there was a patch to remove this (although the original stuff was broken). Well, now the error bits are needed again. These are used extensively by the micro-engine drivers according to Deepak and also we will need it for the new EDAC code that Alan Cox is trying to push into the main kernel. Re-submit of 3072/1, generated against git tree pulled today. AFAICT, this git tree pulled in all the ARM changes that's in arm.diff. Please let me know if there are additional changes. Thx! Signed-off-by: Dave Jiang <djiang@mvista.com> Signed-off-by: Deepak Saxena <dsaxena@plexity.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 3094/1: remove PLD stuff from old uaccess codeNicolas Pitre2005-11-041-116/+16
| | | | | | | | | | | Patch from Nicolas Pitre ARM processors that have pld instructions are not using those copy_user implementation anymore. Let's remove the useless PLD lines which were half wrong anyway. Signed-off-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] Fix IXDP2x01 config filesDeepak Saxena2005-11-032-3/+3
| | | | | | | IXDP2401 config file has wrong baudrate and both boards have 3 UARTs. Signed-off-by: Deepak Saxena <dsaxena@plexity.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] Merge SMP treeRussell King2005-11-033-1/+14
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| * [ARM SMP] Add configuration option for ARMv6K processorsRussell King2005-11-033-1/+14
| | | | | | | | | | | | | | The 'K' extension adds several new instructions to the ARMv6 ISA which are primerily useful for SMP. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | [ARM] 3092/1: remove excessive print format paddingNicolas Pitre2005-11-031-4/+4
| | | | | | | | | | | | | | | | | | | | | | Patch from Nicolas Pitre Using a llx format to print addresses that might possibly be (only) 36 bits wide make sense. However making it a zero padded 16 char wide field is a bit excessive and useless. Signed-off-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | [ARM] Add Realview default configuration fileRussell King2005-11-031-0/+789
| | | | | | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | [ARM] Fix more 3016/1 breakageRussell King2005-11-032-10/+10
|/ | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM SMP] Add hotplug CPU infrastructureRussell King2005-11-024-0/+132
| | | | | | | This patch adds the infrastructure to support hotplug CPU on ARM platforms. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM SMP] Fix a couple of warningsRussell King2005-11-021-2/+2
| | | | | | Use *cpus_addr() to display the mask of pending/to be called CPUs. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM SMP] Track CPU idle threadsRussell King2005-11-021-7/+13
| | | | | | Track the idle thread task_struct for each CPU. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] Fix Realview machine for patch 3016/1Russell King2005-11-021-7/+37
| | | | | | | 3016/1 changed the map_desc structure to take a PFN instead of a physical address. Fixup Realview machine support for this change. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] Fix mm initialisation with write buffered write allocate cachesRussell King2005-11-021-1/+8
| | | | | | | | It seems that without the extra tlb flush, we may end up faulting during the early kernel initialisation because the TLB can't see the updated page tables. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* Merge master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2005-11-0130-455/+2522
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| * [ARM] 3081/1: Remove GTWX5715 from ixp4xx_defconfigDeepak Saxena2005-11-011-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Patch from Deepak Saxena CONFIG_MACH_GTWX5715 hardcodes the machine type in head-xscale.S so we can no longer boot on any other machine types. The proper fix would be to remove the hardcoding, but that machine is an off-the-shelf system and most users won't have access to the bootloader. :( Signed-off-by: Deepak Saxena <dsaxena@plexity.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [ARM] 3052/1: add ixp2000 microcode loaderLennert Buytenhek2005-11-012-1/+475
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Patch from Lennert Buytenhek This patch adds a microcode loader for the ixp2000 architecture. The ixp2000 is an xscale-based CPU with a number of additional small CPUs ('microengines') on die that can be programmed to do various things. Depending on the ixp2000 model, there are between 2 and 16 microengines. This code provides an API that allows configuring the microengines, loading code into them, and starting and stopping them and reading out a number of status registers, and is used by the microengine network driver that was recently announced to netdev. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Deepak Saxena <dsaxena@plexity.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [ARM] 2948/1: new preemption safe copy_{to|from}_user implementationNicolas Pitre2005-11-013-2/+216
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Patch from Nicolas Pitre This patch provides a preemption safe implementation of copy_to_user and copy_from_user based on the copy template also used for memcpy. It is enabled unconditionally when CONFIG_PREEMPT=y. Otherwise if the configured architecture is not ARMv3 then it is enabled as well as it gives better performances at least on StrongARM and XScale cores. If ARMv3 is not too affected or if it doesn't matter too much then uaccess.S could be removed altogether. Signed-off-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [ARM] 2947/1: copy template with new memcpy/memmoveNicolas Pitre2005-11-014-374/+502
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Patch from Nicolas Pitre This patch provides a new implementation for optimized memory copy functions on ARM. It is made of two levels: a template that consists of the core copy code and separate files that define macros to be used with the core code depending on the type of copy needed. This allows for best performances while sharing the same core for implementing memcpy(), copy_from_user() and copy_to_user() for instance. Two reasons for this work: 1) the current copy_to_user/copy_from_user implementation assumes no task switch will ever occur in the middle of each copied page making it completely unsafe with CONFIG_PREEMPT=y. 2) current copy implementations are measurably suboptimal and optimizing different implementations separately is a pain and more opportunities for bugs. The reason for (1) is the fact that copy inside user pages are performed with the ldm instruction which has no mean for testing user protections and could possibly race with process preemption bypassing the COW mechanism for example. This is a longstanding issue that we said ought to be fixed for about two years now. The solution is to substitute those ldm insns with a series of ldrt or strt insns to enforce user memory protection. At least on StrongARM and XScale cores the ldm is not faster than the equivalent ldr/str insns with a warm i-cache so there is no measurable performance degradation with that change. The fact that the copy code is a template makes it pretty easy to reuse the same core code as for memcpy and benefit from the same performance optimizations. Now (2) is best demonstrated with actual throughput measurements. First, here is a summary of memcopy tests performed on a StrongARM core: PTR alignment buffer size kernel version this version ------------------------------------------------------------ aligned 32 59.73 107.43 unaligned 32 61.31 74.72 aligned 100 132.47 136.15 unaligned 100 103.84 123.76 aligned 4096 130.67 130.80 unaligned 4096 130.68 130.64 aligned 1048576 68.03 68.18 unaligned 1048576 68.03 68.18 The buffer size is in bytes and the measured speed in MB/s. The copy was performed repeatedly with given buffer and throughput averaged over 3 seconds. Here we can see that the current kernel version has a higher entry cost that shows up with small buffers. As buffer size grows both implementation converge to the same throughput. Now here's the exact same test performed on an XScale core (PXA255): PTR alignment buffer size kernel version this version ------------------------------------------------------------ aligned 32 46.99 77.58 unaligned 32 53.61 59.59 aligned 100 107.19 136.59 unaligned 100 83.61 97.58 aligned 4096 129.13 129.98 unaligned 4096 128.36 128.53 aligned 1048576 53.76 59.41 unaligned 1048576 33.67 56.96 Again we can see the entry setup cost being higher for the current kernel before getting to the main copy loop. Then throughput results converge as long as the buffer remains in the cache. Then the 1MB case shows more differences probably due to better pld placement and/or less instruction interlocks in this proposed implementation. Disclaimer: The PXA system was running with slower clocks than the StrongARM system so trying to infer any conclusion by comparing those separate sets of results side by side would be completely inappropriate. So... What this patch does is to replace both memcpy and memmove with an implementation based on the provided copy code template. The memmove code is kept separate since it is used only if the memory areas involved do overlap in which case the code is a transposition of the template but with the copy occurring in the opposite direction (trying to fit that mode into the template turned it into a mess not worth it for memmove alone). And obviously both memcpy and memmove were tested with all kinds of pointer alignments and buffer sizes to exercise all code paths for correctness. The next patch will provide the now trivial replacement implementation copy_to_user and copy_from_user. Signed-off-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [ARM] 2946/2: split --arch_clear_user() out of lib/uaccess.SNicolas Pitre2005-11-013-40/+55
| | | | | | | | | | | | | | | | | | Patch from Nicolas Pitre Required for future enhancement patches. Signed-off-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [ARM] 3078/1: lubbock platform updates, mostly mmc detectionDavid Brownell2005-11-011-3/+60
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Patch from David Brownell Lubbock updates: * Provide an address for the SMC91x chip that doesn't generate a boot-time warning (matching the EEPROM). * Update MMC support to (a) detect card insert/remove, and (b) report the readonly switch setting for SD cards. Previously, MMC/SD cards had to be present at boot time else they couldn't be detected. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [ARM] 3071/1: RX3715 - add lcd/fb platform setupBen Dooks2005-11-011-4/+66
| | | | | | | | | | | | | | | | | | | | Patch from Ben Dooks Platform data for the LCD/framebuffer driver for the RX3715 LCD panel. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [ARM] 3065/1: ixp2000 typo and whitespace fixesLennert Buytenhek2005-11-012-3/+1
| | | | | | | | | | | | | | | | | | | | Patch from Lennert Buytenhek Misc ixp2000 typo and whitespace fixes. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Deepak Saxena <dsaxena@plexity.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [ARM] 3064/1: start using ixp2000_reg_wrbLennert Buytenhek2005-11-014-24/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Patch from Lennert Buytenhek Switch the users of ixp2000_reg_write that depend on writes being flushed out of the write buffer by the time that function returns over to ixp2000_reg_wrb. When using XCB=101, writes to the same functional unit are still guaranteed to complete in order, so we only need to protect against: - reordering of writes to different functional units - masking an interrupt and then reenabling the IRQ bit in CPSR Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Deepak Saxena <dsaxena@plexity.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [ARM] 3062/1: map in various enp2611 peripherals for the ixp2000 netdev driverLennert Buytenhek2005-11-011-1/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Patch from Lennert Buytenhek The enp2611 version of the ixp2000 netdev driver needs to be able to access a number of on-board peripherals. ioremap() is not suitable for this, as that will cause XCB=000 mappings to be done, which will make the cpu susceptible to crashing on ixp2400 erratum #66. Properly aligned iotable mappings with MT_IXP2000_DEVICE will cause section mappings with XCB=101 to be done, which is safe. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Deepak Saxena <dsaxena@plexity.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [ARM] Convert EBSA110 network driver to a platform driverRussell King2005-10-311-1/+25
| | | | | | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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