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* ARM: EXYNOS: Migrate Exynos specific macros from plat to machSachin Kamat2014-05-262-60/+72
| | | | | | | | | Move Exynos specific macros to mach-exynos from plat-samsung to avoid unnecessary dependency on plat based header files. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
* ARM: EXYNOS: Remove exynos_subsys registrationSachin Kamat2014-05-262-12/+0
| | | | | | | | 'exynos_subsys' has no users. Remove this code. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
* ARM: EXYNOS: Remove duplicate lines in MakefileSachin Kamat2014-05-261-6/+1
| | | | | | | | Group all files compiled under common config option together. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
* ARM: EXYNOS: use v7_exit_coherency_flush macro for cache disablingLeela Krishna Amudala2014-05-261-62/+1
| | | | | | | | | | | | | | | | | | A common macro v7_exit_coherency_flush available which does the below tasks in the seqeunce. -clearing C bit -clearing L1 cache -exit SMP -instruction and data synchronization So removing the local functions which does the same thing and use the macro instead. Signed-off-by: Leela Krishna Amudala <leela.krishna@linaro.org> Acked-by: Nicolas Pitre <nico@linaro.org> [cw00.choi@samsung.com: tested on exynos3250 based board] Tested-by: Chanwoo Choi <cw00.choi@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
* Merge branch 'v3.16-next/clk-s3c24xx-3' into v3.16-next/cleanup-samsungKukjin Kim2014-05-2647-3221/+349
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| * ARM: S3C24XX: fix merge conflictKukjin Kim2014-05-151-2/+0
| | | | | | | | | | | | | | Missed some changes during re-sorting this branch. So fixed it. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * ARM: S3C24XX: remove SAMSUNG_CLOCK remnants after ccf conversionHeiko Stuebner2014-05-139-160/+0
| | | | | | | | | | | | | | | | This finally removes all remaining SAMSUNG_CLOCK conditional code from s3c24xx architectures. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * ARM: S3C24XX: remove legacy clock codeHeiko Stuebner2014-05-1313-1122/+0
| | | | | | | | | | | | | | | | | | | | | | With the move to the common clock framework completed for s3c2410, s3c2440 and s3c2442, the legacy clock code for these machines can go away too. This also includes the legacy dclk code, as all legacy users are converted. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * ARM: S3C24XX: convert s3c2410 to common clock frameworkHeiko Stuebner2014-05-1312-34/+67
| | | | | | | | | | | | | | | | | | | | | | | | Convert the machines using the s3c2410 to use the new driver based on the common clock framework instead of the legacy Samsung clock driver. As with the s3c244x, machines using the clkout output will need a fixup from someone with the hardware. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * ARM: S3C24XX: convert s3c2440 and s3c2442 to common clock frameworkHeiko Stuebner2014-05-1312-36/+73
| | | | | | | | | | | | | | | | | | | | | | | | | | Convert all machines using these cpus to use the ccf clock driver instead of the legacy Samsung clock implementation. Some of the more esotheric machines will probably need a fixup, as they do strange things to the clkout outputs, that I did not really understand nor have the hardware to check. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * ARM: S3C24XX: add platform code for conversion to the common clock frameworkHeiko Stuebner2014-05-136-1/+51
| | | | | | | | | | | | | | | | | | | | | | | | | | This adds the necessary init functions to init the clocks from the common clock framework and necessary CONFIG_SAMSUNG_CLOCK ifdefs around the legacy clock code. This also includes empty stubs for the *_setup_clocks functions that are called from the cpufreq driver on resume. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * ARM: S3C24XX: enable usage of common dclk if common clock framework is enabledHeiko Stuebner2014-05-139-5/+60
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add platform device and select the correct implementation automatically depending on wether the old samsung_clock or the common clock framework is enabled. This is only done for machines already using the old dclk implementation, as everybody else should move to use dt anyway. The machine-specific settings for the external clocks will have to be set by somebody with knowledge about the specific hardware. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Tomasz Figa <t.figa@samsung.com> [pebolle@tiscali.nl: pointed out typo and fixed] Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * ARM: S3C24XX: cpufreq-utils: don't write raw values to MPLLCON when using ccfHeiko Stuebner2014-05-092-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The s3c24xx cpufreq driver needs to change the mpll speed and was doing this by writing raw values from a translation table into the MPLLCON register. Change this to use a regular clk_set_rate call when using the common clock framework and only write the raw value in the samsung_clock case. The s3c cpufreq driver does already aquire the mpll, so simply add a reference to struct s3c_cpufreq_config to let set_fvco access it. While struct clk is opaque the differenciation between samsung clock and common clock is kept, as the samsung-clock mpll clk does not implement a real set_rate. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * ARM: S3C24XX: convert s3c2412 to common clock frameworkHeiko Stuebner2014-04-159-813/+40
| | | | | | | | | | | | | | | | | | Convert all machines using these cpus to use the ccf clock driver instead of the legacy Samsung clock implementation. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * ARM: S3C24XX: only store clock registers when old clock code is activeHeiko Stuebner2014-04-151-3/+10
| | | | | | | | | | | | | | | | | | | | The Samsung ccf driver already handles the save and restore of the clock registers on suspend and resume. The architecture code should not duplicate this when the ccf is active. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * ARM: S3C24XX: Convert s3c2416 and s3c2443 to common clock frameworkHeiko Stuebner2014-04-1510-1114/+41
| | | | | | | | | | | | | | | | | | | | | | This converts the mentioned platforms to use the newly introduced driver for the common clock framework for them. With this the whole legacy clock structure can go away too. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * ARM: dts: add clock data for s3c2416Heiko Stuebner2014-04-152-0/+55
| | | | | | | | | | | | | | | | | | This adds the clock controller itself, the xti clock on the smdk2416 as well as the clock references in the individual device nodes. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * ARM: S3C24XX: prevent conflicts between ccf and non-ccf s3c24xx-socsHeiko Stuebner2014-04-152-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As the conversion to the common-clock-framework is done in multiple steps, it is necessary to prevent conflicts between the different struct clk implementations. For this include the s3c24xx_setup_clocks function only when SAMSUNG_CLOCK is selected and make the socs we don't convert this time explicitly depend on SAMSUNG_CLOCK, which gets only selected automatically if COMMON_CLK is not enabled. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * clk: samsung: add clock-driver for s3c2416, s3c2443 and s3c2450Heiko Stuebner2014-04-151-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The three SoCs share a common clock tree which only differs in the existence of some special clocks. As with all parts common to these three SoCs the driver is named after the s3c2443, as it was the first SoC introducing this structure and there exists no other label to describe this s3c24xx epoch. The clock structure is built according to the manuals of the included SoCs and might include changes in comparison to the previous clock structure. As an example the sclk_uart gate was never handled previously and the div_uart was made to be the clock used by the serial driver. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
* | ARM: dts: Remove g2d_pd node for exynos5420Arun Kumar K2014-05-151-6/+0
| | | | | | | | | | | | | | | | | | | | G2D power domain also controls the CMU block of G2D. Since clock registers can be accessed anytime for viewing clk_summary, it can cause a system crash if g2d power domain is disabled. Signed-off-by: Arun Kumar K <arun.kk@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
* | ARM: dts: Remove mau_pd node for exynos5420Tushar Behera2014-05-151-5/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MAU powerdomain provides clocks for Audio sub-system block. This block comprises of the I2S audio controller, audio DMA blocks and Audio sub-system clock registers. Right now, there is no way to hook up power-domains with clock providers. During late boot when this power-domain gets disabled, we get following external abort. Unhandled fault: imprecise external abort (0x1406) at 0x00000000 Kernel panic - not syncing: Attempted to kill init! exitcode=0x00000007 Signed-off-by: Tushar Behera <tushar.behera@linaro.org> Tested-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
* | ARM: exynos_defconfig: enable HS-I2C to fix for mmc partition mountSachin Kamat2014-05-151-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | High speed I2C is used on Exynos5 based SoCs. Enable it. The MMC partition for Root filesystem cannot be mounted without this enabling HS-I2C and regulators on many boards are connected HS-I2C bus so the regulators don't come by default without this. Actually, we are not able to get arndale-octa board to boot and mount an MMC partition without this change. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Tested-by: Javi Merino <javi.merino@arm.com> [kgene.kim@samsung.com: modified description] Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
* | ARM: dts: disable MDMA1 node for exynos5420Seungwon Jeon2014-05-152-12/+7
| | | | | | | | | | | | | | | | | | | | | | | | This change places MDMA1 in disabled node for Exynos5420. If MDMA1 region is configured with secure mode, it makes the boot failure with the following on smdk5420 board. ("Unhandled fault: imprecise external abort (0x1406) at 0x00000000") Thus, arndale-octa board don't need to do the same thing anymore. Signed-off-by: Seungwon Jeon <tgih.jun@samsung.com> Tested-by: Javi Merino <javi.merino@arm.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
* | ARM: EXYNOS: fix the secondary CPU boot of exynos4212Kyungmin Park2014-05-151-1/+14
| | | | | | | | | | | | | | | | | | | | | | This patch fixes the offset of CPU boot address and changes the parameter of smc call for SMC_CMD_CPU1BOOT command on exynos4212. Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
* | Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvmLinus Torvalds2014-05-022-7/+10
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull KVM fixes from Paolo Bonzini: - Fix for a Haswell regression in nested virtualization, introduced during the merge window. - A fix from Oleg to async page faults. - A bunch of small ARM changes. - A trivial patch to use the new MSI-X API introduced during the merge window. * tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: KVM: ARM: vgic: Fix the overlap check action about setting the GICD & GICC base address. KVM: arm/arm64: vgic: fix GICD_ICFGR register accesses KVM: async_pf: mm->mm_users can not pin apf->mm KVM: ARM: vgic: Fix sgi dispatch problem MAINTAINERS: co-maintainance of KVM/{arm,arm64} arm: KVM: fix possible misalignment of PGDs and bounce page KVM: x86: Check for host supported fields in shadow vmcs kvm: Use pci_enable_msix_exact() instead of pci_enable_msix() ARM: KVM: disable KVM in Kconfig on big-endian systems
| * | arm: KVM: fix possible misalignment of PGDs and bounce pageMark Salter2014-04-281-6/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The kvm/mmu code shared by arm and arm64 uses kalloc() to allocate a bounce page (if hypervisor init code crosses page boundary) and hypervisor PGDs. The problem is that kalloc() does not guarantee the proper alignment. In the case of the bounce page, the page sized buffer allocated may also cross a page boundary negating the purpose and leading to a hang during kvm initialization. Likewise the PGDs allocated may not meet the minimum alignment requirements of the underlying MMU. This patch uses __get_free_page() to guarantee the worst case alignment needs of the bounce page and PGDs on both arm and arm64. Cc: <stable@vger.kernel.org> # 3.10+ Signed-off-by: Mark Salter <msalter@redhat.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
| * | ARM: KVM: disable KVM in Kconfig on big-endian systemsWill Deacon2014-04-261-1/+1
| |/ | | | | | | | | | | | | | | | | KVM currently crashes and burns on big-endian hosts, so don't allow it to be selected until we've got that fixed. Cc: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
* | Merge tag 'dt-for-linus' of git://git.secretlab.ca/git/linuxLinus Torvalds2014-04-284-14/+14
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull devicetree bug fixes from Grant Likely: "These are some important bug fixes that need to get into v3.15. This branch contains a pair of important bug fixes for the DT code: - Fix some incorrect binding property names before they enter common usage - Fix bug where some platform devices will be unable to get their interrupt number when they depend on an interrupt controller that is not available at device creation time. This is a problem causing mainline to fail on a number of ARM platforms" * tag 'dt-for-linus' of git://git.secretlab.ca/git/linux: of/irq: do irq resolution in platform_get_irq of: selftest: add deferred probe interrupt test dt: Fix binding typos in clock-names and interrupt-names
| * | dt: Fix binding typos in clock-names and interrupt-namesGeert Uytterhoeven2014-04-234-14/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | s/interrupts-names/interrupt-names/g s/clocks-names/clock-names/g Some of the binding files and device tree files get this wrong and the kernel won't be able to pick it up. Fix them up now so that they don't get widely used. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by : Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Grant Likely <grant.likely@linaro.org>
* | | Merge branch 'safe-dirty-tlb-flush'Linus Torvalds2014-04-271-1/+11
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This merges the patch to fix possible loss of dirty bit on munmap() or madvice(DONTNEED). If there are concurrent writers on other CPU's that have the unmapped/unneeded page in their TLBs, their writes to the page could possibly get lost if a third CPU raced with the TLB flush and did a page_mkclean() before the page was fully written. Admittedly, if you unmap() or madvice(DONTNEED) an area _while_ another thread is still busy writing to it, you deserve all the lost writes you could get. But we kernel people hold ourselves to higher quality standards than "crazy people deserve to lose", because, well, we've seen people do all kinds of crazy things. So let's get it right, just because we can, and we don't have to worry about it. * safe-dirty-tlb-flush: mm: split 'tlb_flush_mmu()' into tlb flushing and memory freeing parts
| * | | mm: split 'tlb_flush_mmu()' into tlb flushing and memory freeing partsLinus Torvalds2014-04-251-1/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The mmu-gather operation 'tlb_flush_mmu()' has done two things: the actual tlb flush operation, and the batched freeing of the pages that the TLB entries pointed at. This splits the operation into separate phases, so that the forced batched flushing done by zap_pte_range() can now do the actual TLB flush while still holding the page table lock, but delay the batched freeing of all the pages to after the lock has been dropped. This in turn allows us to avoid a race condition between set_page_dirty() (as called by zap_pte_range() when it finds a dirty shared memory pte) and page_mkclean(): because we now flush all the dirty page data from the TLB's while holding the pte lock, page_mkclean() will be held up walking the (recently cleaned) page tables until after the TLB entries have been flushed from all CPU's. Reported-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Tested-by: Dave Hansen <dave.hansen@intel.com> Acked-by: Hugh Dickins <hughd@google.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Russell King - ARM Linux <linux@arm.linux.org.uk> Cc: Tony Luck <tony.luck@intel.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | | | Merge branch 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-armLinus Torvalds2014-04-275-15/+56
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull arm fixes from Russell King: "A number of fixes for the PJ4/iwmmxt changes which arm-soc forced me to take during the merge window. This stuff should have been better tested and sorted out *before* the merge window" * 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm: ARM: 8042/1: iwmmxt: allow to build iWMMXt on Marvell PJ4B ARM: 8041/1: pj4: fix cpu_is_pj4 check ARM: 8040/1: pj4: properly detect existence of iWMMXt coprocessor ARM: 8039/1: pj4: enable iWMMXt only if CONFIG_IWMMXT is set ARM: 8038/1: iwmmxt: explicitly check for supported architectures
| * | | | ARM: 8042/1: iwmmxt: allow to build iWMMXt on Marvell PJ4BSebastian Hesselbarth2014-04-252-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some Marvell PJ4B CPUs also implement iWMMXt extensions. With a proper check for iWMMXt coprocessors now in place, enable it by default on PJ4B. While at it, also allow to manually select the corresponding Kconfig option. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | ARM: 8041/1: pj4: fix cpu_is_pj4 checkSebastian Hesselbarth2014-04-251-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit fdb487f5c961b94486a78fa61fa28b8eff1954ab ("ARM: 8015/1: Add cpu_is_pj4 to distinguish PJ4 because it has some differences with V7") introduced a cpuid check for Marvell PJ4 processors to fix a regression caused by adding PJ4 based Marvell Dove into multi_v7. Unfortunately, this check is too narrow to catch PJ4 used on Dove itself and breaks iWMMXt support. This patch therefore relaxes the cpuid mask to match both PJ4 and PJ4B. Also, rework the given comment about PJ4/PJ4B modifications to be a little bit more specific about the differences. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | ARM: 8040/1: pj4: properly detect existence of iWMMXt coprocessorSebastian Hesselbarth2014-04-251-1/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit fdb487f5c961b94486a78fa61fa28b8eff1954ab ("ARM: 8015/1: Add cpu_is_pj4 to distinguish PJ4 because it has some differences with V7") introduced a fix for checking PJ4 cpuid to not use PJ4 specific coprocessor access on non-PJ4 platforms. Unfortunately, this in turn broke Marvell Armada 370/XP, both comprising Marvell PJ4B CPUs without iWMMXt extension. Instead of only checking for cpuid, which may not be sufficient to determine iWMMXt support, the presence of iWMMXt coprocessors can be checked by enabling and reading the Coprocessor ID register (wCID, register 0 of CP1). Therefore this adds an explicit check for the presence and correct wCID value, before enabling iWMMXt capabilities. As a bonus, also print the iWMMXt version of a detected coprocessor. This has been tested to properly detect iWMMXt presence/absence on: - PJ4, CPUID 0x560f5815, wCID 0x56052001: Marvell Dove, iWMMXt v2 - PJ4B, CPUID 0x561f5811: Marvell Armada 370, no iWMMXt - PJ4B, CPUID 0x562f5841, wCID 0x56052001: Marvell Armada 1500, iWMMXt v2 - PJ4B, CPUID 0x562f5842: Marvell Armada XP, no iWMMXt Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | ARM: 8039/1: pj4: enable iWMMXt only if CONFIG_IWMMXT is setSebastian Hesselbarth2014-04-251-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes PJ4 coprocessor init to only expose iWMMXt capabilities, if the corresponding kernel support for iWMMXt is enabled. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | ARM: 8038/1: iwmmxt: explicitly check for supported architecturesSebastian Hesselbarth2014-04-251-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | iwmmxt.S requires special treatment of coprocessor access registers for PJ4 and XScale-based CPUs. It only checks for CPU_PJ4 and drops down to XScale-based treatment on all other architectures. As some PJ4B also come with iWMMXt and also need PJ4 treatment, rework the corresponding preprocessor directives to explicitly check for supported architectures and fail on unsupported ones. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | | | Merge tag 'staging-3.15-rc3' of ↵Linus Torvalds2014-04-272-2/+2
|\ \ \ \ \ | |_|/ / / |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging Pull staging / IIO driver fixes from Greg KH: "Here are some small staging and IIO driver fixes for 3.15-rc3. Nothing major at all, just some assorted issues that people have reported" * tag 'staging-3.15-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging: staging: comedi: usbdux: bug fix for accessing 'ao_chanlist' in private data iio: adc: mxs-lradc: fix warning when buidling on avr32 iio: cm36651: Fix i2c client leak and possible NULL pointer dereference iio: querying buffer scan_mask should return 0/1 staging:iio:ad2s1200 fix a missing break iio: adc: at91_adc: correct default shtim value ARM: at91: at91sam9260: change at91_adc name ARM: at91: at91sam9g45: change at91_adc name iio: cm32181: Fix read integration time function iio: adc: at91_adc: Repair broken platform_data support
| * | | | Merge tag 'iio-fixes-for-3.15a' of ↵Greg Kroah-Hartman2014-04-222-2/+2
| |\ \ \ \ | | |_|/ / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio into staging-linus Jonathan writes: First found of IIO fixes for the 3.15 cycle. * Fix the platform data support for the at91 adc driver. * A couple of related follow up patches get the support working again for at91sam9260 and at91sam9g45 as the earlier patch results in a device name change. * A default timer value in the at91 adc driver was bonkers. Make it sane. * Fix incorrect reporting of the integration time for the cm32181 light sensor * Fix a missing break in the ad2s1200 driver which would have give a false error return. * Make sure buffer scan mask queries from userspace return 0/1 rather than a fairly random value depending on their implementation of test_bit * Fix leak of the i2c client and a null pointer dereference in the cm36651 driver. * Fix a build warning on avr32 for the mxs-lradc (not exactly a critical combination - but the issue was real).
| | * | | ARM: at91: at91sam9260: change at91_adc nameAlexandre Belloni2014-03-151-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We can't use "at91_adc" to refer to the at91_adc driver anymore as the name is used to match an id_table. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
| | * | | ARM: at91: at91sam9g45: change at91_adc nameAlexandre Belloni2014-03-151-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We can't use "at91_adc" to refer to the at91_adc driver anymore as the name is used to match an id_table. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
* | | | | Merge tag 'fixes-3.15-rc3' of ↵Linus Torvalds2014-04-2572-165/+416
|\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC fixes from Arnd Bergmann: "Since we didn't get around to collect fixes in time for -rc2 over the easter vacation, this one is unfortunately a bit larger than we'd like for an -rc3 merge. A large set of the changes is in the device tree sources, so I'm splitting out the description between code changes and DT changes. Aside from omap and versatile express, the actual code bugs are and trivial. Here is an overview: imx: - fix video clock settings - fix one clock refcounting bug omap: - update defconfig for renamed USB PHY driver - fix error handling in gpmc - fix N900 video initialization regression - fix reression in hwmod code from missing braces - fix am43xx and omap3 clocks - remove bogus write to voltage control register pxa: - fix build regression from 3.13 header cleanup rockchip: - fix a misleading printk string shmobile: - fix incorrect sound setting on multiple machines spear: - remove incorrect __init section annotation tegra: - remove a stale Kconfig entry u300: - update defconfig ux500: - enable common wireless and sensor drivers in defconfig - more defconfig updates vexpress: - fix voltage calculation for opp - fix reboot hang and warning - fix out-of-bounds array access - improve error handling in clock driver overall: - always select CLKSRC_OF in multiplatform builds And these are the devicetree related changes: imx: - add missing #clock-cell properties - fix pinctrl setting in imx6sl-evk - fix video endpoint on imx53 - remove obsolete lvds-channel nodes (multiple patches) - add missing second stmpe node - fix usb host mode on dmo-edmqmx6 (multiple patches) - fix gic node #address-cells to match usage - add missing legacy IRQ map for PCIe - fix microsom pincontrol setting for rgmii - fix fatal typo in touchscreen DT usage for mx5 - list all RAM present on m53evk and mx53qsb omap: - fix bug in DT handling of gpmc external bus - add DT for older revision of beagleboard - fix regression after DT node name fixes - remove obsolete properties for gpmc - fix pinmux comment to match DT it refers to - fix newly added dra7xx clock node data - add missing clock for USB PHY mvebu: - add missing clock for mdio node - fix nonstandard vendor prefixes on i2c nodes rockchip: - fix pin control setting for uart shmobile: - fix typo in DT data for pin control (multiple patches) - fix gic node #address-cells to match usage tegra: - fix clock and uart DT representation to match hardware zynq: - add DT nodes for newly added driver - add DT properties required for cpufreq-ondemand overall: - restore alphabetic order in Makefile - grammar fixes in bindings" * tag 'fixes-3.15-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (66 commits) ARM: vexpress/TC2: Convert OPP voltage to uV before storing power/reset: vexpress: Fix restart/power off operation dt: tegra: remove non-existent clock IDs clk: tegra: remove non-existent clocks ARM: tegra: remove UART5/UARTE from tegra124.dtsi ARM: tegra: remove TEGRA_EMC_SCALING_ENABLE ARM: Tidy up DTB Makefile entries ARM: fix missing CLKSRC_OF on multi-platform ARM: spear: add __init to spear_clocksource_init() ARM: pxa: hx4700.h: include "irqs.h" for PXA_NR_BUILTIN_GPIO arm/mach-vexpress: array accessed out of bounds clk: vexpress: NULL dereference on error path ARM: OMAP2+: Fix GPMC remap for devices using an offset ARM: zynq: dt: Add I2C nodes to Zynq device tree ARM: zynq: DT: Add 'clock-latency' property ARM: OMAP2+: Fix oops for GPMC free ARM: dts: Add support for the BeagleBoard xM A/B ARM: dts: Grammar /that will/it will/ ARM: dts: Grammar /is uses/ is used/ ARM: OMAP2+: Fix config name for USB3 PHY ...
| * \ \ \ \ Merge tag 'zynq-dt-fixes-for-3.15' of git://git.xilinx.com/linux-xlnx into fixesArnd Bergmann2014-04-253-0/+167
| |\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | arm: Xilinx Zynq DT fixes for v3.15 - Enable Zynq I2c - Fix cpufreq DT binding * tag 'zynq-dt-fixes-for-3.15' of git://git.xilinx.com/linux-xlnx: ARM: zynq: dt: Add I2C nodes to Zynq device tree ARM: zynq: DT: Add 'clock-latency' property Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| | * | | | | ARM: zynq: dt: Add I2C nodes to Zynq device treeSoren Brinkmann2014-04-223-0/+166
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Tested-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| | * | | | | ARM: zynq: DT: Add 'clock-latency' propertySoren Brinkmann2014-04-221-0/+1
| | | |_|_|/ | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Specify the 'clock-latency' property to avoid certain cpufreq governors from refusing to work with the following error: ondemand governor failed, too long transition latency of HW, fallback to performance governor Reported-by: Mike Looijmans <mike.looijmans@topic.nl> Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Tested-by: Mike Looijmans <mike.looijmans@topic.nl> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | | Merge tag 'vexpress/fixes-for-3.15' of ↵Arnd Bergmann2014-04-247-9/+12
| |\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.linaro.org/people/pawel.moll/linux into fixes ARM Versatile Express fixes for 3.15 This series contains straight-forward fixes for different Versatile Express infrastructure drivers: - NULL pointer dereference on the error path in the clk driver - out of boundary array access in the dcscb driver - broken restart/power off implementation - mis-interpreted voltage unit in the spc driver * tag 'vexpress/fixes-for-3.15' of git://git.linaro.org/people/pawel.moll/linux: ARM: vexpress/TC2: Convert OPP voltage to uV before storing power/reset: vexpress: Fix restart/power off operation arm/mach-vexpress: array accessed out of bounds clk: vexpress: NULL dereference on error path Includes an update to 3.15-rc2 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| | * | | | | ARM: vexpress/TC2: Convert OPP voltage to uV before storingPunit Agrawal2014-04-241-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The SPC stores voltage in mV while the code assumes it was returning uV. Convert the returned voltage to uV before storing. Also fix the comment depicting voltage to uV. Signed-off-by: Punit Agrawal <punit.agrawal@arm.com> Reviewed-by: Sudeep Holla <sudeep.holla@arm.com> Signed-off-by: Pawel Moll <pawel.moll@arm.com>
| | * | | | | arm/mach-vexpress: array accessed out of boundsHeinrich Schuchardt2014-04-241-2/+5
| | | |/ / / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | dcscb_allcpus_mask is an array of size 2. The index variable cluster has to be checked against this limit before accessing the array. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Acked-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Pawel Moll <pawel.moll@arm.com>
| * | | | | ARM: tegra: remove UART5/UARTE from tegra124.dtsiStephen Warren2014-04-241-13/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tegra124 only has 4 UARTs. Parts of the documentation hint at a fifth UART, but this appears to be left-over from earlier SoC documentation. Remove the non-existent DT node for UART5. Cc: <stable@vger.kernel.org> Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | | | | Merge tag 'omap-for-v3.15/fixes-v2-signed' of ↵Arnd Bergmann2014-04-2421-37/+65
| |\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes Fixes for omaps, mostly to fix some GPMC, DSS and USB issues for device tree based booting. And turns out BeagleBoard xM A/B needs it's own minimal dts in addition to the related u-boot changes. Also few minor documentation and typo fixes are merged to get them out of the way. * tag 'omap-for-v3.15/fixes-v2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: OMAP2+: Fix GPMC remap for devices using an offset ARM: OMAP2+: Fix oops for GPMC free ARM: dts: Add support for the BeagleBoard xM A/B ARM: dts: Grammar /that will/it will/ ARM: dts: Grammar /is uses/ is used/ ARM: OMAP2+: Fix config name for USB3 PHY ARM: dts: am335x: update USB DT references ARM: dts: OMAP2+: remove uses of obsolete gpmc,device-nand ARM: AM335X: EVM: fix pinmux documentation in devicetree ARM: OMAP2+: N900: remove omapdss init for DT boot ARM: dts: dra7xx-clocks: Correct mcasp2_ahclkx_mux bit-shift ARM: dts: omap5: Add clocks to USB3 PHY node ARM: OMAP2+: hwmod: fix missing braces in _init() ARM: AM43xx: fix dpll init in bypass mode ARM: OMAP3: hwmod data: Correct clock domains for USB modules ARM: OMAP3: PM: remove access to PRM_VOLTCTRL register Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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