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| | * | | | | | | | arm64: dts: h3ulcb: enable WDTVladimir Barinov2016-09-061-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This supports watchdog timer for H3ULCB board Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | | | | | | | arm64: dts: h3ulcb: enable EXTALR clkVladimir Barinov2016-09-061-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This enables EXTALR clock that can be used for the watchdog. Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | | | | | | | arm64: dts: h3ulcb: enable I2C2Vladimir Barinov2016-09-061-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This supports I2C2 bus on H3ULCB board Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | | | | | | | arm64: dts: h3ulcb: enable EthernetAVBVladimir Barinov2016-09-061-0/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This supports Ethernet AVB on H3ULCB board Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | | | | | | | arm64: dts: h3ulcb: enable SCIF clk and pinsVladimir Barinov2016-09-061-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This enables the external crystal for the SCIF_CLK and its pinctrl, to be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF. Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | | | | | | | arm64: dts: h3ulcb: initial device treeVladimir Barinov2016-09-062-1/+52
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the initial device tree for the R8A7795 SoC based H3ULCB low cost board. This commit supports the following peripherals: - SCIF (console) Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | | | | | | | arm64: dts: r8a7795: Add SoC-specific compatible property to audio-dmac nodesGeert Uytterhoeven2016-09-061-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The audio-dmac nodes used the generic compatible property only. Add the SoC-specific one, to make it future proof. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | | | | | | | arm64: dts: r8a7795: renesas: salvator-x: Enable DULaurent Pinchart2016-09-061-0/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Only the VGA output is supported for now. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | | | | | | | arm64: dts: renesas: r8a7795: Add DU device to DTLaurent Pinchart2016-09-061-0/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the DU device to r8a7795.dtsi in a disabled state. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | | | | | | | arm64: dts: renesas: r8a7795: Add VSP instancesLaurent Pinchart2016-09-061-0/+90
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The r8a7795 has 9 VSP instances. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | | | | | | | arm64: dts: renesas: r8a7795: Add FCPV nodesLaurent Pinchart2016-09-061-0/+63
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The FCPs handle the interface between various IP cores and memory. Add the instances related to the VSP2s. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | | | | | | | arm64: dts: r8a7795: salvator-x: enable HSUSBYoshihiro Shimoda2016-09-061-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | | | | | | | arm64: dts: r8a7795: salvator-x: enable USB 2.0 Host channel 0Yoshihiro Shimoda2016-09-061-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We have to set SW15 to pin 2-3 side on the board before we use CN9 as USB host or peripheral. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | | | | | | | arm64: dts: r8a7795: salvator-x: enable usb2_phy of channel 0Yoshihiro Shimoda2016-09-061-0/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch also adds a regulator node for USB2.0 to handle VBUS on/off by the phy-rcar-gen3-usb2 driver. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | | | | | | | arm64: dts: r8a7795: Add HSUSB device nodeYoshihiro Shimoda2016-09-061-0/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | | | | | | | arm64: dts: r8a7795: set maximum frequency for SDHI clocksWolfram Sang2016-09-061-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Define the upper limit otherwise the driver cannot utilize max speeds. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | | | | | | | arm64: dts: r8a7795: add FDP1 device nodesKieran Bingham2016-09-061-0/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Kieran Bingham <kieran@bingham.xyz> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | | | | | | | arm64: dts: r8a7795: add FCPF device nodesKieran Bingham2016-09-061-0/+21
| | | |_|_|_|_|/ / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Provide nodes for the FCP devices dedicated to the FDP device channels. Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Kieran Bingham <kieran@bingham.xyz> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * | | | | | | | Merge tag 'amlogic-dt64' of ↵Arnd Bergmann2016-09-144-1/+148
| |\ \ \ \ \ \ \ \ | | | |/ / / / / / | | |/| | | / / / | | |_|_|_|/ / / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/late Pull "Amlogic 64-bit DT changes for v4.9" from Kevin Hilman: - add watchdog, reset, IR remote, PWM - add secure monitor and eFuse - add always-on (AO) domain clock and reset * tag 'amlogic-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: ARM64: dts: amlogic: gxbb: Enable NVMEM documentation: Add nvmem bindings documentation ARM64: dts: amlogic: gxbb: Enable secure monitor documentation: Add secure monitor bindings documentation ARM64: dts: meson-gxbb: Add PWM pinctrl nodes ARM64: dts: meson-gxbb: Enable the the IR decoder on supported boards ARM64: dts: meson-gxbb: Add Infrared Remote Controller decoder dt-bindings: media: meson-ir: Add Meson8b and GXBB compatible strings ARM64: dts: amlogic: add the input pin for the IR remote ARM64: dts: meson-gxbb: Add GXBB AO Clock and Reset node clk: meson: Fix invalid use of sizeof in gxbb_aoclkc_probe() clk: meson: Add GXBB AO Clock and Reset controller driver dt-bindings: clock: reset: Add GXBB AO Clock and Reset Bindings ARM64: DTS: meson-gxbb: switch ethernet to real clock ARM64: dts: amlogic: meson-gxbb: Add watchdog node
| | * | | | | | ARM64: dts: amlogic: gxbb: Enable NVMEMCarlo Caione2016-09-011-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the NVMEM device node in the DTSI. Signed-off-by: Carlo Caione <carlo@endlessm.com> [khilman: dropped driver cleanup hunk] Signed-off-by: Kevin Hilman <khilman@baylibre.com>
| | * | | | | | ARM64: dts: amlogic: gxbb: Enable secure monitorCarlo Caione2016-09-011-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the secure monitor node in the Amlogic Meson GXBB DTSI file to enable it. Signed-off-by: Carlo Caione <carlo@endlessm.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
| | * | | | | | ARM64: dts: meson-gxbb: Add PWM pinctrl nodesKevin Hilman2016-09-011-0/+77
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add DT nodes for PWMs in EE and AO domains. Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
| | * | | | | | ARM64: dts: meson-gxbb: Enable the the IR decoder on supported boardsMartin Blumenstingl2016-09-013-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable the Infrared Remote Controller on boards which have an Infrared receiver. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Tested-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
| | * | | | | | ARM64: dts: meson-gxbb: Add Infrared Remote Controller decoderNeil Armstrong2016-09-011-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds the Infrared Remote Controller node so boards with an IR remote can simply enable it. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Tested-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
| | * | | | | | ARM64: dts: amlogic: add the input pin for the IR remoteKevin Hilman2016-09-011-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Tested-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
| | * | | | | | ARM64: dts: meson-gxbb: Add GXBB AO Clock and Reset nodeNeil Armstrong2016-09-011-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the AO clock controller node for the AmLogic GXBB SoC. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
| | * | | | | | ARM64: DTS: meson-gxbb: switch ethernet to real clockKevin Hilman2016-08-171-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With the clock driver upstream, switch to the real clock. Signed-off-by: Kevin Hilman <khilman@baylibre.com>
| | * | | | | | ARM64: dts: amlogic: meson-gxbb: Add watchdog nodeNeil Armstrong2016-08-151-0/+6
| | |/ / / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
* | | | | | | Merge tag 'armsoc-dt64' of ↵Linus Torvalds2016-10-0754-360/+4183
|\ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM 64-bit DT updates from Arnd Bergmann: "The 64-bit DT changes are surprisingly small this time, we only add two SoC platforms: the ZTE ZX296718 Set-top-box SoC and the SocioNext UniPhier LD11 TV SoC, each with their reference boards. There are three new machines added for existing SoC platforms: - The Marvell Armada 8040 development board is an impressive quad-core Cortex-A72 machine with three 10gbit ethernet interfaces - Qualcomms DragonBoard 820c single-board computer is their current high-end phone platform in the 96boards form factor - Rockchip: Tronsmart Orion r86 set-top-box is a popular mid-range Android box based on the 8-core rk3368 SoC" * tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (91 commits) arm64: dts: berlin4ct: Add L2 cache topology arm64: dts: berlin4ct: enable all wdt nodes unconditionally arm64: dts: berlin4ct: switch to Cortex-A53 specific pmu nodes arm64: dts: Add ZTE ZX296718 SoC dts and Makefile arm64: dts: apm: Add DT node for APM X-Gene 2 CPU clocks arm64: dts: apm: Add X-Gene SoC hwmon to device tree arm64: dts: apm: Fix interrupt polarity for X-Gene PCIe legacy interrupts arm64: dts: apm: Add APM X-Gene v2 SoC PMU DTS entries arm64: dts: apm: Add APM X-Gene SoC PMU DTS entries arm64: dts: marvell: enable MSI for PCIe on Armada 7K/8K arm64: dts: ls2080a: Add 'dma-coherent' for ls2080a PCI nodes arm64: dts: rockchip: add Type-C phy for RK3399 arm64: dts: rockchip: enable the gmac for rk3399 evb board arm64: dts: rockchip: add the gmac needed node for rk3399 arm64: dts: rockchip: support the pmu node for rk3399 arm64: dts: rockchip: change all interrupts cells to 4 on rk3399 SoCs arm64: dts: rockchip: add the tcpc for rk3399 power domain arm64: dts: rockchip: add efuse0 device node for rk3399 arm64: dts: rockchip: configure PCIe support for rk3399-evb arm64: dts: rockchip: add the PCIe controller support for RK3399 ...
| * \ \ \ \ \ \ Merge tag 'berlin64-dt-for-v4.9-1' of ↵Olof Johansson2016-10-021-3/+9
| |\ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.infradead.org/users/hesselba/linux-berlin into next/dt64 Berlin64 DT changes for v4.9 - enable dw wdt nodes unconditionally, driver supports multiple instances now - switch to Cortex-A53 pmu compatible - add L2 cache topology * tag 'berlin64-dt-for-v4.9-1' of git://git.infradead.org/users/hesselba/linux-berlin: arm64: dts: berlin4ct: Add L2 cache topology arm64: dts: berlin4ct: enable all wdt nodes unconditionally arm64: dts: berlin4ct: switch to Cortex-A53 specific pmu nodes Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | | | | | arm64: dts: berlin4ct: Add L2 cache topologyJisheng Zhang2016-09-281-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the L2 cache topology for berlin4ct which has 1MB L2 cache. [Sebastian: rename cache node from "l2-cache" to "cache"] Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
| | * | | | | | | arm64: dts: berlin4ct: enable all wdt nodes unconditionallyJisheng Zhang2016-09-281-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After commit f29a72c24ad4 ("watchdog: dw_wdt: Convert to use watchdog infrastructure"), the dw_wdt driver can support multiple variants, so unconditionally enable all dw_wdt nodes now. Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
| | * | | | | | | arm64: dts: berlin4ct: switch to Cortex-A53 specific pmu nodesJisheng Zhang2016-09-281-1/+1
| | | |/ / / / / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit ac82d1277215 ("arm64: perf: add Cortex-A53 support") adds the cortex A53 PMU support, thus instead of using the generic armv8-pmuv3 compatibility use the more specific Cortex A53 compatibility. Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
| * | | | | | | Merge tag 'zte-dt64-4.9' of ↵Arnd Bergmann2016-09-194-0/+362
| |\ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt64 Pull "ZTE arm64 device tree changes for 4.9" from Shawn Guo: - Add initial DTS support for ZTE ZX296718 SoC and ZX296718 EVB board. * tag 'zte-dt64-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: arm64: dts: Add ZTE ZX296718 SoC dts and Makefile
| | * | | | | | | arm64: dts: Add ZTE ZX296718 SoC dts and MakefileJun Nie2016-09-164-0/+362
| | |/ / / / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add device tree support for ZX296718 SoC and evaluation board based on it. Also document new values. Signed-off-by: Jun Nie <jun.nie@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| * | | | | | | Merge tag 'xgene-dts-for-v4.9' of https://github.com/AppliedMicro/xgene-next ↵Arnd Bergmann2016-09-192-28/+210
| |\ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into next/dt64 Pull "X-gene DTS changes queued for v4.9" from Duc Dang: This change set includes: + DTS entry to enable SoC PMU for X-Gene v1 SoC + DTS entry to enable SoC PMU for X-Gene v2 SoC + PCIe legacy interrupt polarity fix for X-Gene + X-Gene SoC hwmon DTS entry + DTS entries for X-Gene v2 CPU clock * tag 'xgene-dts-for-v4.9' of https://github.com/AppliedMicro/xgene-next: arm64: dts: apm: Add DT node for APM X-Gene 2 CPU clocks arm64: dts: apm: Add X-Gene SoC hwmon to device tree arm64: dts: apm: Fix interrupt polarity for X-Gene PCIe legacy interrupts arm64: dts: apm: Add APM X-Gene v2 SoC PMU DTS entries arm64: dts: apm: Add APM X-Gene SoC PMU DTS entries
| | * | | | | | | arm64: dts: apm: Add DT node for APM X-Gene 2 CPU clockshotran2016-09-151-0/+56
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add DT nodes to enable APM X-Gene 2 CPU clocks. [dhdang: changelog] Signed-off-by: Hoan Tran <hotran@apm.com> Signed-off-by: Duc Dang <dhdang@apm.com>
| | * | | | | | | arm64: dts: apm: Add X-Gene SoC hwmon to device treehotran2016-09-152-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds DT node to enable hwmon driver for APM X-Gene SoC. Signed-off-by: Hoan Tran <hotran@apm.com> Acked-by: Guenter Roeck <linux@roeck-us.net>
| | * | | | | | | arm64: dts: apm: Fix interrupt polarity for X-Gene PCIe legacy interruptsDuc Dang2016-09-152-28/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On X-Gene v1 and X-Gene v2, PCIe legacy interrupt should be configured as level-active high. Signed-off-by: Duc Dang <dhdang@apm.com>
| | * | | | | | | arm64: dts: apm: Add APM X-Gene v2 SoC PMU DTS entriesDuc Dang2016-09-151-0/+58
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds APM X-Gene v2 SoC PMU DTS entries. Signed-off-by: Duc Dang <dhdang@apm.com> Cc: Tai Nguyen <ttnguyen@apm.com>
| | * | | | | | | arm64: dts: apm: Add APM X-Gene SoC PMU DTS entriesTai Nguyen2016-09-151-0/+58
| | |/ / / / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds APM X-Gene SoC PMU DTS entries. Signed-off-by: Tai Nguyen <ttnguyen@apm.com>
| * | | | | | | Merge tag 'mvebu-dt64-4.9-2' of git://git.infradead.org/linux-mvebu into ↵Arnd Bergmann2016-09-192-0/+6
| |\ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | next/dt64 Pull "mvebu dt64 for 4.9 (part 2)" from Gregory CLEMENT: - enable MSI for PCIe on Armada 7K/8K * tag 'mvebu-dt64-4.9-2' of git://git.infradead.org/linux-mvebu: arm64: dts: marvell: enable MSI for PCIe on Armada 7K/8K
| | * | | | | | | arm64: dts: marvell: enable MSI for PCIe on Armada 7K/8KThomas Petazzoni2016-09-142-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit adds a reference to the appropriate MSI controller in the description of the PCIe controllers on Marvel Armada 7K and 8K platforms. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
| * | | | | | | | Merge branch 'dt/irq-fix' into next/dt64Arnd Bergmann2016-09-1411-44/+44
| |\ \ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * dt/irq-fix: arm64: dts: Fix broken architected timer interrupt trigger This resolves a non-obvious conflict between a bugfix from v4.8 and a cleanup for the exynos7 platform.
| * \ \ \ \ \ \ \ \ Merge tag 'zynqmp-dt-for-4.9' of https://github.com/Xilinx/linux-xlnx into ↵Arnd Bergmann2016-09-142-31/+71
| |\ \ \ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | next/dt64 Pull "arm64: Xilinx ZynqMP dt patches for v4.9" from Michal Simek: - Fix gic ranges property - Use 64bit size cells format - Add PCIe node - Correct pmu and watchdog nodes * tag 'zynqmp-dt-for-4.9' of https://github.com/Xilinx/linux-xlnx: ARM64: zynqmp: Correct the watchdog timer interrupt number ARM64: zynqmp: Add missing interrupt-parent to PMU node ARM64: zynqmp: Add PCIe node ARM64: zynqmp: Use 64bit size cell format ARM64: zynqmp: Align gic ranges for 64k in device tree
| | * | | | | | | | | ARM64: zynqmp: Correct the watchdog timer interrupt numberPunnaiah Choudary Kalluri2016-08-191-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Corrected the watchdog timer interrupt number. Origin value was for CSUPMU watchdog. Signed-off-by: Punnaiah Choudary Kalluri <punnaia@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| | * | | | | | | | | ARM64: zynqmp: Add missing interrupt-parent to PMU nodeMichal Simek2016-08-191-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ZynqMP is not using global interrupt-parent setting that's why it has to be listed in every node separately. PMU node missed it and this patch is adding it. Reported-by: John Linn <John.Linn@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| | * | | | | | | | | ARM64: zynqmp: Add PCIe nodeMichal Simek2016-08-191-0/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add PCIe node with prefetchable memory which goes beyond 4GB. Signed-off-by: Bharat Kumar Gogada <bharatku@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| | * | | | | | | | | ARM64: zynqmp: Use 64bit size cell formatMichal Simek2016-08-192-28/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use 64bit size cell format instead of 32bit for memory description. Change 64bit sizes also for all others IPs. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| | * | | | | | | | | ARM64: zynqmp: Align gic ranges for 64k in device treeAlexander Graf2016-08-191-2/+2
| | | |_|/ / / / / / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The GIC ranges in the zynqmp device tree are only 4kb aligned. Since commit 12e14066f we automatically deal with aliases GIC regions though, so we can map them transparently into guests even on 64kb page size systems. This patch makes use of that features and sets GICC and GICV to 64kb aligned and sized regions. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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