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Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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The GPIO block for ls2080a platform has little endian registers,
the GPIO driver needs this property to read/write registers by
right interface.
Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
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Add the "little-endian" property to fix the issue that eSDHC
is not working and dumping out "mmc0: Controller never released
inhibit bit(s)." error messages constantly.
Fixes: 5461597f6ce0 ("dts/ls2080a: Update DTSI to add support of various peripherals")
Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
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add xHCI and phy drivers for MT8173-EVB
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM DT updates from Olof Johansson:
"As usual, this is the massive branch we have for each release. Lots
of various updates and additions of hardware descriptions on existing
hardware, as well as the usual additions of new boards and SoCs.
This is also the first release where we've started mixing 64- and
32-bit DT updates in one branch.
(Specific details on what's actually here and new is pretty easy to
tell from the diffstat, so there's little point in duplicating listing
it here)"
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (499 commits)
ARM: dts: uniphier: add system-bus-controller nodes
ARM64: juno: disable NOR flash node by default
ARM: dts: uniphier: add outer cache controller nodes
arm64: defconfig: Enable PCI generic host bridge by default
arm64: Juno: Add support for the PCIe host bridge on Juno R1
Documentation: of: Document the bindings used by Juno R1 PCIe host bridge
ARM: dts: uniphier: add I2C aliases for ProXstream2 boards
dts/Makefile: Add build support for LS2080a QDS & RDB board DTS
dts/ls2080a: Add DTS support for LS2080a QDS & RDB boards
dts/ls2080a: Update Simulator DTS to add support of various peripherals
dts/ls2080a: Remove text about writing to Free Software Foundation
dts/ls2080a: Update DTSI to add support of various peripherals
doc: DTS: Update DWC3 binding to provide reference to generic bindings
doc/bindings: Update GPIO devicetree binding documentation for LS2080A
Documentation/dts: Move FSL board-specific bindings out of /powerpc
Documentation: DT: Add entry for FSL LS2080A QDS and RDB boards
arm64: Rename FSL LS2085A SoC support code to LS2080A
arm64: Use generic Layerscape SoC family naming
ARM: dts: uniphier: add ProXstream2 Vodka board support
ARM: dts: uniphier: add ProXstream2 Gentil board support
...
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Merging in the few patches I had kept separate from main next/dt, since others
got merged here directly.
* next/arm64:
arm64: defconfig: Enable PCI generic host bridge by default
arm64: Juno: Add support for the PCIe host bridge on Juno R1
Documentation: of: Document the bindings used by Juno R1 PCIe host bridge
arm64: dts: mt8173: Add clocks for SCPSYS unit
arm64: dts: mt8173: Add subsystem clock controller device nodes
+ Linux 4.3-rc5
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next/arm64
* 'for-upstream/juno-pcie' of git://linux-arm.org/linux-ld:
arm64: defconfig: Enable PCI generic host bridge by default
arm64: Juno: Add support for the PCIe host bridge on Juno R1
Documentation: of: Document the bindings used by Juno R1 PCIe host bridge
Signed-off-by: Olof Johansson <olof@lixom.net>
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Juno R1 board sports a functional PCIe host bridge that is
compliant with the SBSA standard found [1] here. With the right
firmware that initialises the XpressRICH3 controller one can
use the generic Host Bridge driver to use the PCIe hardware.
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
[1] http://infocenter.arm.com/help/topic/com.arm.doc.den0029a/
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git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/arm64
Samsung arm64 DT update for v4.4
- add BUS1 instance pinctrl support on exynos7 SoC
* tag 'samsung-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
arm64: dts: Add BUS1 instance pinctrl support for exynos7
Signed-off-by: Olof Johansson <olof@lixom.net>
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This adds BUS1 instance pinctrl for exynos7 soc.
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
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next/arm64
Correct i2c DTS node names in mt8173.dtsi.
Add spi DTS node to the mt8173 and mt8173-evb.
Add dts nodes for the subsystem clocks on mt8173.
This includes mmsys, imgsys, vdecsys, vencsys, vencltsys.
Add clock nodes to the scpsys binding, which are needed to
access the registers of venc and venc_lt power domains.
* tag 'v4.3-next-arm64' of https://github.com/mbgg/linux-mediatek:
arm64: dts: mt8173: Add clocks for SCPSYS unit
arm64: dts: mt8173: Add subsystem clock controller device nodes
arm64: dts: Add spi bus dts
arm64: mt8173.dtsi: correct i2c node names
Signed-off-by: Olof Johansson <olof@lixom.net>
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Add clocks needed by Mediatek VENC and VENC_LT power domianis.
These clocks were needed by accessing subsystem's registers,
so they need to be enabled before power on these subsystems.
Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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This patch adds device nodes providing subsystem clocks on MT8173,
includes mmsys, imgsys, vdecsys, vencsys and vencltsys.
Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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This patch adds MT8173 spi bus controllers into device tree.
Signed-off-by: Leilk Liu <leilk.liu@mediatek.com>
Reviewed-and-Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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Node name in device tree should describe general class of the
device. Correct incorrect i2c node names.
Signed-off-by: Yingjoe Chen <yingjoe.chen@mediatek.com>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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After discussing on the mailing list it turns out that
accessing the flash memory from the kernel can disrupt CPU
sleep states and CPU hotplugging, so let's disable this
DT node by default. Setups that want to access the flash
can modify this entry to enable the flash again.
Quoting Sudeep Holla: "the firmware assumes the flash is
always in read mode while Linux leaves NOR flash in
"read id" mode after initialization."
Reported-by: Sudeep Holla <sudeep.holla@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Sudeep Holla <sudeep.holla@arm.com>
Cc: Liviu Dudau <Liviu.Dudau@arm.com>
Cc: Lorenzo Pieralisi <Lorenzo.Pieralisi@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Leif Lindholm <leif.lindholm@arm.com>
Cc: Ryan Harkin <ryan.harkin@linaro.org>
Fixes: 5078f77e1443 "ARM64: juno: add NOR flash to device tree"
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
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This patch adds build support for LS2080a QDS & RDB board DTS files
in the arm64 DTS Makefile.
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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This patch adds the LS2080a DTS files for QDS and RDB boards
which support the LS2080a SoC.
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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This patch updates the LS2080a simulator DTS to add support of various
peripherals which are supported on the simulator platform and explicitly
disables those which are yet not supported on the platform.
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Checkpatch complains about the text suggesting writing to
Free Software Foundation for GPLv2 license copy.
This patch removes the same from the .dtsi and .dts
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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This patch updates the LS2080a DTSI (DTS Include) file to add
support for the following peripherals:
- USB 3.0 Host
- PMU
- CCN-504
- SATA
- SPI
- PCIe
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Signed-off-by: Jaiprakash Singh <b44839@freescale.com>
Signed-off-by: Alison Wang <alison.wang@freescale.com>
Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Freescale is renaming the LS2085A SoC to LS2080A. This patch
addresses the same.
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Freescale will be a spinning-out a set of ARMv8 based SoCs which
will be based on a similar overall SoC architecture. So, this patch
converts the existing infrastructure in the arm64/dts, arm64/Kconfig
and arm64/configs to use the generic convention ARCH_LAYERSCAPE
in place of the more specific FSL_LS2085A, to save code duplication
later-on.
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://codeaurora.org/quic/kernel/agross-msm into next/dt
Pull "Qualcomm ARM64 Updates for v4.4" from Andy Gross:
* Add RNG device tree node
* Add MSM8x16 serial UART1 node
* Enable eMMC on apq8016-sbc board
* Fix I2C pinconf sleep state function
* Add MSM8916 I2C nodes
* Enable I2C busses on LS and HS on APQ8016-sbc
* Enable SPI busses on LS and HS on APQ8016-sbc
* tag 'qcom-arm64-for-4.4' of git://codeaurora.org/quic/kernel/agross-msm:
arm64: dts: apq8016-sbc: enable spi buses on LS and HS
arm64: dts: apq8016-sbc: enable i2c buses on LS and HS
arm64: dts: qcom: Add msm8916 I2C nodes.
arm64: dts: fix i2c pinconf sleep state function
arm64: dts: qcom: Enable eMMC on apq8016-sbc board
arm64: dts: qcom: Add 8x16 Serial UART1 node
arm64: dts: qcom: Add RNG device tree node
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This patch enables spi buses on low speed and high speed expansion
connectors on DB410C
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
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This patch enables i2c buses on low speed and high speed expansion
connectors on DB410C.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
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This patch adds missing support for i2c0 and i2c6, this support is
required to connect the i2c slaves on LS expansion on DB410c.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
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This patch fixes the i2c pinctrl sleep state by changing the pinconf
function to be in gpio mode rather than i2c.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
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Enable the eMMC on the APQ8016 SBC board (also known as DragonBoard 410c),
so that we can use its internal storage.
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
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This patch adds the nodes required to support the UART1 node on the
MSM8916 and also fixes the sleep pins function for UART2.
Signed-off-by: Andy Gross <agross@codeaurora.org>
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Adds rng device tree node for msm8916 SoCs.
Signed-off-by: Stanimir Varbanov <stanimir.varbanov@linaro.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into next/dt
Merge "SCPI support on ARM64 Juno Development Platform" from Sudeep Holla:
1. SRAM, MHU mailbox and SCPI support
2. CPU topology using cpu-map
3. Clock support for all the cpus
4. Support for SoC sensors
* tag 'juno-scpi-for-v4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
arm64: dts: Add sensor node to Juno dt
arm64: dts: add clock support for all the cpus
arm64: dts: add CPU topology on Juno
arm64: dts: add SRAM, MHU mailbox and SCPI support on Juno
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The SCP firmware on Juno provides access to SoC sensors via the
SCPI. Add the sensor nodes to the device tree to enable this support.
Signed-off-by: Punit Agrawal <punit.agrawal@arm.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Acked-by: Sudeep Holla <sudeep.holla@arm.com>
Acked-by: Liviu Dudau <liviu.dudau@arm.com>
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This patch adds the CPU clocks so that the CPU DVFS can be enabled.
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Acked-by: Liviu Dudau <Liviu.Dudau@arm.com>
Cc: Jon Medhurst (Tixy) <tixy@linaro.org>
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This patch adds CPU topology on Juno. It will be useful for ther other
IP blocks depending on this topology.
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Acked-by: Liviu Dudau <Liviu.Dudau@arm.com>
Cc: Jon Medhurst (Tixy) <tixy@linaro.org>
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This patch adds support for the MHU mailbox peripheral used on Juno by
application processors to communicate with remote SCP handling most of
the CPU/system power management. It also adds the SRAM reserving the
shared memory and SCPI message protocol using that shared memory.
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Acked-by: Liviu Dudau <Liviu.Dudau@arm.com>
Cc: Jon Medhurst (Tixy) <tixy@linaro.org>
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into next/dt
Pull "Qualcomm ARM Based Device Tree Updates for v4.4" from Andy Gross:
* Add DT binding document for SMEM
* Add SMD, RPM, and Regulator nodes on MSM8974
* Remove extra reg element from iadc device
* Remove redunandant i2c pinctrl properties on APQ8064
* Remove unnecessary eeprom label on IFC6410
* Remove unnecessary eeprom label from QS600
* Add PM8921 RTC support on APQ8064
* Add PM8921 pwrkey support on APQ8064
* Prefix GSBI6 uart pins on APQ8064 correctly
* Add missing GSBI7 uart pinctrl on APQ8064
* Add missing GSBI7 uart pinctrl on IFC6410
* Add missing GSBI7 pinctrl uart property on QS600
* Add pwrseq support for WLAN on IFC6410
* Add pwrseq support for WLAN on QS600
* Add notify led support on IFC6410
* Add SD card detect support onQS600
* Add #power-domain-cells property to documentation
* Add Qualcomm SMBB binding document
* Add PM8941 charge node
* Fix typo in disabled property on MSM8974
* tag 'qcom-dt-for-4.4' of git://codeaurora.org/quic/kernel/agross-msm:
ARM: dts: msm8974: fix typo in "disabled" property
ARM: dts: qcom-pm8941: Add charger node
dt-binding: power: Add Qualcomm SMBB binding
arm: dts: qcom: Add #power-domain-cells property
ARM: dts: qs600: Add SD card detect support.
ARM: dts: apq8064-ifc6410: add notify led support.
ARM: dts: qs600: add pwrseq support to WLAN
ARM: dts: ifc6410: Add pwrseq support for WLAN
ARM: dts: qs600: Add missing pinctrl property for gsbi7 uart
ARM: dts: ifc6410: Add missing pinctrl to gsbi7 uart
ARM: dts: apq8064: add missing gsbi7 uart pinctrl
ARM: dts: apq8064: Prefix the gsbi6 uart pins correctly
ARM: dts: apq8064: add pm8921 pwrkey support
ARM: dts: apq8064: add pm8921 rtc
ARM: dts: qs600: remove unnecessary eeprom label
ARM: dts: ifc6410: remove unnecessary eeprom label
ARM: dts: apq8064: remove redundant i2c pinctrl properties
ARM: dts: qcom: Remove extra reg element from iadc device
ARM: dts: msm8974: Add smd, rpm and regulator nodes
soc: qcom: Add device tree binding for SMEM
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clock controller nodes which also support power domains (gdscs') need
to have a #power-domain-cells property. Add these for gcc and mmcc
nodes of msm8974, gcc of apq8084 and msm8916.
Also update gcc and mmcc bindings for it.
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
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The Juno motherboard has a NOR flash on the motherboard, enable
this to be accessed with the CFI flash driver. Results after
enabling MTD, MTD_CFI, MTD_PHYSMAP, MTD_PHYSMAP_OF,
MTD_CFI_INTELEXT:
8000000.flash: Found 2 x16 devices at 0x0 in 32-bit bank.
Manufacturer ID 0x000089 Chip ID 0x008919
Intel/Sharp Extended Query Table at 0x010A
Intel/Sharp Extended Query Table at 0x010A
Intel/Sharp Extended Query Table at 0x010A
Intel/Sharp Extended Query Table at 0x010A
Intel/Sharp Extended Query Table at 0x010A
Using buffer write method
Using auto-unlock on power-up/resume
cfi_cmdset_0001: Erase suspend on write enabled
erase region 0: offset=0x0,size=0x40000,blocks=255
erase region 1: offset=0x3fc0000,size=0x10000,blocks=4
Cc: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Liviu Dudau <Liviu.Dudau@arm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Commit 9ccd608070b6 "arm64: dts: add device tree for ARM SMM-A53x2 on
LogicTile Express 20MG" added a new dts file to arch/arm64 which
included "../../../../arm/boot/dts/vexpress-v2m-rs1.dtsi", i.e. a
.dtsi supplied by arch/arm.
Unfortunately this causes some issues for the split device tree
repository[0], since things get moved around there. In that context
the new .dts ends up at src/arm64/arm/vexpress-v2f-1xv7-ca53x2.dts
while the include is at src/arm/vexpress-v2m-rs1.dtsi.
The sharing of the .dtsi is legitimate since the baseboard is the same
for various vexpress systems whatever processor they use.
Previously I attempted to resolve this by creating a shared location
for such things but we have been unable to come to a consensus on
where that should be.
Instead this patch simply replaces the use of ../../ in the dts
/include/ with a symlink in arch/arm64/boot/dts/arm pointing to the
file arch/arm/boot/dts.
Since the split device tree repo will shortly be required to flatten
symlinks for other reasons this will cause the dtsi file to appear in
both src/arm and src/arm64 in the split repo, which is an improvement
on not building for arm64 now.
[0] https://git.kernel.org/cgit/linux/kernel/git/devicetree/devicetree-rebasing.git/
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Liviu Dudau <liviu.dudau@arm.com>
Cc: Sudeep Holla <sudeep.holla@arm.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Kristina Martsenko <kristina.martsenko@arm.com>
Cc: Kevin Hilman <khilman@linaro.org>
Cc: Frank Rowand <frank.rowand@sonymobile.com>
Cc: Olof Johansson <olof@lixom.net>
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: arm@kernel.org
Cc: linux-kbuild@vger.kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.infradead.org/users/hesselba/linux-berlin into next/dt
Merge "Marvell Berlin ARM64 DT for 4.4 take 1" from Sebastian Hesselbarth:
- add BG4CT GPIO nodes
- add BG4CT STB reference board
* tag 'berlin64-dt-for-4.4-1' of git://git.infradead.org/users/hesselba/linux-berlin:
arm64: dts: add dts file for Marvell Berlin4CT STB board
arm64: dts: berlin4ct: add GPIO nodes
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This patch adds dts for the Berlin4CT STB reference board which is also
based on the Berlin4CT SoC. The Berlin4CT DMP board will be deprecated as
time goes.
Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
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Marvell berlin4ct SoC has 6 GPIO ports powered by snps,dw-apb-gpio. This
patch adds the corresponding device tree nodes.
Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
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This patch adds all UART nodes for the Hi6220 SoC. Recently a board[1] has
been developed to standardize UART access across all the 96boards consumer
edition boards. To use this hardware on HiKey we must configure and enable
UART3. However, to ensure backward compatibility we must keep UART0 enabled
as well.
I have removed the hard coded clock index values in favor of using the ones
already defined in include/dt-bindings/clock/hi6220-clock.h.
Since UART0 needs to be soldered, it has been suggested to use the UART3 as
the default console.
This patch was boot tested on top of next-20150930, with both UART
configurations.
[1] http://www.seeedstudio.com/depot/96Boards-UART-p-2525.html?ref=newInBazaar
Signed-off-by: Tyler Baker <tyler.baker@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into next/dt
Merge "SoCFPGA DTS updates for v4.4" from Dinh Nguyen:
- Add base arm64 dts for Statrix 10
- Peripheral updates for Arria10(USB,I2C,UART)
* tag 'socfpga_dts_for_v4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
arm64: dts: Add base stratix 10 dtsi
ARM: socfpga: dts: enable USB and I2C on Arria10 SoCDK
ARM: socfpga: dts: add clock fields for I2C, UART and USB on Arria10
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Add the base DTS for Altera's SoCFPGA Stratix 10 platform.
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
---
v4: Add a non-zero ranges property for /soc node
v3: change #address-cells and #size-cells to <2>
change the GIC address to 0xfffc1000
update the GIC virtual CPU reg length to 0x2000
v2: use interrupt-affinity for pmu node
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https://github.com/AppliedMicro/xgene-next into next/dt
Merge "X-Gene DTS changes queued for v4.4" from Duc Dang:
* tag 'xgene-dts-for-v4.4-1' of https://github.com/AppliedMicro/xgene-next:
arm64: dts: Add poweroff device nodes for APM X-Gene 2 platform
arm64: dts: Add APM X-Gene 2 standby GPIO controller DTS entries
arm64: dts: Add PMU node for APM X-Gene Storm SOC
Documentation: arm: pmu: Add Potenza PMU binding
arm64: dts: Add X-Gene v2 reboot driver dts node
arm64: dts: add APM Merlin Board device tree
power: reset: Add syscon poweroff device node for APM X-Gene platform
arm64: dts: Add X-Gene reboot driver dts node
Documentation: arm64: add SCU dts binding documentation to linux kernel
MAINTAINERS: Add Applied Micro (APM) X-Gene Device Tree maintainer
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This patch adds:
+ poweroff button device node to support poweroff by
power button on APM X-Gene 2 Merlin platform.
+ syscon poweroff device node to support poweroff feature
on APM X-Gene 2 Merlin platform
Signed-off-by: Duc Dang <dhdang@apm.com>
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Add standby domain gpio controller for APM X-Gene 2 SoC platforms.
Signed-off-by: Duc Dang <dhdang@apm.com>
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This patch adds the PMU device tree node for APM X-Gene Storm SOC.
Signed-off-by: Vinayak Kale <vkale@apm.com>
Signed-off-by: Feng Kan <fkan@apm.com>
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