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* arm64: dts: marvell: armada-37xx: mark the gpio controllers as irq controllerUwe Kleine-König2018-05-181-0/+6
| | | | | | | | | | | This allows to reference these gpio controller as interrupt parent. Also add a comment which cpu line names are managed by the controllers because "nb" and "sb" usually doesn't appear in schematics, but MPPX_Y do. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
* arm64: dts: marvell: use SPDX-License-Identifier for Armada SoCsGregory CLEMENT2018-02-141-37/+1
| | | | | | | | | | | | | | Follow the recent trend for the license description, and also fix the wrongly stated X11 to MIT. As already pointed on the DT ML, the X11 license text [1] is explicitly for the X Consortium and has a couple of extra clauses. The MIT license text [2] is actually what the current DT files claim. [1] https://spdx.org/licenses/X11.html [2] https://spdx.org/licenses/MIT.html Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
* arm64: dts: marvell: armada-37xx: add a crypto nodeAntoine Tenart2018-01-051-0/+14
| | | | | | | | This patch adds a crypto node describing the EIP97 engine found in Armada 37xx SoCs. The cryptographic engine is enabled by default. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
* arm64: dts: marvell: armada-37xx: add nodes allowing cpufreq supportGregory CLEMENT2017-12-181-0/+7
| | | | | | | In order to be able to use cpu freq, we need to associate a clock to each CPU and to expose the power management registers. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
* arm64: dts: marvell: armada-37xx: add second UART portMiquel Raynal2017-10-301-1/+17
| | | | | | | | | | | | | | | | Add a node in Armada 37xx DTSI file for the second UART, with a different compatible due to its extended IP which has some differences with the first UART already in place. Make use of this commit to also fully describe the first port and use the same clear and named interrupt bindings for both ports. The standard UART (UART0) uses level-interrupts while the extended UART (UART1) uses edge-triggered interrupts. Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
* arm64: dts: marvell: armada-37xx: add UART clockMiquel Raynal2017-10-301-0/+1
| | | | | | | | | | | Add the missing clock property to armada-3700 UART node. This clock will be used to derive the prescaler value to comply with the requested baudrate. Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
* arm64: dts: marvell: 37xx: remove empty lineAntoine Tenart2017-09-201-1/+0
| | | | | | | Cosmetic patch removing an empty line at the end of the NB pinctrl node. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
* arm64: dts: marvell: Fix A37xx UART0 register sizeallen yan2017-09-191-1/+1
| | | | | | | | | | | Armada-37xx UART0 registers are 0x200 bytes wide. Right next to them are the UART1 registers that should not be declared in this node. Update the example in DT bindings document accordingly. Signed-off-by: allen yan <yanwei@marvell.com> Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
* ARM64: dts: marvell: armada-37xx: Wire PMUv3Marc Zyngier2017-08-021-0/+5
| | | | | | | | | | | The Cortex-A53s that power the Armada-37xx SoCs are equipped with a PMUv3, just like most ARMv8 cores. Advertise the PMUv3 presence in the device tree, and wire its interrupt. This allows the perf subsystem to work correctly. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
* ARM64: dts: marvell: armada-37xx: Enable memory-mapped GIC CPU interfaceMarc Zyngier2017-08-021-1/+4
| | | | | | | | | | | | | The Cortex-A53s that power the Armada-37xx SoCs are equipped with a GIC CPU interface that gets enabled when coupled with a GICv3 interrupt controller, such as the GIC-500 on the this SoC. Advertise the MMIO ranges provided by the CPUs, which enables (among other things) GICv2 guests to run under a hypervisor such as KVM. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
* ARM64: dts: marvell: armada-37xx: Fix GIC maintenance interruptMarc Zyngier2017-08-021-0/+1
| | | | | | | | | | | | | | | The GIC-500 integrated in the Armada-37xx SoCs is compliant with the GICv3 architecture, and thus provides a maintenance interrupt that is required for hypervisors to function correctly. With the interrupt provided in the DT, KVM now works as it should. Tested on an Espressobin system. Fixes: adbc3695d9e4 ("arm64: dts: add the Marvell Armada 3700 family and a development board") Cc: <stable@vger.kernel.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
* ARM64: dts: marvell: armada-37xx: Fix the number of GPIO on south bridgeGregory CLEMENT2017-08-021-1/+1
| | | | | | | | | | | The number of pins in South Bridge is 30 and not 29. There is a fix for the driver for the pinctrl, but a fix is also need at device tree level for the GPIO. Fixes: afda007feda5 ("ARM64: dts: marvell: Add pinctrl nodes for Armada 3700") Cc: <stable@vger.kernel.org> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
* ARM64: dts: marvell: armada37xx: Fix timer interrupt specifiersMarc Zyngier2017-07-031-8/+4
| | | | | | | | | | | | | Contrary to popular belief, PPIs connected to a GICv3 to not have an affinity field similar to that of GICv2. That is consistent with the fact that GICv3 is designed to accomodate thousands of CPUs, and fitting them as a bitmap in a byte is... difficult. Fixes: adbc3695d9e4 ("arm64: dts: add the Marvell Armada 3700 family and a development board") Cc: <stable@vger.kernel.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
* arm64: dts: marvell: Enable second SDHCI controller in Armada 37xxKonstantin Porotchkin2017-06-171-0/+11
| | | | | | | | | | | | | | | | | | | The Armada 37xx SoCs has 2 SDHCI interfaces. This patch adds the second one. Moreover, the Armada 37xx DB v2 board populates the 2 SDHCI interfaces. The second interface is using pluggable module that can either have an SD connector or eMMC on it. This patch adds support for SD module in the device DT. [ gregory.clement@free-electrons.com: - Add more detail in commit log - Sort the dt node in address order - Document the SD slot in the dts ] Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
* arm64: dts: marvell: armada-37xx: Use angle bracket for each register setGregory CLEMENT2017-06-171-4/+4
| | | | | | | When several groups of register address and size are used with reg, then surround each one by angle bracket. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
* arm64: dts: marvell: armada-37xx: Align the compatible stringGregory CLEMENT2017-06-171-3/+3
| | | | | | | This cosmetic patch aligns the compatible string when there are on several lines. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
* Merge tag 'mvebu-dt64-4.12-3' of git://git.infradead.org/linux-mvebu into fixesArnd Bergmann2017-05-101-3/+70
|\ | | | | | | | | | | | | | | | | | | Pull "mvebu dt64 for 4.12 (part 3)" from Gregory CLEMENT: pinctrl and GPIO description for Armada 37xx SoCs * tag 'mvebu-dt64-4.12-3' of git://git.infradead.org/linux-mvebu: ARM64: dts: marvell: armada37xx: add pinctrl definition ARM64: dts: marvell: Add pinctrl nodes for Armada 3700
| * ARM64: dts: marvell: armada37xx: add pinctrl definitionGregory CLEMENT2017-04-281-0/+31
| | | | | | | | | | | | | | Start to populate the device tree of the Armada 37xx with the pincontrol configuration used on the board providing a dts. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
| * ARM64: dts: marvell: Add pinctrl nodes for Armada 3700Gregory CLEMENT2017-04-281-3/+39
| | | | | | | | | | | | | | | | | | | | Add the nodes for the two pin controller present in the Armada 37xx SoCs. Initially the node was named gpio1 using the same name that for the register range in the datasheet. However renaming it pinctr_nb (nb for North Bridge) makes more sens. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
* | Merge tag 'armsoc-dt64' of ↵Linus Torvalds2017-05-091-1/+17
|\ \ | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM 64-bit DT updates from Olof Johansson: "Device-tree updates for arm64 platforms. Just as with 32-bit, a bunch of smaller changes, but also some new platforms that are worth mentioning: - Rockchip RK3399 platforms for Chromebooks, including Samsung Chromebook Plus (Kevin) - Orange Pi PC2 (Allwinner H5) - Freescale LS2088A and LS1088A SoCs - Expanded support for Nvidia Tegra186 (and Jetson TX2)" * tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (180 commits) arm64: dts: Add basic DT to support Spreadtrum's SP9860G arm64: dts: exynos: Use - instead of @ for DT OPP entries arm64: dts: exynos: Add support for s6e3hf2 panel device on TM2e board arm64: dts: juno: add information about L1 and L2 caches arm64: dts: juno: fix few unit address format warnings arm64: marvell: dts: enable the crypto engine on the Armada 8040 DB arm64: marvell: dts: enable the crypto engine on the Armada 7040 DB arm64: marvell: dts: add crypto engine description for 7k/8k arm64: dts: marvell: add sdhci support for Armada 7K/8K arm64: dts: marvell: add eMMC support for Armada 37xx arm64: dts: hisi: add pinctrl dtsi file for HiKey960 development board arm64: dts: hisi: add drive strength levels of the pins for Hi3660 SoC arm64: dts: hisi: enable the NIC and SAS for the hip07-d05 board arm64: dts: hisi: add SAS nodes for the hip07 SoC arm64: dts: hisi: add RoCE nodes for the hip07 SoC arm64: dts: hisi: add network related nodes for the hip07 SoC arm64: dts: hisi: add mbigen nodes for the hip07 SoC arm64: dts: rockchip: fix the memory size of PX5 Evaluation board arm64: dts: hisilicon: add dts files for hi3798cv200-poplar board dt-bindings: arm: hisilicon: add bindings for hi3798cv200 SoC and Poplar board ...
| * arm64: dts: marvell: add eMMC support for Armada 37xxGregory CLEMENT2017-04-111-0/+11
| | | | | | | | | | | | | | Add the eMMC support for Armada 37xx SoC and enable it in the Armada 3720 DB board. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
| * ARM64: dts: marvell: armada-37xx: Add clock resource for USB3Gregory CLEMENT2017-03-231-0/+1
| | | | | | | | | | | | Now that clocks are available provide a clock resource for xhci node. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
| * ARM64: dts: marvell: armada-37xx: Fix interrupt mapping for USB3Gregory CLEMENT2017-03-231-1/+1
| | | | | | | | | | | | IRQ number for xhci controller was wrong, fix it. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
| * ARM64: dts: marvell: armada37xx: add address and size property for i2c cellsGregory CLEMENT2017-03-081-0/+4
| | | | | | | | | | | | | | These property were missing when the nodes were added and their lack generate warning messages when adding i2c device in the subnodes. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
* | ARM64: dts: marvell: armada-37xx: Add USB2 nodeGregory CLEMENT2017-03-171-0/+7
|/ | | | | | | | | Armada 37xx SoC embedded an EHCI controller. This patch adds the device tree node enabling its support. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* ARM64: dts: marvell: Correct license textAlexandre Belloni2017-01-031-5/+5
| | | | | | | | | The license text has been mangled at some point then copy pasted across multiple files. Restore it to what it should be. Note that this is not intended as a license change. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
* arm64: dts: marvell: Add I2C definitions for the Armada 3700Romain Perier2017-01-031-0/+18
| | | | | | | | | | The Armada 3700 has two i2c bus interface units, this commit adds the definitions of the corresponding device nodes. It also enables the node on the development board for this SoC. Signed-off-by: Romain Perier <romain.perier@free-electrons.com> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
* arm64: dts: marvell: Add definition of SPI controller for Armada 3700Romain Perier2017-01-031-0/+11
| | | | | | | | | Armada 3700 SoC has an SPI Controller, this commit adds the definition of the SPI device node at the SoC level. Signed-off-by: Romain Perier <romain.perier@free-electrons.com> Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
* Merge tag 'armsoc-dt64' of ↵Linus Torvalds2016-12-151-1/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM 64-bit DT updates from Arnd Bergmann: "A couple of interesting new SoC platforms are now supported, these are the respective DTS sources: - Samsung Exynos5433 mobile phone platform, including an (almost) fully supported phone reference board. - Hisilicon Hip07 server platform and D05 board, the latest iteration of their product line, now with 64 Cortex-A72 cores across two sockets. - Allwinner A64 SoC, the first 64-bit chip from their "sunxi" product line, used in Android tablets and ultra-cheap development boards - NXP LS1046A Communication processor, improving on the earlier LS1043A with faster CPU cores - Qualcomm MSM8992 (Snapdragon 808) and MSM8994 (Snapdragon 810) mobile phone SoCs - Early support for the Nvidia Tegra Tegra186 SoC - Amlogic S905D is a minor variant of their existing Android consumer product line - Rockchip PX5 automotive platform, a close relative of their popular rk3368 Android tablet chips Aside from the respective evaluation platforms for the above chips, there are only a few consumer devices and boards added this time: - Huawei Nexus 6P (Angler) mobile phone - LG Nexus 5x (Bullhead) mobile phone - Nexbox A1 and A95X Android TV boxes - Pine64 development board based on Allwinner A64 - Globalscale Marvell ESPRESSOBin community board based on Armada 3700 - Renesas "R-Car Starter Kit Pro" (M3ULCB) low-cost automotive board For the existing platforms, we get bug fixes and new peripheral support for Juno, Renesas, Uniphier, Amlogic, Samsung, Broadcom, Rockchip, Berlin, and ZTE" * tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (168 commits) arm64: dts: fix build errors from missing dependencies ARM64: dts: meson-gxbb: add SCPI pre-1.0 compatible ARM64: dts: meson-gxl: Add support for Nexbox A95X ARM64: dts: meson-gxm: Add support for the Nexbox A1 ARM: dts: artpec: add pcie support arm64: dts: berlin4ct-dmp: add missing unit name to /memory node arm64: dts: berlin4ct-stb: add missing unit name to /memory node arm64: dts: berlin4ct: add missing unit name to /soc node arm64: dts: qcom: msm8916: Add ddr support to sdhc1 arm64: dts: exynos: Enable HS400 mode for eMMC for TM2 ARM: dts: Add xo to sdhc clock node on qcom platforms ARM64: dts: Add support for Meson GXM dt-bindings: add rockchip RK1108 Evaluation board arm64: dts: NS2: Add PCI PHYs arm64: dts: NS2: enable sdio1 arm64: dts: exynos: Add the mshc_2 node for supporting T-Flash arm64: tegra: Add NVIDIA P2771 board support arm64: tegra: Enable PSCI on P3310 arm64: tegra: Add NVIDIA P3310 processor module support arm64: tegra: Add GPIO controllers on Tegra186 ...
| * arm64: dts: marvell: Fixup internal-regs DT warning for Armada 37xxGregory CLEMENT2016-11-191-1/+1
| | | | | | | | | | | | | | internal-regs has a ranges property so the unit name should contain an address. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
* | ARM64: dts: marvell: Add network support for Armada 3700Gregory CLEMENT2016-12-021-0/+23
| | | | | | | | | | | | | | | | Add neta nodes for network support both in device tree for the SoC and the board. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | arm64: dts: marvell: Fix typo in label name on Armada 37xxGregory CLEMENT2016-11-091-2/+2
|/ | | | | | | | The label names of the peripheral clocks have a typo. Fix it before it is more widely used. Reported-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
* Merge tag 'pci-v4.8-changes' of ↵Linus Torvalds2016-08-021-0/+25
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci Pull PCI updates from Bjorn Helgaas: "Highlights: - ARM64 support for ACPI host bridges - new drivers for Axis ARTPEC-6 and Marvell Aardvark - new pci_alloc_irq_vectors() interface for MSI-X, MSI, legacy INTx - pci_resource_to_user() cleanup (more to come) Detailed summary: Enumeration: - Move ecam.h to linux/include/pci-ecam.h (Jayachandran C) - Add parent device field to ECAM struct pci_config_window (Jayachandran C) - Add generic MCFG table handling (Tomasz Nowicki) - Refactor pci_bus_assign_domain_nr() for CONFIG_PCI_DOMAINS_GENERIC (Tomasz Nowicki) - Factor DT-specific pci_bus_find_domain_nr() code out (Tomasz Nowicki) Resource management: - Add devm_request_pci_bus_resources() (Bjorn Helgaas) - Unify pci_resource_to_user() declarations (Bjorn Helgaas) - Implement pci_resource_to_user() with pcibios_resource_to_bus() (microblaze, powerpc, sparc) (Bjorn Helgaas) - Request host bridge window resources (designware, iproc, rcar, xgene, xilinx, xilinx-nwl) (Bjorn Helgaas) - Make PCI I/O space optional on ARM32 (Bjorn Helgaas) - Ignore write combining when mapping I/O port space (Bjorn Helgaas) - Claim bus resources on MIPS PCI_PROBE_ONLY set-ups (Bjorn Helgaas) - Remove unicore32 pci=firmware command line parameter handling (Bjorn Helgaas) - Support I/O resources when parsing host bridge resources (Jayachandran C) - Add helpers to request/release memory and I/O regions (Johannes Thumshirn) - Use pci_(request|release)_mem_regions (NVMe, lpfc, GenWQE, ethernet/intel, alx) (Johannes Thumshirn) - Extend pci=resource_alignment to specify device/vendor IDs (Koehrer Mathias (ETAS/ESW5)) - Add generic pci_bus_claim_resources() (Lorenzo Pieralisi) - Claim bus resources on ARM32 PCI_PROBE_ONLY set-ups (Lorenzo Pieralisi) - Remove ARM32 and ARM64 arch-specific pcibios_enable_device() (Lorenzo Pieralisi) - Add pci_unmap_iospace() to unmap I/O resources (Sinan Kaya) - Remove powerpc __pci_mmap_set_pgprot() (Yinghai Lu) PCI device hotplug: - Allow additional bus numbers for hotplug bridges (Keith Busch) - Ignore interrupts during D3cold (Lukas Wunner) Power management: - Enforce type casting for pci_power_t (Andy Shevchenko) - Don't clear d3cold_allowed for PCIe ports (Mika Westerberg) - Put PCIe ports into D3 during suspend (Mika Westerberg) - Power on bridges before scanning new devices (Mika Westerberg) - Runtime resume bridge before rescan (Mika Westerberg) - Add runtime PM support for PCIe ports (Mika Westerberg) - Remove redundant check of pcie_set_clkpm (Shawn Lin) Virtualization: - Add function 1 DMA alias quirk for Marvell 88SE9182 (Aaron Sierra) - Add DMA alias quirk for Adaptec 3805 (Alex Williamson) - Mark Atheros AR9485 and QCA9882 to avoid bus reset (Chris Blake) - Add ACS quirk for Solarflare SFC9220 (Edward Cree) MSI: - Fix PCI_MSI dependencies (Arnd Bergmann) - Add pci_msix_desc_addr() helper (Christoph Hellwig) - Switch msix_program_entries() to use pci_msix_desc_addr() (Christoph Hellwig) - Make the "entries" argument to pci_enable_msix() optional (Christoph Hellwig) - Provide sensible IRQ vector alloc/free routines (Christoph Hellwig) - Spread interrupt vectors in pci_alloc_irq_vectors() (Christoph Hellwig) Error Handling: - Bind DPC to Root Ports as well as Downstream Ports (Keith Busch) - Remove DPC tristate module option (Keith Busch) - Convert Downstream Port Containment driver to use devm_* functions (Mika Westerberg) Generic host bridge driver: - Select IRQ_DOMAIN (Arnd Bergmann) - Claim bus resources on PCI_PROBE_ONLY set-ups (Lorenzo Pieralisi) ACPI host bridge driver: - Add ARM64 acpi_pci_bus_find_domain_nr() (Tomasz Nowicki) - Add ARM64 ACPI support for legacy IRQs parsing and consolidation with DT code (Tomasz Nowicki) - Implement ARM64 AML accessors for PCI_Config region (Tomasz Nowicki) - Support ARM64 ACPI-based PCI host controller (Tomasz Nowicki) Altera host bridge driver: - Check link status before retrain link (Ley Foon Tan) - Poll for link up status after retraining the link (Ley Foon Tan) Axis ARTPEC-6 host bridge driver: - Add PCI_MSI_IRQ_DOMAIN dependency (Arnd Bergmann) - Add DT binding for Axis ARTPEC-6 PCIe controller (Niklas Cassel) - Add Axis ARTPEC-6 PCIe controller driver (Niklas Cassel) Intel VMD host bridge driver: - Use lock save/restore in interrupt enable path (Jon Derrick) - Select device dma ops to override (Keith Busch) - Initialize list item in IRQ disable (Keith Busch) - Use x86_vector_domain as parent domain (Keith Busch) - Separate MSI and MSI-X vector sharing (Keith Busch) Marvell Aardvark host bridge driver: - Add DT binding for the Aardvark PCIe controller (Thomas Petazzoni) - Add Aardvark PCI host controller driver (Thomas Petazzoni) - Add Aardvark PCIe support for Armada 3700 (Thomas Petazzoni) Microsoft Hyper-V host bridge driver: - Fix interrupt cleanup path (Cathy Avery) - Don't leak buffer in hv_pci_onchannelcallback() (Vitaly Kuznetsov) - Handle all pending messages in hv_pci_onchannelcallback() (Vitaly Kuznetsov) NVIDIA Tegra host bridge driver: - Program PADS_REFCLK_CFG* always, not just on legacy SoCs (Stephen Warren) - Program PADS_REFCLK_CFG* registers with per-SoC values (Stephen Warren) - Use lower-case hex consistently for register definitions (Thierry Reding) - Use generic pci_remap_iospace() rather than ARM32-specific one (Thierry Reding) - Stop setting pcibios_min_mem (Thierry Reding) Renesas R-Car host bridge driver: - Drop gen2 dummy I/O port region (Bjorn Helgaas) TI DRA7xx host bridge driver: - Fix return value in case of error (Christophe JAILLET) Xilinx AXI host bridge driver: - Fix return value in case of error (Christophe JAILLET) Miscellaneous: - Make bus_attr_resource_alignment static (Ben Dooks) - Include <asm/dma.h> for isa_dma_bridge_buggy (Ben Dooks) - MAINTAINERS: Add file patterns for PCI device tree bindings (Geert Uytterhoeven) - Make host bridge drivers explicitly non-modular (Paul Gortmaker)" * tag 'pci-v4.8-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (125 commits) PCI: xgene: Make explicitly non-modular PCI: thunder-pem: Make explicitly non-modular PCI: thunder-ecam: Make explicitly non-modular PCI: tegra: Make explicitly non-modular PCI: rcar-gen2: Make explicitly non-modular PCI: rcar: Make explicitly non-modular PCI: mvebu: Make explicitly non-modular PCI: layerscape: Make explicitly non-modular PCI: keystone: Make explicitly non-modular PCI: hisi: Make explicitly non-modular PCI: generic: Make explicitly non-modular PCI: designware-plat: Make it explicitly non-modular PCI: artpec6: Make explicitly non-modular PCI: armada8k: Make explicitly non-modular PCI: artpec: Add PCI_MSI_IRQ_DOMAIN dependency PCI: Add ACS quirk for Solarflare SFC9220 arm64: dts: marvell: Add Aardvark PCIe support for Armada 3700 PCI: aardvark: Add Aardvark PCI host controller driver dt-bindings: add DT binding for the Aardvark PCIe controller PCI: tegra: Program PADS_REFCLK_CFG* registers with per-SoC values ...
| * arm64: dts: marvell: Add Aardvark PCIe support for Armada 3700Thomas Petazzoni2016-07-261-0/+25
| | | | | | | | | | | | | | | | Add the SoC-level description of the PCIe controller found on the Marvell Armada 3700 and enable this PCIe controller on the development board for this SoC. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* | arm64: dts: marvell: add peripherals clocks for Armada 37xxGregory CLEMENT2016-07-041-0/+16
| | | | | | | | | | | | | | Add two new blocks of clocks. The peripheral clocks are the source clocks of the peripheral of the Armada 3700 SoC. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
* | arm64: dts: marvell: add tbg clocks for Armada 37xxGregory CLEMENT2016-07-041-0/+7
| | | | | | | | | | | | | | Add a new block of clocks. The Time Base Generators clocks can be the parent of the peripheral clocks. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
* | arm64: dts: marvell: Add xtal clock support for Armada 3700Gregory CLEMENT2016-07-041-0/+12
|/ | | | | | | | The configuration of the clock depend of the gpio latch. This information is stored in the gpio block registers. That's why the block is shared using a syscon node. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
* arm64: dts: marvell: add XOR node for Armada 3700 SoCGregory CLEMENT2016-04-291-0/+13
| | | | | | | | Armada 3700 SoC comprise one dual-channel XOR engine and this patch adds its according representation. Signed-off-by: Marcin Wojtas <mw@semihalf.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
* arm64: dts: marvell: Use a SoC-specific compatible for xHCI on Armada37xxGregory CLEMENT2016-04-271-1/+2
| | | | | | | | | | | Even if the Armada 37xx does not any specific setup, the device tree binding documentation requires to use a SoC-specific version corresponding to the platform first followed by the generic version. This patch introduce this new compatible string and updates the documentation accordingly. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
* arm64: dts: marvell: Rename armada-37xx USB nodeAndreas Färber2016-04-271-1/+1
| | | | | | | | | No need to reflect the USB version in the node name. Cc: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> [gregory.clement@free-electrons.com: drop Fixes tag as it is not a bug fix.]
* arm64: dts: marvell: Clean up armada-3720-dbAndreas Färber2016-04-271-2/+2
| | | | | | | | | | | | Instead of duplicating the SoC's node hierarchy, including a bus node named "internal-regs", reference the actually desired nodes by label, like Berlin already does. Add labels where necessary. Drop an inconsistent white line while at it. Cc: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> [gregory.clement@free-electrons.com: drop Fixes tag as it is not a bug fix.]
* arm64: dts: add the Marvell Armada 3700 family and a development boardGregory CLEMENT2016-02-171-0/+131
Add initial dtsi files to support Marvell Armada 3700 SoC with Cortex-A53 CPUs. There are two members in this family: the Armada 3710 (Single CPU) and the Armada 3720 (Dual CPUs). It also adds a dts file for the Marvell Armada 3720 DB board. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
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