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* [ARM] Enable VFP to be built when non-VFP capable CPUs are selectedRussell King2006-06-222-3/+6
| | | | | | | | | | | | | | | | Since we pass flags to the compiler to control code generation based on the least capable selected CPU, if we want to include VFP support, we must tweak the assembler flags to allow the VFP instructions. Moreover, we must not use the mrrc/mcrr versions since these will not be recognised by the assembler. We do not convert all instructions to the VFP-equivalent (yet) since binutils appears to barf on "fmrx rn, fpinst" and doesn't provide any other way (other than using the mrc equivalent) to encode this instruction - which is rather a problem when you have a VFP implementation which requires these instructions. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] Add thread_notify infrastructureRussell King2006-06-221-25/+46
| | | | | | | | | | | | | Some machine classes need to allow VFP support to be built into the kernel, but still allow the kernel to run even though VFP isn't present. Unfortunately, the kernel hard-codes VFP instructions into the thread switch, which prevents this being run-time selectable. Solve this by introducing a notifier which things such as VFP can hook into to be informed of events which affect the VFP subsystem (eg, creation and destruction of threads, switches between threads.) Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 3499/1: Fix VFP FPSCR corruption for double exception caseGeorge G. Davis2006-05-051-1/+1
| | | | | | | | | | | | | Patch from George G. Davis The ARM VFP FPSCR register is corrupted when a condition flags modifying VFP instruction is followed by a non-condition flags modifying VFP instruction and both instructions raise exceptions. The fix is to read the current FPSCR in between emulation of these two instructions and use the current FPSCR value when handling the second exception. Signed-off-by: George G. Davis <gdavis@mvista.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] vfp: fix leak of VFP_NAN_FLAG into FPSCRRussell King2006-04-253-3/+3
| | | | | | | | | The VFP code can leak VFP_NAN_FLAG into the FPSCR. It doesn't correspond to any real FPSCR bit (and overlaps one of the exception flags). Bug report from Daniel Jacobowitz Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 3473/1: Use numbers 0-15 for the VFP double registersCatalin Marinas2006-04-103-17/+11
| | | | | | | | | | | | | | | Patch from Catalin Marinas This patch changes the double registers numbering to 0-15 from even 0-30, in preparation for future VFP extensions. It also fixes the VFP_REG_ZERO bug (value 16 actually represents the 8th double register with the original numbering). The original mcrr/mrrc on CP10 were generating FMRRS/FMSRR instead of FMRRD/FMDRR. The patch changes to CP11 for the correct instructions. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 3471/1: FTOSI functions should return 0 for NaNCatalin Marinas2006-04-102-3/+13
| | | | | | | | | | Patch from Catalin Marinas The NaN case was dealed with by the "exponent >= ... + 32" condition but it was not setting the value "d" to 0. Signed-off-by: Ken'ichi Kuromusha <musha@aplix.co.jp> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 3398/1: Fix the VFP registers loading/storing base addressCatalin Marinas2006-03-251-3/+1
| | | | | | | | | | | | Patch from Catalin Marinas The current VFP code corrupts the VFP registers (including the control ones) if more than one floating point application is executed at the same time. This patch fixes the updating of the load/store base addresses for the VFP registers. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] Move enable_irq and disable_irq to assembler.hRussell King2006-03-231-0/+1
| | | | | | | | 5d25ac038a317d454a4321cba955f756400835a5 broke VFP builds due to enable_irq not being defined as an assembly macro. Move it to assembler.h so everyone can use it. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] Move IRQ enable after coprocessor number decodeRussell King2006-03-211-0/+1
| | | | | | | Allow the individual coprocessor handlers to decide when to enable interrupts, rather than unconditionally enabling them. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* kbuild: arm - use generic asm-offsets.h supportSam Ravnborg2005-09-091-1/+1
| | | | | | | Delete obsoleted stuff from arch Makefile and rename constants.h to asm-offsets.h Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
* [PATCH] ARM: 2841/1: Fix VFP +/-0 case for doubles additionCatalin Marinas2005-08-031-0/+3
| | | | | | | | | | | Patch from Catalin Marinas The IEEE 754 standard specifies that the result of (x - x), where x is a valid number, should be -0 if the rounding mode is towards minus infinity or +0 otherwise. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [PATCH] ARM: Don't force SIGFPERussell King2005-06-291-1/+1
| | | | | | | | We were forcing SIGFPE on to a user program for no good reason. Use send_sig_info() instead. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [PATCH] ARM: Fix VFP to use do_div()Russell King2005-06-293-4/+27
| | | | | | | | VFP used __divdi3 64-bit division needlessly. Convert it to use our 64-bit by 32-bit division instead. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* Linux-2.6.12-rc2v2.6.12-rc2Linus Torvalds2005-04-168-0/+3402
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
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