| Commit message (Collapse) | Author | Age | Files | Lines |
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Conflicts:
arch/arm/mach-s3c2440/mach-at2440evb.c
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Add device definition and support functions for the
second i2c device (i2c1). If this is selected, the first
i2c bus will become index 0 instead of index -1.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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GPIO register and configuration definitions for GPIO
banks N, O, P and Q.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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GPIO register and configuration definitions for GPIO
banks G, H, I and J.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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GPIO register and configuration definitions for GPIO
banks D, E and F.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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GPIO register and configuration definitions for GPIO
banks A, B and C.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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Add gpiolib registration for the GPIOs available on the
S3C64XX platform
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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Correct the PLL field masks to ensure the PLL functions return the
right value.
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
[ben-linux@fluff.org: improve the description text]
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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Fix the definition of the MMC0 register shift and mask in the
CLKSRC register.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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Add apropriate enable call for clk_48m.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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Add definitions for the external interrupt groups which accompany
the original IRQ_EINT from the s3c24xx series.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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Add the necessary code to support IRQ_EINT(x) on
the S3C64XX series of CPUs.
Note, since there is no GPIO configuration support
in the kernel, the irq set_type method does not
configure the relevant pin to interrupt.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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Add the PLL clock initialisation and clock registration
and include the clocks sourced via CLKDIVx for most of
the on-chip peripherals.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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Add definitions for the s3c6400 epll and main pll
as well as functions to decode the rate. Add
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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Add the physical to virtual memory mapping and the
necessary interrupt demuxing for the PWM timer blocks.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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Add and initialise the two VIC (PL192) found on
the S3C64XX series CPUs.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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Initialise the basic physical to virtual mappings and
then detect the CPU that the system is being run on so
that the cpu code code can call the correct initialisation
code.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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Add IRQ definitions for the VIC0 and VIC1 interrupts
on the S3C6400 and S3C6410 SoCs.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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Add resources and information for the UART deviecs
on the S3C64XX CPUs.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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Initial clock register defines.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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Add the initial header files for the S3C64XX support to satisfy the
minimal requirements to build a kernel. Some definitions will therefore
be placeholders or empty functions that will ensure that the system can
build and have base functionality. These will be filled in at a later
date.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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