summaryrefslogtreecommitdiffstats
path: root/arch/arm/mm
Commit message (Expand)AuthorAgeFilesLines
* [ARM] Fix bounding error in ioremap_pfn()Russell King2007-07-121-6/+4
* [ARM] Fix non-page aligned boot time mappingsRussell King2007-07-041-2/+2
* parse errors in ifdefsYoann Padioleau2007-06-011-1/+1
* [ARM] 4394/1: ARMv7: Add the TLB range operationsCatalin Marinas2007-05-304-2/+94
* Merge master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2007-05-214-3/+11
|\
| * [ARM] spelling fixesSimon Arlott2007-05-203-3/+3
| * [ARM] ARMv6: add CPU_HAS_ASID configurationRussell King2007-05-171-0/+8
* | Detach sched.h from mm.hAlexey Dobriyan2007-05-211-1/+1
|/
* [ARM] 4331/3: Support for Micrel/Kendin KS8695 processorAndrew Victor2007-05-111-3/+3
* [ARM] 4370/3: AT91: Support for Atmel AT91SAM9RL processors.Andrew Victor2007-05-111-2/+2
* [ARM] 4303/3: base kernel support for TI DaVinciKevin Hilman2007-05-111-2/+2
* Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2007-05-097-5/+606
|\
| *-. Merge branches 'armv7', 'at91', 'misc' and 'omap' into develRussell King2007-05-091-3/+7
| |\ \
| | | * [ARM] Fix ASID version switchRussell King2007-05-081-3/+7
| * | | [ARM] armv7: add Makefile and Kconfig entriesCatalin Marinas2007-05-092-2/+33
| * | | [ARM] armv7: add support for asid-tagged VIVT I-cacheCatalin Marinas2007-05-091-0/+7
| * | | [ARM] armv7: add support for ARMv7 cores.Catalin Marinas2007-05-084-0/+559
| | |/ | |/|
* | | move die notifier handling to common codeChristoph Hellwig2007-05-081-1/+1
|/ /
* | get_unmapped_area handles MAP_FIXED on armBenjamin Herrenschmidt2007-05-071-2/+1
* | Merge branch 'ixp4xx' into develRussell King2007-05-061-0/+28
|\ \
| * | [ARM] 4311/1: ixp4xx: add KIXRP435 platformRuslan V. Sushko2007-04-211-0/+28
| |/
* | [ARM] mm 10: allow memory type to be specified with ioremapRussell King2007-05-052-17/+15
* | [ARM] mm 9: add additional device memory typesRussell King2007-05-051-22/+28
* | [ARM] mm 8: define mem_types table L1 bit 4 to be for ARMv6Russell King2007-05-051-24/+20
* | [ARM] mm 6: allow mem_types table to specify extended pte attributesRussell King2007-04-213-2/+5
* | [ARM] mm 5: Use mem_types table in ioremapRussell King2007-04-213-46/+42
* | [ARM] mm 4: make create_mapping() more conventionalRussell King2007-04-211-59/+55
* | [ARM] mm 3: separate out supersection mappings, avoid for <4GBRussell King2007-04-212-70/+62
* | [ARM] mm 2: clean up create_mapping()Russell King2007-04-211-17/+13
* | [ARM] mm 1: Combine mem_type domain into prot_* at init timeRussell King2007-04-211-4/+12
|/
* [ARM] Remove needless linux/ptrace.h includesRussell King2007-04-213-3/+0
* [ARM] Add ability to dump exception stacks to kernel backtracesRussell King2007-04-211-2/+2
* Merge git://git.kernel.org/pub/scm/linux/kernel/git/bunk/trivialLinus Torvalds2007-02-191-1/+1
|\
| * kbuild: Replace remaining "depends" with "depends on"Robert P. J. Day2007-02-171-1/+1
* | Merge NetSilicon NS93xx treeRussell King2007-02-181-2/+2
|\ \
| * | [ARM] 4210/1: base for new machine type "NetSilicon NS9360"Uwe Kleine-König2007-02-171-2/+2
| |/
| |
| \
| \
| \
| \
| \
*-----. \ Merge AT91, EP93xx, General devel, PXA, S3C, V6+ and Xscale treesRussell King2007-02-178-95/+228
|\ \ \ \ \ | | | |_|/ | | |/| |
| | | | * [ARM] 4123/1: xsc3: general cleanupLennert Buytenhek2007-02-081-76/+75
| | | |/ | | |/|
| | | * Merge Realview GIC codeRussell King2007-02-151-3/+5
| | | |\
| | | | * [ARM] 4109/2: Add support for the RealView/EB MPCore revC platformCatalin Marinas2007-02-151-3/+5
| | | |/ | | |/|
| | | * [ARM] 4135/1: Add support for the L210/L220 cache controllersCatalin Marinas2007-02-113-0/+110
| | | * [ARM] Always mark ARMv6 PTWs outer cacheableRussell King2007-02-081-6/+8
| | | * [ARM] 4153/1: fix consistent_sync() off-by-one BUG checkLennert Buytenhek2007-02-081-1/+1
| | | * [ARM] Convert DMA cache handling to take const void * argsRussell King2007-02-081-7/+6
| | | * [ARM] 4134/1: Add generic support for outer cachesCatalin Marinas2007-02-082-0/+9
| | | * [ARM] 4129/1: Add barriers after the TLB operationsCatalin Marinas2007-02-081-0/+4
| | | * [ARM] 4128/1: Architecture compliant TTBR changing sequenceCatalin Marinas2007-02-081-2/+10
| | |/
| * | [ARM] 4145/2: AT91: Add support for AT91SAM9263 processorAndrew Victor2007-02-081-2/+2
| |/
* | [ARM] 4191/1: Remove redundant __flush_dcache_page() function prototypeGeorge G. Davis2007-02-161-2/+0
* | [ARM] 4158/1: Fix user page protection macrosImre_Deak2007-02-111-0/+3
|/
OpenPOWER on IntegriCloud