Commit message (Expand) | Author | Age | Files | Lines | |
---|---|---|---|---|---|
* | arm: delete __cpuinit/__CPUINIT usage from all ARM users | Paul Gortmaker | 2013-07-14 | 1 | -4/+0 |
* | ARM: LPAE: accomodate >32-bit addresses for page table base | Cyril Chemparathy | 2013-05-30 | 1 | -0/+8 |
* | ARM: LPAE: factor out T1SZ and TTBR1 computations | Cyril Chemparathy | 2013-05-30 | 1 | -21/+8 |
* | ARM: LPAE: use phys_addr_t in switch_mm() | Cyril Chemparathy | 2013-05-30 | 1 | -4/+12 |
* | ARM: 7691/1: mm: kill unused TLB_CAN_READ_FROM_L1_CACHE and use ALT_SMP instead | Will Deacon | 2013-04-03 | 1 | -1/+2 |
* | ARM: 7652/1: mm: fix missing use of 'asid' to get asid value from mm->context.id | Ben Dooks | 2013-03-03 | 1 | -1/+1 |
* | ARM: 7650/1: mm: replace direct access to mm->context.id with new macro | Ben Dooks | 2013-02-16 | 1 | -1/+1 |
* | ARM: mm: introduce present, faulting entries for PAGE_NONE | Will Deacon | 2012-11-09 | 1 | -0/+3 |
* | ARM: mm: introduce L_PTE_VALID for page table entries | Will Deacon | 2012-11-09 | 1 | -1/+1 |
* | ARM: LPAE: MMU setup for the 3-level page table format | Catalin Marinas | 2011-12-08 | 1 | -0/+150 |