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* Merge branch 'ux500/delete-u5500' into next/socArnd Bergmann2012-05-141-6/+2
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: arch/arm/mach-ux500/cache-l2x0.c arch/arm/mach-ux500/clock.c arch/arm/mach-ux500/cpu.c arch/arm/mach-ux500/mbox-db5500.c arch/arm/mach-ux500/platsmp.c arch/arm/mach-ux500/timer.c Resolve lots of identical conflicts between the removal of u5500 and the addition of u8540. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * ARM: ux500: delete U5500 supportLinus Walleij2012-05-021-6/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This platform has been obsoleted and was only available inside of ST-Ericsson, no users of this code are left in the world. This deletes the core U5500 support entirely in the same manner as the obsoleted U8500 silicon was previously deleted. The cpu_is_u5500() macros that can read out the CPU ID is left until the next kernel cycle, this makes it possible to merge deletion of dependent drivers without breakage. This also has the upside of removing the mailbox driver which was our only driver that was outside the drivers/* hiearchy, now the machine directory only handles machines and nothing else. Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Cc: Rabin Vincent <rabin.vincent@stericsson.com> Cc: Jonas Aberg <jonas.aberg@stericsson.com> Cc: Per Forlin <per.forlin@stericsson.com> Cc: Ulf Hansson <ulf.hansson@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | ARM: ux500: core U9540 supportLinus Walleij2012-05-021-2/+2
|/ | | | | | | | | | | | | | | | | | | This adds support for the U9540 variant of the U8500 series. This is an application processor without internal modem. This is the most basic part with ASIC ID, CPU-related fixes, IRQ list, register ranges, timer, UART, and L2 cache setup. This is based on a patch by Michel Jaouen which was rewritten to fit with the latest 3.3 kernel. ChangeLog v1->v2: deleted the irqs-db9540.h file since we expect to migrate to using Device Tree for getting the IRQs to devices. ChangeLog v2->v3: introduced a fixed virtual offset for the ROM as suggested by Arnd Bergmann. Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Sebastien Pasdeloup <sebastien.pasdeloup-nonst@stericsson.com> Signed-off-by: Michel Jaouen <michel.jaouen@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* ARM: ux500: wake secondary cpu via reschedJonas Aaberg2012-04-111-1/+1
| | | | | | | | | Wake secondary cpu via resched instead of "Unknown IPI message 0x1" Signed-off-by: Jonas Aaberg <jonas.aberg@stericsson.com> Reviewed-by: Rickard Andersson <rickard.andersson@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* ARM: 7293/1: logical_cpu_map: decouple CPU mapping from SMPWill Deacon2012-01-231-0/+1
| | | | | | | | | | | | | | | | | It turns out that the logical CPU mapping is useful even when !CONFIG_SMP for manipulation of devices like interrupt and power controllers when running a UP kernel on a CPU other than 0. This can happen when kexecing a UP image from an SMP kernel. In the future, multi-cluster systems running AMP configurations will require something similar for mapping cluster IDs, so it makes sense to decouple this logic in preparation for this support. Acked-by: Yang Bai <hamo.by@gmail.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Reported-by: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* Merge branch 'next/cross-platform' of git://git.linaro.org/people/arnd/arm-socLinus Torvalds2011-11-011-1/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'next/cross-platform' of git://git.linaro.org/people/arnd/arm-soc: arm/imx: use Kconfig choice for low-level debug UART selection ARM: realview: use Kconfig choice for debug UART selection ARM: plat-samsung: use Kconfig choice for debug UART selection ARM: versatile: convert logical CPU numbers to physical numbers ARM: ux500: convert logical CPU numbers to physical numbers ARM: shmobile: convert logical CPU numbers to physical numbers ARM: msm: convert logical CPU numbers to physical numbers ARM: exynos4: convert logical CPU numbers to physical numbers Fix up trivial conflict (config DEBUG_S3C_UART move/split vs addition of ARM_KPROBES_TEST option) in arch/arm/Kconfig.debug
| * ARM: ux500: convert logical CPU numbers to physical numbersWill Deacon2011-10-171-1/+1
| | | | | | | | | | | | | | | | | | This patch uses the new cpu_logical_map() macro for converting logical CPU numbers into physical numbers when dealing with the pen_release variable in the SMP boot and CPU hotplug paths. Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Will Deacon <will.deacon@arm.com>
* | ARM: smp: fix clipping of number of CPUsRussell King2011-10-201-6/+4
|/ | | | | | | | | | Rather than clipping the number of CPUs using the compile-time NR_CPUS constant, use the runtime nr_cpu_ids value instead. This allows the nr_cpus command line option to work as expected. Cc: <stable@kernel.org> Reported-by: Mark Salter <msalter@redhat.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 6993/1: platsmp: Allow secondary cpu hotplug with maxcpus=1Stephen Boyd2011-07-071-8/+0
| | | | | | | | | | | | | | | | | | | | | | | | If an ARM system has multiple cpus in the same socket and the kernel is booted with maxcpus=1, secondary cpus are possible but not present due to how platform_smp_prepare_cpus() is called. Since most typical ARM processors don't actually support physical hotplug, initialize the present map to be equal to the possible map in generic ARM SMP code. Also, always call platform_smp_prepare_cpus() as long as max_cpus is non-zero (0 means no SMP) to allow platform code to do any SMP setup. After applying this patch it's possible to boot an ARM system with maxcpus=1 on the command line and then hotplug in secondary cpus via sysfs. This is more in line with how x86 does things. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: David Brown <davidb@codeaurora.org> Cc: Tony Lindgren <tony@atomide.com> Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Cc: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 6895/1: mach-ux500: fix SMP secondary startup regressionLinus Walleij2011-05-231-0/+3
| | | | | | | | | | Commit e2a083dc0da9aa6437e14811198379b18cdfa7f8 "ARM: consolidate SMP cross call implementation" broke the ux500 compilation since the smp.h header declared a function called from headsmp.S. This fixes it up by declaring it locally instead. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: consolidate SMP cross call implementationRussell King2011-05-231-1/+4
| | | | | | | | Rather than having each platform class provide a mach/smp.h header for smp_cross_call(), arrange for them to register the function with the core ARM SMP code instead. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ux500: remove build-time changing macrosRabin Vincent2011-01-101-8/+29
| | | | | | | | | To allow the possiblity of building U8500 and U5500 support in the same image. Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> [Rebased to latest changes in Russells tree] Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
* Merge branch 'devel-stable' into develRussell King2011-01-061-1/+1
|\ | | | | | | | | | | Conflicts: arch/arm/mach-pxa/clock.c arch/arm/mach-pxa/clock.h
| * ux500: platsmp: Fix section mismatchJonas Aaberg2010-12-191-1/+1
| | | | | | | | | | Signed-off-by: Jonas Aaberg <jonas.aberg@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
* | Merge branch 'misc' into develRussell King2011-01-061-47/+26
|\ \ | | | | | | | | | | | | | | | | | | | | | Conflicts: arch/arm/Kconfig arch/arm/common/Makefile arch/arm/kernel/Makefile arch/arm/kernel/smp.c
| * | ARM: Fix subtle race in CPU pen_release hotplug codeRussell King2010-12-201-7/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is a subtle race in the CPU hotplug code, where a CPU which has been offlined can online itself before being requested, which results in things going astray on the next online/offline cycle. What happens in the normal online/offline/online cycle is: CPU0 CPU3 requests boot of CPU3 pen_release = 3 flush cache line checks pen_release, reads 3 starts boot pen_release = -1 ... requests CPU3 offline ... ... dies ... checks pen_release, reads -1 requests boot of CPU3 pen_release = 3 flush cache line checks pen_release, reads 3 starts boot pen_release = -1 However, as the write of -1 of pen_release is not fully flushed back to memory, and the checking of pen_release is done with caches disabled, this allows CPU3 the opportunity to read the old value of pen_release: CPU0 CPU3 requests boot of CPU3 pen_release = 3 flush cache line checks pen_release, reads 3 starts boot pen_release = -1 ... requests CPU3 offline ... ... dies ... checks pen_release, reads 3 starts boot pen_release = -1 requests boot of CPU3 pen_release = 3 flush cache line Fix this by grouping the write of pen_release along with its cache line flushing code to ensure that any update to pen_release is always pushed out to physical memory. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | ARM: SMP: consolidate trace_hardirqs_off() into common SMP codeRussell King2010-12-201-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | All platforms call trace_hardirqs_off() in their secondary startup code, so move this into the core SMP code - it doesn't need to be in the per-platform code. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | ARM: SMP: consolidate the common parts of smp_prepare_cpus()Russell King2010-12-201-21/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | There is a certain amount of smp_prepare_cpus() which doesn't belong in the platform support code - that is, code which is invariant to the SMP implementation. Move this code into arch/arm/kernel/smp.c, and add a platform_ prefix to the original function. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | ARM: SMP: get rid of get_core_count()Russell King2010-12-201-6/+3
| | | | | | | | | | | | | | | | | | We don't need this small function as well as scu_get_core_count() Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | ARM: SMP: Clean up ncores sanity checksRussell King2010-12-201-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | scu_get_core_count() never returns zero cores, so we don't need to check and correct if ncores is zero. Tegra was missing the check against NR_CPUS, leading to a potential bitfield overflow if this becomes the case. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | ARM: SMP: move CPU number sanity checks to smp_init_cpus()Russell King2010-12-201-13/+13
| | | | | | | | | | | | | | | | | | | | | | | | Ensure that the number of CPUs is sanity checked before setting the number of possible CPUs. This avoids any chance of overflowing the cpu_possible bitmap. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | ARM: SMP: pass an ipi number to smp_cross_call()Russell King2010-12-031-1/+1
| |/ | | | | | | | | | | | | | | | | This allows us to use smp_cross_call() to trigger a number of different software generated interrupts, rather than combining them all on one SGI. Recover the SGI number via do_IPI. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | ARM: GIC: Remove MMIO address from gic_cpu_init, rename to gic_secondary_initRussell King2010-12-141-1/+1
|/ | | | | | | | | | | | We don't need to re-pass the base address for the CPU interfaces to the GIC for secondary CPUs, as it will never be different from the boot CPU - and even if it was, we'd overwrite the boot CPU's base address. Get rid of this argument, and rename to gic_secondary_init(). Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Tested-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 6391/1: ux500: add CPU hotplug supportSundar Iyer2010-09-191-0/+2
| | | | | | Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Sundar Iyer <sundar.iyer@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 6088/1: ux500: use UX500_* macros instead of U8500_*Rabin Vincent2010-05-041-5/+5
| | | | | | | | | So that the correct addresses get used on U5500. Acked-by: Linus Walleij <linus.walleij@stericsson.com> Acked-by: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 6027/1: ux500: enable l2x0 supportSrinidhi Kasagar2010-04-141-1/+2
| | | | | | | | | This enables the l2x0 support and ensures that the secondary CPU can see the page table and secondary data at this point. Signed-off-by: srinidhi kasagar <srinidhi.kasagar@stericsson.com> Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 5831/1: ARM: U8500 core machine supportSrinidhi Kasagar2009-11-281-0/+177
Adds core support for the ST-Ericsson U8500 platform. It supports memory mappings, binds to the existing modules like GIC, SCU, TWD and local timers and sets up the infrastructure for the secondary core. Reviewed-by: Alessandro Rubini <rubini@unipv.it> Reviewed-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: srinidhi kasagar <srinidhi.kasagar@stericsson.com> Acked-by: Andrea Gallo <andrea.gallo@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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