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* arm/tegra: pinmux: ioremap registersStephen Warren2011-10-131-31/+106
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use ioremap to obtain access to registers instead of using static mappings. This reduces the number of users of the static mappings, which will eventually allow them to be removed. Note that on Tegra30, the number of register "banks" will decrease to 2, and the packing of specific bits into registers will change significantly. That's why this change adds the "*_bank" fields to the pingroup tables, rather than implementing some more hard-coded scheme. Also, completely remove the implementation of suspend/resume; Tegra doesn't yet support suspend/resume, and the implementation is complex for the general pinmux driver: * Not all registers are used within each bank, so we probably shouldn't just iterate over every register in the bank, and save/restore it, since that would mean touching undefined registers. * Registers are shared between pingroups, so we can't simply iterate over each pingroup, and save/restore the registers it uses. It'd probably be best have probe() calculate a bitmask of actually-used registers for each bank, and have suspend/resume iterate over those bitmaps. Oh, and Real Soon Now, I should be looking into converting this driver to the new pinmux/pinctrl subsystem, so I didn't want to put too much work into the current incarnation. v2: s/space/bank/ to match comments on reg_* fields in pinmux.h. Re-order bank/reg parameters to pg_readl/pg_writel. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
* arm/tegra: Convert pinmux driver to a platform deviceStephen Warren2011-10-131-0/+26
| | | | | | Signed-off-by: Stephen Warren <swarren@nvidia.com> [olof: switch probe function to __devinit] Signed-off-by: Olof Johansson <olof@lixom.net>
* [ARM] tegra: pinmux: add safe values, move tegra2, add suspendColin Cross2010-10-211-237/+117
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - the reset values for some pin groups in the tegra pin mux can result in functional errors due to conflicting with actively-configured pin groups muxing from the same controller. this change adds a known safe, non- conflicting mux for every pin group, which can be used on platforms where the pin group is not routed to any peripheral - also add each pin group's I/O voltage rail, to enable platform code to map from the pin groups used by each interface to the regulators used for dynamic voltage control - add routines to individually configure the tristate, pin mux and pull- ups for a pingroup_config array, so that it is possible to program individual values at run-time without modifying other values. this allows driver power-management code to reprogram individual interfaces into lower power states during idle / suspend, or to reprogram the pin mux to support multiple physical busses per internal controller (e.g., sharing a single I2C or SPI controller across multiple pin groups) - move chip-specific data like pingroups and drive-pingroups out of the common code and into chip-specific code - fix debug output for group with no pullups - add a TEGRA_MUX_SAFE function. Setting a pingroup to TEGRA_MUX_SAFE will automatically select a mux setting that is guaranteed not to conflict with any of the hardware blocks. Signed-off-by: Gary King <gking@nvidia.com>
* [ARM] tegra: add pinmux supportErik Gilling2010-08-051-0/+945
v2: fixes from Russell King - include linux/io.h instead of asm/io.h v3: - Add drive strength controls - Replace typedef enums with plain enums Signed-off-by: Erik Gilling <konkers@android.com> Signed-off-by: Colin Cross <ccross@android.com>
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