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* ARM: shmobile: timer: Drop support for Cortex A8Geert Uytterhoeven2016-04-201-32/+20
| | | | | | | | | | | | | | | | | Commit edf4100906044225 ("ARM: shmobile: sh7372 dtsi: Remove Legacy file") removed the DTS for the last shmobile SoC with a Cortex A8 CPU core (sh7372 aka SH-Mobile AP4), hence drop support for it in the loops-per-jiffy preset code. As "div" is always 1 for supported contemporary ARM processors, we can simplify the code: - Absorb shmobile_setup_delay_hz(), which was always called with mult = div = 1, - Return earlier if the Cortex A7/A15 arch timer exists and support is enabled. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: timer: Fix preset_lpj leading to too short delaysGeert Uytterhoeven2016-04-201-17/+11
| | | | | | | | | | | | | | | | | | | | | | On all shmobile ARM SoCs, loop-based delays may complete early, which can be after only 1/3 (Cortex A9) or 1/2 (Cortex A7 or A15) of the minimum required time. This is caused by calculating preset_lpj based on incorrect assumptions about the number of clock cycles per loop: - All of Cortex A7, A9, and A15 run __loop_delay() at 1 loop per CPU clock cycle, - As of commit 11d4bb1bd067f9d0 ("ARM: 7907/1: lib: delay-loop: Add align directive to fix BogoMIPS calculation"), Cortex A8 runs __loop_delay() at 1 loop per 2 instead of 3 CPU clock cycles. On SoCs with Cortex A7 and/or A15 CPU cores, this went unnoticed, as delays use the ARM arch timer if available. R-Car Gen2 doesn't work if the arch timer is disabled. However, APE6 can be used without the arch timer. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: Add includes providing forward declarationsGeert Uytterhoeven2016-02-041-0/+2
| | | | | | | | | | | | | | make C=1: arch/arm/mach-shmobile/timer.c:38:13: warning: symbol 'shmobile_init_delay' was not declared. Should it be static? arch/arm/mach-shmobile/suspend.c:37:29: warning: symbol 'shmobile_suspend_ops' was not declared. Should it be static? arch/arm/mach-shmobile/suspend.c:44:12: warning: symbol 'shmobile_suspend_init' was not declared. Should it be static? arch/arm/mach-shmobile/cpufreq.c:13:12: warning: symbol 'shmobile_cpufreq_init' was not declared. Should it be static? Include "common.h" to fix these. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: Remove obsolete earlytimer registrationGeert Uytterhoeven2015-09-141-21/+0
| | | | | | | | The last caller of shmobile_earlytimer_init() was removed in commit c99cd90d98a98aa1 ("ARM: shmobile: r8a7779: Remove legacy SoC code"). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: timer: r8a73a4 and r8a7790 are multi-platform onlyGeert Uytterhoeven2015-07-061-12/+0
| | | | | | | | | | | Since commits e042681894b62d60 ("ARM: shmobile: r8a7790: Remove legacy code") and 9d07d414d4c33d86 ("ARM: shmobile: r8a73a4: ape6evm: Remove legacy platform"), the R-Mobile APE6 and R-Car H2 SoCs are supported by multiplatform kernels only. Hence we can drop checks for these SoCs in legacy kernel builds. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* Merge tag 'renesas-soc-fixes3-for-v3.19' of ↵Olof Johansson2015-02-011-0/+12
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into fixes Merge "Third Round of Renesas ARM Based SoC Fixes for v3.19" from Simon Horman: * Instantiate GIC from C board code in legacy builds on r8a7790 and r8a73a4 * tag 'renesas-soc-fixes3-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: r8a7790: Instantiate GIC from C board code in legacy builds ARM: shmobile: r8a73a4: Instantiate GIC from C board code in legacy builds Signed-off-by: Olof Johansson <olof@lixom.net>
| * ARM: shmobile: r8a7790: Instantiate GIC from C board code in legacy buildsMagnus Damm2015-01-291-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As of commit 9a1091ef0017c40a ("irqchip: gic: Support hierarchy irq domain."), the Lager legacy board support is known to be broken. The IRQ numbers of the GIC are now virtual, and no longer match the hardcoded hardware IRQ numbers in the legacy platform board code. To fix this issue specific to non-multiplatform r8a7790 and Lager: 1) Instantiate the GIC from platform board code and also 2) Skip over the DT arch timer as well as 3) Force delay setup based on DT CPU frequency With these 3 fixes in place interrupts on Lager are now unbroken. Partially based on legacy GIC fix by Geert Uytterhoeven, thanks to him for the initial work. Signed-off-by: Magnus Damm <damm+renesas@opensource.se> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * ARM: shmobile: r8a73a4: Instantiate GIC from C board code in legacy buildsMagnus Damm2015-01-291-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As of commit 9a1091ef0017c40a ("irqchip: gic: Support hierarchy irq domain."), the APE6EVM legacy board support is known to be broken. The IRQ numbers of the GIC are now virtual, and no longer match the hardcoded hardware IRQ numbers in the legacy platform board code. To fix this issue specific to non-muliplatform r8a73a4 and APE6EVM: 1) Instantiate the GIC from platform board code and also 2) Skip over the DT arch timer as well as 3) Force delay setup based on DT CPU frequency With these 3 fixes in place interrupts on APE6EVM are now unbroken. Partially based on legacy GIC fix by Geert Uytterhoeven, thanks to him for the initial work. Signed-off-by: Magnus Damm <damm+renesas@opensource.se> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | Merge tag 'soc-for-linus' of ↵Linus Torvalds2014-12-091-8/+15
|\ \ | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC platform changes from Arnd Bergmann: "New and updated SoC support, notable changes include: - bcm: brcmstb SMP support initial iproc/cygnus support - exynos: Exynos4415 SoC support PMU and suspend support for Exynos5420 PMU support for Exynos3250 pm related maintenance - imx: new LS1021A SoC support vybrid 610 global timer support - integrator: convert to using multiplatform configuration - mediatek: earlyprintk support for mt8127/mt8135 - meson: meson8 soc and l2 cache controller support - mvebu: Armada 38x CPU hotplug support drop support for prerelease Armada 375 Z1 stepping extended suspend support, now works on Armada 370/XP - omap: hwmod related maintenance prcm cleanup - pxa: initial pxa27x DT handling - rockchip: SMP support for rk3288 add cpu frequency scaling support - shmobile: r8a7740 power domain support various small restart, timer, pci apmu changes - sunxi: Allwinner A80 (sun9i) earlyprintk support - ux500: power domain support Overall, a significant chunk of changes, coming mostly from the usual suspects: omap, shmobile, samsung and mvebu, all of which already contain a lot of platform specific code in arch/arm" * tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (187 commits) ARM: mvebu: use the cpufreq-dt platform_data for independent clocks soc: integrator: Add terminating entry for integrator_cm_match ARM: mvebu: add SDRAM controller description for Armada XP ARM: mvebu: adjust mbus controller description on Armada 370/XP ARM: mvebu: add suspend/resume DT information for Armada XP GP ARM: mvebu: synchronize secondary CPU clocks on resume ARM: mvebu: make sure MMU is disabled in armada_370_xp_cpu_resume ARM: mvebu: Armada XP GP specific suspend/resume code ARM: mvebu: reserve the first 10 KB of each memory bank for suspend/resume ARM: mvebu: implement suspend/resume support for Armada XP clk: mvebu: add suspend/resume for gatable clocks bus: mvebu-mbus: provide a mechanism to save SDRAM window configuration bus: mvebu-mbus: suspend/resume support clocksource: time-armada-370-xp: add suspend/resume support irqchip: armada-370-xp: Add suspend/resume support ARM: add lolevel debug support for asm9260 ARM: add mach-asm9260 ARM: EXYNOS: use u8 for val[] in struct exynos_pmu_conf power: reset: imx-snvs-poweroff: add power off driver for i.mx6 ARM: imx: temporarily remove CONFIG_SOC_FSL from LS1021A ...
| * ARM: shmobile: Handle CA7 arch timer delayMagnus Damm2014-10-241-8/+15
| | | | | | | | | | | | | | | | | | Update the delay code to include arch timer checks for CA7. From a arch timer availability perspective CA7 should be treated same as CA15. Signed-off-by: Magnus Damm <damm+renesas@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | ARM: shmobile: Remove FSF address from copyright headersLaurent Pinchart2014-10-271-5/+0
|/ | | | | | | | | | The information is already included in the COPYING file in the kernel sources root directory, we don't want to modify all source files when the FSF will move to a new address, and I'm tired of seeing the related checkpatch.pl warnings. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* Merge tag 'renesas-soc3-for-v3.18' of ↵Arnd Bergmann2014-09-091-4/+5
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc Pull "Third Round of Renesas ARM Based SoC Soc Updates for v3.18" from Simon Horman: * Initial r8a7794 SoC support * Support Cortex-A7 in shmobile_init_delay() Signed-off-by: Arnd Bergmann <arnd@arndb.de> * tag 'renesas-soc3-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: Initial r8a7794 SoC support ARM: shmobile: support Cortex-A7 in shmobile_init_delay()
| * ARM: shmobile: support Cortex-A7 in shmobile_init_delay()Ulrich Hecht2014-09-051-4/+5
| | | | | | | | | | | | Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Acked-by: Magnus Damm <damm+renesas@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | ARM: shmobile: Remove shmobile_setup_delay()Magnus Damm2014-08-221-19/+2
|/ | | | | | | | | | All ARM mach-shmobile SoCs and boards now rely on DTS for CPU Frequency information, so remove the unused function shmobile_setup_delay(). While at it, make the function shmobile_setup_delay_hz() static. Signed-off-by: Magnus Damm <damm+renesas@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: Fix device node reference leakage in shmobile_init_delayLaurent Pinchart2014-06-161-21/+29
| | | | | | | | | | | | The of_find_compatible_node() function returns a new reference to the found node. Instead of just adding of_node_put() calls, simplify the code by moving the CPU identification logic inside the loop over cpu nodes, in order to lower complexity from O(n) to O(1) by replacing of_find_compatible_node() calls with of_device_is_compatible(). Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Magnus Damm <damm+renesas@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: Set clock frequency in HZ from OF nodesSimon Horman2014-05-141-3/+20
| | | | | | | | | | | | | | shmobile_init_delay() looks for OF "clock-frequency" to determine the delay which is set by calling shmobile_setup_delay(). Unfortunately this seems to be incorrect in detail as "clock-frequency" node values are in HZ whereas the frequency argument to shmobile_setup_delay() is in MHz. Provide a variant of shmobile_setup_delay() that accepts HZ to correct this problem. Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: Add shared shmobile_init_delay()Magnus Damm2014-04-141-0/+28
| | | | | | | | | | Introduce shmobile_init_delay() that gets CPU specific parameters from DT and sets up the early delay from there. This allows us to both remove frequency information from the C code and consolidate existing code. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: Remove unused shmobile_init_time()Magnus Damm2013-08-061-4/+0
| | | | | | | Remove shmobile_timer_init() since it now is unused. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: convert arm/arm64 arch timer to use CLKSRC_OF initRob Herring2013-04-111-5/+2
| | | | | | | | | | | | | | | | | | | | | | | | This converts arm and arm64 to use CLKSRC_OF DT based initialization for the arch timer. A new function arch_timer_arch_init is added to allow for arch specific setup. This has a side effect of enabling sched_clock on omap5 and exynos5. There should not be any reason not to use the arch timers for sched_clock. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Simon Horman <horms@verge.net.au> Cc: Magnus Damm <magnus.damm@gmail.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will.deacon@arm.com> Cc: John Stultz <john.stultz@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-samsung-soc@vger.kernel.org Cc: linux-omap@vger.kernel.org Cc: linux-sh@vger.kernel.org Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
* ARM: shmobile: Register ARM architected timerMagnus Damm2013-02-051-0/+3
| | | | | | | | Register ARM architected timer by default for all mach-shmobile systems using late timer. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: delete struct sys_timerStephen Warren2012-12-241-5/+1
| | | | | | | | | | | | | | | | | | Now that the only field in struct sys_timer is .init, delete the struct, and replace the machine descriptor .timer field with the initialization function itself. This will enable moving timer drivers into drivers/clocksource without having to place a public prototype of each struct sys_timer object into include/linux; the intent is to create a single of_clocksource_init() function that determines which timer driver to initialize by scanning the device dtree, much like the proposed irqchip_init() at: http://www.spinics.net/lists/arm-kernel/msg203686.html Includes mach-omap2 fixes from Igor Grinberg. Tested-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM / mach-shmobile: Use preset_lpj with calibrate_delay()Magnus Damm2012-05-121-1/+2
| | | | | | | | | | | | | | | | | | | | Update the mach-shmobile shared delay calibration code for late timers. All existing in-tree non-DT socs are however using early timers today and they are unaffected by this change. The patch modifies shmobile_setup_delay() from using lpj_fine to preset_lpj. This change allows us to preset the worst case loops-per-jiffy value to all CPU cores on the system. The old code which made use of lpj_fine did not affect the secondary CPU cores which made it impossible to boot on SMP without early timers. Needed for SMP SoCs using late timers like EMEV2 or any other mach-shmobile SMP SoC that makes use of late timers via DT. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
* Merge branch 'renesas-dt' into renesas-soc-coreRafael J. Wysocki2012-05-121-0/+17
|\ | | | | | | | | | | | | | | | | | | * renesas-dt: ARM: mach-shmobile: sh7372 generic board support via DT V2 ARM: mach-shmobile: Rework sh7372 INTCS demuxer V2 ARM: mach-shmobile: Use INTC_IRQ_PINS_16H on sh7372 ARM: mach-shmobile: Use 0x3400 as INTCS vector offset ARM: mach-shmobile: Introduce INTC_IRQ_PINS_16H ARM: mach-shmobile: Introduce shmobile_setup_delay()
| * ARM: mach-shmobile: Introduce shmobile_setup_delay()Magnus Damm2012-04-111-0/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | Add the function shmobile_setup_delay() to let platforms configure their maximum loops per jiffy delay. With this jiffies calculation done the dependency on early timer is removed. In the future this allows us to assign timers using the regular driver model via the device tree. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
* | ARM / mach-shmobile: sh73a0 SMP TWD boot regression fixKuninori Morimoto2012-05-121-9/+0
|/ | | | | | | | | | | | | | | | | | | | | Fix SMP TWD boot regression on sh73a0 based platforms caused by: 4200b16 ARM: shmobile: convert to twd_local_timer_register() interface After the merge of the above commit it has been impossible to boot sh73a0 based SoCs with SMP enabled and CONFIG_HAVE_ARM_TWD=y. The kernel crashes at smp_init_cpus() timing which is before the console has been initialized, so to the user this looks like a kernel lock up without any particular error message. This patch fixes the regression on sh73a0 by moving the TWD registration code from smp_init_cpus() to sys_timer->init() time. This patch removed shmobile_twd_init() which is no longer needed Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
* Merge branch 'renesas/timer' into next/timerArnd Bergmann2012-03-201-1/+5
|\ | | | | | | | | | | | | | | | | | | | | | | Conflicts: arch/arm/mach-shmobile/timer.c This resolves a nonobvious merge conflict between renesas timer changes in the global timer changes with those from the renesas soc branch and last minute bug fixes that went into v3.3. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * ARM: mach-shmobile: default to no earlytimerMagnus Damm2012-03-121-1/+0
| | | | | | | | | | | | | | | | | | | | Now when all SoCs and boards are converted to use shmobile_earlytimer_init(), change the default behavior of shmobile_timer.init() from using early timer to do nothing which is suitable for upcoming DT support. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
| * ARM: mach-shmobile: add shmobile_earlytimer_init()Magnus Damm2012-03-121-1/+6
| | | | | | | | | | | | | | | | Add shmobile_earlytimer_init() that can be used to enable the earlytimer probing from the SoC code. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
* | ARM: shmobile: convert to twd_local_timer_register() interfaceMarc Zyngier2012-03-131-0/+10
|/ | | | | | | | | Add support for the new smp_twd runtime registration interface to the shmobile platforms, and remove the old compile-time support. Cc: Magnus Damm <magnus.damm@gmail.com> Cc: Paul Mundt <lethal@linux-sh.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
* ARM: mach-shmobile: SH-Mobile G3 support.Magnus Damm2010-02-081-0/+46
This adds preliminary support for the SH-Mobile G-series. The SH-Mobile G-series is a series of ARM/SH multi-core CPUs that aside from the ARM MPU are primarily composed of existing SH IP blocks. This includes initial support for the SH7367 (SH-Mobile G3) CPU and the G3EVM reference board. Only timer, serial console, and NOR flash are supported at this point. Patches for the interrupt controller, pinmux support, clock framework and runtime pm will be submitted as feature patches on top of this. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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