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* ARM: OMAP2+: hwmod: Add support for per hwmod/module context lost countRajendra Nayak2012-11-211-1/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | OMAP4 has module specific context lost registers which makes it now possible to have module level context loss count, instead of relying on the powerdomain level context count. Add 2 private hwmod api's to update/clear the hwmod/module specific context lost counters/register. Update the module specific context_lost_counter and clear the hardware bits just after enabling the module. omap_hwmod_get_context_loss_count() now returns the hwmod context loss count them on platforms where they exist (OMAP4), else fall back on the pwrdm level counters for older platforms. Signed-off-by: Rajendra Nayak <rnayak@ti.com> [paul@pwsan.com: added function kerneldoc, fixed structure kerneldoc, rearranged structure to avoid memory waste, marked fns as OMAP4-specific, prevent fn entry on non-OMAP4 chips, reduced indentation, merged update and clear, merged patches] [t-kristo@ti.com: added support for arch specific hwmod ops, and changed the no context offset indicator to USHRT_MAX] Signed-off-by: Tero Kristo <t-kristo@ti.com> [paul@pwsan.com: use NO_CONTEXT_LOSS_BIT flag rather than USHRT_MAX; convert unsigned context lost counter to int to match the return type; get rid of hwmod_ops in favor of the existing soc_ops mechanism; move context loss low-level accesses to the PRM code] Signed-off-by: Paul Walmsley <paul@pwsan.com>
* ARM: OMAP2+: PRCM: consolidate PRCM-related timeout macrosPaul Walmsley2012-11-081-0/+17
| | | | | | | | Consolidate all of the copies of MAX_MODULE_HARDRESET_WAIT and MAX_MODULE_SOFTRESET_WAIT into one place, arch/arm/mach-omap2/prm.h. Signed-off-by: Paul Walmsley <paul@pwsan.com> Tested-by: Vaibhav Hiremath <hvaibhav@ti.com>
* ARM: OMAP2+: PRCM: split and relocate the PRM/CM globals setupPaul Walmsley2012-11-081-1/+6
| | | | | | | | | | | | | Split omap2_set_globals_prcm() into PRM, CM, and PRCM_MPU variants, since these are all separate IP blocks. This should make it easier to move the PRM, CM, PRCM_MPU code into drivers/ in future patchsets. At this point arch/arm/plat-omap/include/plat/prcm.h is empty; a subsequent patch will remove it, and remove the #include from all the files that #include it. Signed-off-by: Paul Walmsley <paul@pwsan.com> Tested-by: Vaibhav Hiremath <hvaibhav@ti.com>
* ARM: OMAP2+: PRM: create PRM reset source API for the watchdog timer driverPaul Walmsley2012-10-211-1/+43
| | | | | | | | | | | | | | | | | | The OMAP watchdog timer driver needs to determine what caused the SoC to reset for its GETBOOTSTATUS ioctl. So, define a set of standard reset sources across OMAP SoCs. For OMAP2xxx, 3xxx, and 4xxx SoCs, define mappings from the SoC-specific reset source register bits to the standardized reset source IDs. Create SoC-specific PRM functions that read the appropriate per-SoC register and use the mapping to return the standardized reset bits. Register the SoC-specific PRM functions with the common PRM code via prm_register(). Create a function in the common PRM code, prm_read_reset_sources(), that calls the SoC-specific function, registered during boot. This patch does not yet handle some SoCs, such as AM33xx. Those SoCs were not handled by the code this will replace. Signed-off-by: Paul Walmsley <paul@pwsan.com>
* ARM: OMAP2+: PRM: prepare for use of prm_ll_data function pointersPaul Walmsley2012-10-211-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | There are several PRM operations which behave similarly across OMAP2+ SoCs, but which have slight differences in their underlying implementations. For example, to fetch the SoC's last reset sources, different registers are read across OMAP2xxx, 3xxx, and 44xx, and different bits are used on each SoC. But the information returned is so similar that a single, common interface for drivers is useful. This patch creates the support code for this function pointer registration process. No function pointers are included yet, but a subsequent patch will create one for the reset source API. To illustrate the end goal with the above reset source example, each per-SoC driver will use its own low-level implementation function -- e.g., prm2xxx.c would contain omap2xxx_prm_read_reset_sources(). This function would read the appropriate register and remap the register bits to a standard set of reset source bits. When the prm2xxx.c driver is loaded, it would register this function with the common PRM driver, prm.c. prm.c would then export a common function, omap_prm_read_reset_sources(). Calling it would call through to the function pointer for the currently-registered SoC PRM driver. This will allow other drivers to use PRM-provided data and operations without needing to know which SoC is currently in use. Signed-off-by: Paul Walmsley <paul@pwsan.com>
* OMAP2/3: PRCM: split OMAP2/3-specific PRCM code into OMAP2/3-specific filesPaul Walmsley2010-12-211-348/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In preparation for adding OMAP4-specific PRCM accessor/mutator functions, split the existing OMAP2/3 PRCM code into OMAP2/3-specific files. Most of what was in mach-omap2/{cm,prm}.{c,h} has now been moved into mach-omap2/{cm,prm}2xxx_3xxx.{c,h}, since it was OMAP2xxx/3xxx-specific. This process also requires the #includes in each of these files to be changed to reference the new file name. As part of doing so, add some comments into plat-omap/sram.c and plat-omap/mcbsp.c, which use "sideways includes", to indicate that these users of the PRM/CM includes should not be doing so. Thanks to Felipe Contreras <felipe.contreras@gmail.com> for comments on this patch. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Jarkko Nikula <jhnikula@gmail.com> Cc: Peter Ujfalusi <peter.ujfalusi@nokia.com> Cc: Liam Girdwood <lrg@slimlogic.co.uk> Cc: Omar Ramirez Luna <omar.ramirez@ti.com> Acked-by: Omar Ramirez Luna <omar.ramirez@ti.com> Cc: Felipe Contreras <felipe.contreras@gmail.com> Acked-by: Felipe Contreras <felipe.contreras@gmail.com> Cc: Greg Kroah-Hartman <greg@kroah.com> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Reviewed-by: Kevin Hilman <khilman@deeprootsystems.com> Tested-by: Kevin Hilman <khilman@deeprootsystems.com> Tested-by: Rajendra Nayak <rnayak@ti.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
* OMAP4: PRCM: reorganize existing OMAP4 PRCM header filesPaul Walmsley2010-12-211-17/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | Split the existing cm44xx.h file into cm1_44xx.h and cm2_44xx.h files so they match their underlying OMAP hardware modules. Add clockdomain offset information. Add header files for the MPU local PRCM, prcm_mpu44xx.h, and for the SCRM, scrm44xx.h. SCRM register offsets still need to be added; TI should do this. Move the "_MOD" macros out of the prcm-common.h header file, into the header file of the hardware module that they belong to. For example, OMAP4430_PRM_*_MOD macros have been moved into the prm44xx.h header. Adjust #includes of all files that used the old PRCM header file names to point to the new filenames. The autogeneration scripts have been updated accordingly. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Benoît Cousson <b-cousson@ti.com> Cc: Rajendra Nayak <rnayak@ti.com> Reviewed-by: Kevin Hilman <khilman@deeprootsystems.com> Tested-by: Kevin Hilman <khilman@deeprootsystems.com> Tested-by: Rajendra Nayak <rnayak@ti.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
* OMAP2/3: PRM: add module hard reset supportPaul Walmsley2010-09-211-0/+5
| | | | | | | | | | | | This patch adds hard-reset support for processor modules (e.g., DSP, IVA) on OMAP2/3 platforms. It's based on the OMAP4 hard-reset support that Benoît developed in the previous patch. This patch is a collaboration between Benoît Cousson <b-cousson@ti.com> and Paul Walmsley <paul@pwsan.com>. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Benoît Cousson <b-cousson@ti.com>
* OMAP4: PRM: add module hard reset supportBenoît Cousson2010-09-211-1/+12
| | | | | | | | | | | | | | | | | | | | Most processor modules (e.g., DSP, IVA, IPU) on OMAPs can be reset under the control of the PRM. This patch adds an API for this purpose for OMAP4 devices: int omap4_prm_is_hardreset_asserted(void __iomem *rstctrl_reg, u8 shift); int omap4_prm_assert_hardreset(void __iomem *rstctrl_reg, u8 shift); int omap4_prm_deassert_hardreset(void __iomem *rstctrl_reg, u8 shift); This API is intended to be used only by the hwmod code - a subsequent patch will add that support to hwmod. This patch is a collaboration between Benoît Cousson <b-cousson@ti.com> and Paul Walmsley <paul@pwsan.com>. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Benoît Cousson <b-cousson@ti.com> Tested-by: Kevin Hilman <khilman@deeprootsystems.com>
* OMAP4: PRM: Remove MPU internal code name and apply PRCM naming conventionBenoit Cousson2010-05-201-2/+2
| | | | | | | | | | | | | | The MPU subsystem was named based on internal code name (CHIRON). This patch will remove all the occurences of the chiron name are replace it with PRCM_MPU in order to differentiate the MPU local PRCM to the global one. Remove PDA_ from PRCM_MPU registers names to stick to the global PRM naming convention. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Rajendra Nayak <rnayak@ti.com>
* OMAP2+ PRCM: convert remaining PRCM macros to the _SHIFT/_MASK suffixesPaul Walmsley2010-05-201-9/+9
| | | | | | | | | | | Fix all of the remaining PRCM register shift/bitmask macros that did not use the _SHIFT/_MASK suffixes to use them. This makes the use of these macros consistent. It is intended to reduce error, as code can be inspected visually by reviewers to ensure that bitshifts and bitmasks are used in the appropriate places. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@deeprootsystems.com>
* ARM: OMAP4: PM: OMAP4 Power Domain Porting Related Clean-up.Abhijit Pagare2010-01-261-5/+12
| | | | | | | | | | Module offsets were same for OMAP2 and OMAP3 while they differ for OMAP4. Hence we need different macros for identifying platform specific offsets. Signed-off-by: Abhijit Pagare <abhijitpagare@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Rajendra Nayak <rnayak@ti.com>
* OMAP4: PRCM: Fix the base address for CHIRONSS reg definesRajendra Nayak2010-01-201-0/+2
| | | | | | | | | | The CHIRONSS has its own local PRCM module and the register defines need to use the CHIRONSS base and not the PRM base. The changes are generated by updating the script which autogenerates the file modifed in the patch. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
* ARM: OMAP4: PM: Adds PRM register defs for OMAP4Rajendra Nayak2009-12-111-2/+6
| | | | | | | | | | This patch adds OMAP4 specific PRM register defs. Auto generated using a python script (gen_prm_4430_h.py) developed by Paul Walmsley and Benoit Cousson. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Benoit Cousson <b-cousson@ti.com>
* omap: Split OMAP2_IO_ADDRESS to L3 and L4Santosh Shilimkar2009-10-191-3/+3
| | | | | | | | | | | | | | | This patch splits OMAP2_IO_ADDRESS to OMAP2_L3_IO_ADDRESS and OMAP2_L4_IO_ADDRESS to reclaim more IO space. The omap_read*() and omap_write*() functions will work only over L4 address space. Current omap kernel stack uses these functions only to access registers over L4 io address space Note that these macros should only be used when ioremap does not work. Please use ioremap instead in all new code. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* OMAP: Remove OMAP_IO_ADDRESS, use OMAP1_IO_ADDRESS and OMAP2_IO_ADDRESS insteadTony Lindgren2009-08-281-3/+3
| | | | | | | | | | | Search and replace OMAP_IO_ADDRESS with OMAP1_IO_ADDRESS and OMAP2_IO_ADDRESS, and convert omap_read/write into a functions instead of a macros. Also rename OMAP_MPUIO_VBASE to OMAP1_MPUIO_VBASE. In the long run, most code should use ioremap + __raw_read/write instead. Signed-off-by: Tony Lindgren <tony@atomide.com>
* OMAP3: PM: prevent module wakeups from waking IVA2Kevin Hilman2009-05-281-0/+2
| | | | | | | By default, prevent functional wakeups from inside a module from waking up the IVA2. Let DSP Bridge code handle this when loaded. Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* ARM: OMAP2/3: Remove OMAP_PRM_REGADDR and OMAP2_PRM_BASETony Lindgren2009-05-251-79/+126
| | | | | | | | | | | | | Remove OMAP_PRM_REGADDR and use processor specific defines instead. Also fold in a patch from Kevin Hilman to add _OFFSET #defines for the PRCM registers to be used with the prm_[read|write]_* macros. These are used extensively in the forthcoming OMAP PM support. Also remove now unused OMAP2_PRM_BASE. Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* [ARM] OMAP34XX: Add miscellaneous definitions related to 34xxJouni Hogander2009-02-081-11/+13
| | | | | | Signed-off-by: Jouni Hogander <jouni.hogander@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* Merge unstable branch 'omap-rmk'Russell King2008-10-031-1/+1
|\ | | | | | | Merge branch 'omap-rmk' into omap-all
| * [ARM] omap: Fix IO_ADDRESS() macrosRussell King2008-09-051-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | OMAP1_IO_ADDRESS(), OMAP2_IO_ADDRESS() and IO_ADDRESS() returns cookies for use with __raw_{read|write}* for accessing registers. Therefore, these macros should return (void __iomem *) cookies, not integer values. Doing this improves typechecking, and means we can find those places where, eg, DMA controllers are incorrectly given virtual addresses to DMA to, or physical addresses are thrown through a virtual to physical address translation. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | ARM: OMAP2: Powerdomain: Add OMAP2/3 common powerdomainsPaul Walmsley2008-08-191-1/+2
|/ | | | | | | | | | | | Add powerdomains common to both OMAP2 and OMAP3 (WKUP and GFX/SGX). Modify mach-omap2/io.c to initialize the powerdomain code on boot. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: OMAP: Turn CM and PRM access into functionsTony Lindgren2008-07-031-0/+12
| | | | | | | Otherwise compiling in omap2 and omap3 will not work. Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: OMAP: Introduce omap_globals and prcm access functions for multi-omapTony Lindgren2008-07-031-10/+2
| | | | | | | | | | | | New struct omap_globals contains the omap processor specific module bases. Use omap_globals to set the various base addresses to make detecting omap chip type simpler. Also introduce OMAP1_IO_ADDRESS and OMAP2_IO_ADDRESS for future multi-omap patches. Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: OMAP: SRAM: Split sram24xx.S into sram242x.S and sram243x.STony Lindgren2008-07-031-1/+17
| | | | | | | Split sram24xx.S into sram242x.S and sram243x.S Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: OMAP: Fixed comments on global PRM register usageKalle Jokiniemi2008-05-091-1/+1
| | | | | | | Fixed comments on global PRM register usage. Signed-off-by: Kalle Jokiniemi <ext-kalle.jokiniemi@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: OMAP2: Add common register access for 24xx and 34xxPaul Walmsley2008-04-141-0/+316
This patch adds common register access for 24xx and 34xx power and clock management in order to share code between 24xx and 34xx. Only change USB platform init code to use new register access, other access will be changed in later patches. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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