Commit message (Collapse) | Author | Age | Files | Lines | |
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* | ARM: OMAP: DRA7: powerdomain data: fix powerdomain powerstate | Nishanth Menon | 2014-09-08 | 1 | -7/+7 |
| | | | | | | | | | DRA7 supports only CSWR for CPU, MPU power domains. Core power domain supports upto INA. Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Kevin Hilman <khilman@linaro.org> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> | ||||
* | ARM: OMAP: DRA7: powerdomain: Add DRA7XX data and update header | Ambresh K | 2013-08-23 | 1 | -0/+454 |
Add the data file to describe all power domains inside the DRA7XX SoC. Signed-off-by: Ambresh K <ambresh@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Rajendra Nayak <rnayak@ti.com> [paul@pwsan.com: added generation notation to comments] Signed-off-by: Paul Walmsley <paul@pwsan.com> |