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* ARM: OMAP5: id: Add cpu id for ES versionsR Sricharan2012-07-091-1/+41
| | | | | | | | Adding the OMAP5 ES1.0, 2.0 and OMAP5432 cpu revision detection support. Signed-off-by: R Sricharan <r.sricharan@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
* ARM: OMAP2+: am33xx: Change cpu_is_am33xx to soc_is_am33xxVaibhav Hiremath2012-07-051-2/+2
| | | | | | | | | | | | | | As per recent discussion on the linux-omap list, we are moving in the direction where, we will have only architecture, ARCH_OMAP2PLUS and all devices/platforms will be treated as a SoC underneath. So the first step in this direction is to adopt this change for all new devices getting in, converting cpu_is_am33xx/335x() ==> soc_is_am33xx/335x() Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* Merge branch 'for_3.5/fixes/pm' of ↵Tony Lindgren2012-06-041-0/+11
|\ | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm into fixes
| * arm: omap3: am35x: Don't mark missing features as presentMark A. Greer2012-05-111-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Chip Identification register on the am35x family of SoCs has bits 12, 7:5, and 3:2 marked as reserved and are read as zeroes. Unfortunately, on other omap SoCs, a 0 bit means a feature is "Full Use" so the OMAP3_CHECK_FEATURE() macro called by omap3_check_features() will incorrectly interpret those zeroes to mean that a feature is present even though it isn't. To fix that, the feature bits that are incorrectly set (namely, OMAP3_HAS_IVA and OMAP3_HAS_ISP) need to be cleared after all of the calls to OMAP3_CHECK_FEATURE() in omap3_check_features() are made. Signed-off-by: Mark A. Greer <mgreer@animalcreek.com> [khilman@ti.com: use soc_is_am35xx() instead of cpu_is_am35xx()] Signed-off-by: Kevin Hilman <khilman@ti.com>
* | Merge tag 'omap-cleanup-renames-for-v3.5' of ↵Olof Johansson2012-05-101-1/+4
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/cleanup2 Simplify some SoC config options before things get too unreadable. Note that this depends on a fix in omap-fixes-non-critical-for-v3.5, so it's based on that. By Kevin Hilman (3) and others via Tony Lindgren * tag 'omap-cleanup-renames-for-v3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: OMAP2+: Kconfig: convert SOC_OMAPAM33XX to SOC_AM33XX ARM: OMAP2+: Kconfig: convert SOC_OMAPTI81XX to SOC_TI81XX ARM: OMAP: igep0020: Specify the VPLL2 regulator unconditionally ARM: OMAP2+: INTC: fix Kconfig option for TI81XX ARM: OMAP2+: remove incorrect irq_chip ack field ARM: OMAP4: Adding ID for OMAP4460 ES1.1 ARM: OMAP4: panda: add statics to remove warnings ARM: OMAP2+: Incorrect Register Offsets in OMAP Mailbox ARM: OMAP: fix trivial warnings for dspbridge ARM: OMAP4: hsmmc: check for null pointer ARM: OMAP1: fix compilation issue in board-sx1.c
| * ARM: OMAP4: Adding ID for OMAP4460 ES1.1Chris Lalancette2012-05-091-1/+4
| | | | | | | | | | | | Signed-off-by: Chris Lalancette <clalancette@gmail.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | ARM: OMAP: AM35xx: convert 3517 detection/flags to AM35xxKevin Hilman2012-05-101-4/+3
|/ | | | | | | | | | | | | | | | | | Currently cpu_is_omap3517() actually detects any device in the AM35x family (3517 and no-SGX version 3505.) To make it more clear what is being detected, convert the names from 3517 to AM35xx. This adds a new soc_is_am35xx() which duplicates the cpu_is_omap3517(). In order to avoid cross-tree dependencies with clock-tree changes, cpu_is_omap3517() is left until the clock changes are merged, at which point cpu_is_omap3517() will be completely removed. Acked-by: Vaibhav Hiremath <hvaibhav@ti.com> Tested-by: Vaibhav Hiremath <hvaibhav@ti.com> Tested-by: Mark A. Greer <mgreer@animalcreek.com> Signed-off-by: Kevin Hilman <khilman@ti.com> [tony@atomide.com: change to use soc_is_omap instead] Signed-off-by: Tony Lindgren <tony@atomide.com>
* Merge tag 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-socLinus Torvalds2012-03-271-108/+78
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull "ARM: SoC specific updates" from Arnd Bergmann: "These changes are all specific to an soc family or the code for one soc. Lots of work for Tegra3 this time, but also a lot of other platforms. There will be another (smaller) set of soc patches later in the merge window for stuff that has dependencies on external trees or that was sent just before the merge window opened. The asoc tree added a few devices to the i.mx platform, which conflict with other devices added in the same place here. The tegra Makefile conflicts between a number of branches, mostly because of changes regarding localtimer.c, which was removed in the end. Signed-off-by: Arnd Bergmann <arnd@arndb.de>" Fix up some trivial conflicts, including the mentioned Tegra Makefile. * tag 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (51 commits) ARM: EXYNOS: fix cycle count for periodic mode of clock event timers ARM: EXYNOS: add support JPEG ARM: EXYNOS: Add DMC1, allow PPMU access for DMC ARM: SAMSUNG: Correct MIPI-CSIS io memory resource definition ARM: SAMSUNG: fix __init attribute on regarding s3c_set_platdata() ARM: SAMSUNG: Add __init attribute to samsung_bl_set() ARM: S5PV210: Add usb otg phy control ARM: S3C64XX: Add usb otg phy control ARM: EXYNOS: Enable l2 configuration through device tree ARM: EXYNOS: remove useless code to save/restore L2 ARM: EXYNOS: save L2 settings during bootup ARM: S5P: add L2 early resume code ARM: EXYNOS: Add support AFTR mode on EXYNOS4210 ARM: mx35: Setup the AIPS registers ARM: mx5: Use common function for configuring AIPS ARM: mx3: Setup AIPS registers ARM: mx3: Let mx31 and mx35 enter in LPM mode in WFI ARM: defconfig: imx_v6_v7: build in REGULATOR_FIXED_VOLTAGE ARM: imx: update imx_v6_v7_defconfig ARM: tegra: Demote EMC clock inconsistency BUG to WARN ...
| * Merge branch 'soc' of ↵Olof Johansson2012-03-131-0/+1
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/rafael/renesas into next/soc * 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/renesas: (234 commits) ARM: shmobile: remove additional __io() macro use ARM: mach-shmobile: default to no earlytimer ARM: mach-shmobile: r8a7779 and Marzen timer rework ARM: mach-shmobile: r8a7740 and Bonito timer rework ARM: mach-shmobile: sh73a0, AG5EVM and Kota2 timer rework ARM: mach-shmobile: sh7372, AP4EVB and Mackerel timer rework ARM: mach-shmobile: sh7377 and G4EVM timer rework ARM: mach-shmobile: sh7367 and G3EVM timer rework ARM: mach-shmobile: add shmobile_earlytimer_init() ARM: mach-shmobile: Move sh7372 AP4EVB external clk setup ARM: mach-shmobile: Move sh7372 Mackerel external clk setup ARM: mach-shmobile: rename clk_init() to shmobile_clk_init() ARM: mach-shmobile: r8a7779 L2 cache support ARM: mach-shmobile: r8a7779 map_io and init_early update ARM: mach-shmobile: r8a7740 map_io and init_early update ARM: mach-shmobile: sh73a0 map_io and init_early update ARM: mach-shmobile: sh7372 map_io and init_early update ARM: mach-shmobile: sh7377 map_io and init_early update ARM: mach-shmobile: sh7367 map_io and init_early update sh: remove clk_ops ... (includes an update to v3.3-rc7) Conflicts: arch/arm/mach-omap2/id.c
| * | ARM: OMAP2+: split omap2/3/4_check_revision functionVaibhav Hiremath2011-12-191-37/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We need to detect the SoC revision early, but the SoC feature detection can be done later on. In order to allow further clean-up later on, this patch separates the SoC revision check from the SoC feature check. This patch doesn't change functionality or behavior of the code execution; it barely cleans up the code and splits into SoC specific implementation for Rev ID and feature detection. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> [tony@atomide.com: updated comments] Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | ARM: OMAP2+: Make cpu_rev static global variableVaibhav Hiremath2011-12-191-74/+72
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As part of omap revision code cleanup, make cpu_rev variable static global to the file (id.c). This is needed so we can split the SoC detection from SoC feature detection in the following patch. Also move omap3_cpuinfo function a bit as that will be shared by other omap3 like SoCs. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> [tony@atomide.com: updated comments] Signed-off-by: Tony Lindgren <tony@atomide.com>
* | | Merge branch 'fixes' of git://gitorious.org/linux-davinci/linux-davinci into ↵Arnd Bergmann2012-03-151-0/+1
|\ \ \ | | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | next/fixes-non-critical * 'fixes' of git://gitorious.org/linux-davinci/linux-davinci: (2 commits) ARM: davinci: DA850: move da850_register_pm to .init.text ARM: davinci: cpufreq: fix compiler warning (update to v3.3-rc7) Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | ARM: OMAP: id: Add missing break statement in omap3xxx_check_revisionVaibhav Hiremath2012-02-291-0/+1
| |/ | | | | | | | | | | | | | | | | | | | | | | | | Add missing break statement in the function omap3xxx_check_revision. The commit id 4390f5b2cb1f56 [ARM: OMAP: TI814X: Add cpu type macros and detection support], removed the 'break' statement from the function omap3xxx_check_revision(), resulting into wrong omap/cpu_revision initialization for AM335x devices. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> [tony@atomide.com: refreshed to apply after changes to cpu_rev] Signed-off-by: Tony Lindgren <tony@atomide.com>
* | ARM: OMAP2+: id: Add am33xx SoC type detectionAfzal Mohammed2012-03-051-0/+2
|/ | | | | | | | | | | | | Determine SoC type, i.e. whether GP or HS Note: cpu_is_34xx() is true for am33xx also. Doing cpu_is_am33xx() check after cpu_is_34xx() will not achieve what we want due to the above reason. Hence cpu_is_am33xx() is done before cpu_is_34xx() Signed-off-by: Afzal Mohammed <afzal@ti.com> Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: OMAP: TI814X: Add cpu type macros and detection supportHemant Pedanekar2011-12-131-0/+21
| | | | | | | | This patch adds cpu type, macros for identification of TI814X device. Signed-off-by: Hemant Pedanekar <hemantp@ti.com> [tony@atomide.com: left out CK_TI814X for now] Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: OMAP: TI81XX: Prepare for addition of TI814X supportHemant Pedanekar2011-12-131-4/+4
| | | | | | | | | | | | | | | | | This patch updates existing macros, functions used for TI816X, to enable addition of other SoCs belonging to TI81XX family (e.g., TI814X). The approach taken is to use TI81XX/ti81xx for code/data going to be common across all TI81XX devices. cpu_is_ti81xx() is introduced to handle code common across TI81XX devices. In addition, ti8168_evm_map_io() is now replaced with ti81xx_map_io() and moved in mach-omap2/common.c as same will be used for TI814X and is not board specific. Signed-off-by: Hemant Pedanekar <hemantp@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: OMAP: ID: Chip detection for OMAP4470Leonid Iziumtsev2011-12-131-1/+9
| | | | | | | | | | Add support for detection of the next chip in the OMAP4 family: OMAP4470 ES1.0 For more details on OMAP4470, visit: http://focus.ti.com/general/docs/wtbu/wtbuproductcontent.tsp?templateId=6123&navigationId=12869&contentId=123362 Signed-off-by: Leonid Iziumtsev <x0153368@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: OMAP: id: add chip id recognition for omap4430 es2.3David Anders2011-12-131-2/+5
| | | | | | | | | | | | | | | allow for the omap4430 es2.3 revision to be recognized in the omap4_check_revision() function. most aspects of all omap4430 es2.x versions are identical, however a number of small variations such as default pullup or pulldown resistor configurations vary between revisions. detailed information on silicon errata for omap4430 revisions can be found at http://focus.ti.com/pdfs/wtbu/swpz009D.pdf Signed-off-by: David Anders <x0132446@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: OMAP: am33xx: Update common OMAP machine specific sourcesAfzal Mohammed2011-12-131-0/+6
| | | | | | | | | | | | | This patch updates the common machine specific source files for support for AM33XX/AM335x with cpu type, macros for identification of AM33XX/AM335X device. Signed-off-by: Afzal Mohammed <afzal@ti.com> Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Tested-by: Kevin Hilman <khilman@ti.com> [tony@atomide.com: updated for map_io and common.h changes, dropped CK_AM33XX] Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: 7159/1: OMAP: Introduce local common.h filesTony Lindgren2011-11-171-1/+1
| | | | | | | | | | | As suggested by Russell King - ARM Linux <linux@arm.linux.org.uk>, there's no need to keep local prototypes in non-local headers. Add mach-omap1/common.h and mach-omap2/common.h and move the local prototypes there from plat/common.h and mach/omap4-common.h. Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* Merge branch 'for_3.2/pm-cleanup-2' of ↵Tony Lindgren2011-11-041-1/+4
|\ | | | | | | git://github.com/khilman/linux-omap-pm into fixes
| * ARM: OMAP3: PM: fix I/O wakeup and I/O chain clock control detectionPaul Walmsley2011-10-071-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The way that we detect which OMAP3 chips support I/O wakeup and software I/O chain clock control is broken. Currently, I/O wakeup is marked as present for all OMAP3 SoCs other than the AM3505/3517. The TI81xx family of SoCs are at present considered to be OMAP3 SoCs, but don't support I/O wakeup. To resolve this, convert the existing blacklist approach to an explicit, whitelist support, in which only SoCs which are known to support I/O wakeup are listed. (At present, this only includes OMAP34xx, OMAP3503, OMAP3515, OMAP3525, OMAP3530, and OMAP36xx.) Also, the current code incorrectly detects the presence of a software-controllable I/O chain clock on several chips that don't support it. This results in writes to reserved bitfields, unnecessary delays, and console messages on kernels running on those chips: http://www.spinics.net/lists/linux-omap/msg58735.html Convert this test to a feature test with a chip-by-chip whitelist. Thanks to Dave Hylands <dhylands@gmail.com> for reporting this problem and doing some testing to help isolate the cause. Thanks to Steve Sakoman <sakoman@gmail.com> for catching a bug in the first version of this patch. Thanks to Russell King <linux@arm.linux.org.uk> for comments. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Dave Hylands <dhylands@gmail.com> Cc: Steve Sakoman <sakoman@gmail.com> Tested-by: Steve Sakoman <sakoman@gmail.com> Cc: Russell King - ARM Linux <linux@arm.linux.org.uk> Signed-off-by: Kevin Hilman <khilman@ti.com>
* | OMAP: id: remove OMAP_CHIP declarations, codePaul Walmsley2011-09-141-55/+0
| | | | | | | | | | | | | | | | | | | | Now that all of the users of the OMAP_CHIP bitfield code have been converted to use lists, the OMAP_CHIP code, data, and declarations can be removed. Signed-off-by: Paul Walmsley <paul@pwsan.com>
* | OMAP3: id: remove duplicate code for testing SoC ES levelPaul Walmsley2011-09-141-57/+23
| | | | | | | | | | | | | | | | | | | | | | | | omap3_cpuinfo() contains essentially duplicated code from omap3_check_revision(), just for the purpose of determining the chip ES level. Set the cpu_rev char array pointer in omap3_check_revision() instead, and drop the now-useless code from omap3_cpuinfo(). Signed-off-by: Paul Walmsley <paul@pwsan.com> Tested-by: Igor Grinberg <grinberg@compulab.co.il> Tested-by: Abhilash Koyamangalath <abhilash.kv@ti.com>
* | OMAP3: id: add fallthrough warning; fix some CodingStyle issuesPaul Walmsley2011-09-141-5/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Emit a warning to the console in omap3_check_revision() if that code cannot determine what type of SoC the system is currently running on. Remove some extra whitespace, remove some duplicate code, and add an appropriate comment to a fallthrough case. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Hemant Pedanekar <hemantp@ti.com> Tested-by: Igor Grinberg <grinberg@compulab.co.il> Tested-by: Abhilash Koyamangalath <abhilash.kv@ti.com>
* | OMAP3: id: use explicit omap_revision codes for 3505/3517 ES levelsPaul Walmsley2011-09-141-1/+9
| | | | | | | | | | | | | | | | | | | | | | Use explicit revision codes for OMAP/AM 3505/3517 ES levels, as the rest of the OMAP2+ SoCs do in mach-omap2/cpu.c. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Sanjeev Premi <premi@ti.com> Tested-by: Igor Grinberg <grinberg@compulab.co.il> Tested-by: Abhilash Koyamangalath <abhilash.kv@ti.com>
* | OMAP3: id: remove useless strcpy()sPaul Walmsley2011-09-141-26/+22
| | | | | | | | | | | | | | | | | | omap3_cpuinfo() is filled with useless strcpy() calls; remove them. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Sanjeev Premi <premi@ti.com> Tested-by: Igor Grinberg <grinberg@compulab.co.il> Tested-by: Abhilash Koyamangalath <abhilash.kv@ti.com>
* | OMAP3: id: remove identification codes that only correspond to marketing namesPaul Walmsley2011-09-131-12/+7
|/ | | | | | | | | | | | | | | | | | | | | | | | | The OMAP3505/AM3505 appears to be based on the same silicon as the OMAP3517/AM3517, with some features disabled via eFuse bits. Follow the same practice as OMAP3430 and identify these devices internally as part of the OMAP3517/AM3517 family. The OMAP3503/3515/3525/3530 chips appear to be based on the same silicon as the OMAP3430, with some features disabled via eFuse bits. Identify these devices internally as part of the OMAP3430 family. Remove the old OMAP35XX_CLASS, which actually covered two very different chip families. The OMAP3503/3515/3525/3530 chips will now be covered by OMAP343X_CLASS, since the silicon appears to be identical. For the OMAP3517/AM3517 family, create a new class, OMAP3517_CLASS. Thanks to Tony Lindgren <tony@atomide.com> for some help with the second revision of this patch. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Sanjeev Premi <premi@ti.com> Cc: Tony Lindgren <tony@atomide.com> Tested-by: Igor Grinberg <grinberg@compulab.co.il> Tested-by: Abhilash Koyamangalath <abhilash.kv@ti.com>
* OMAP4: ID: add omap_has_feature for max freq supportedAneesh V2011-07-081-7/+33
| | | | | | | | | | | | | | Macros for identifying the max frequency supported by various OMAP4 variants - Expanding along the lines of OMAP3's feature handling. [nm@ti.com: minor fixes for checks that should only for 443x|446x] Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Rajendra Nayak <rnayak@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Reviewed-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* OMAP: ID: introduce chip detection for OMAP4460Aneesh V2011-07-081-2/+11
| | | | | | | | | | | | | | | | | | | | | | | Add support for detecting the latest in the OMAP4 family: OMAP4460 Among other changes, the new chip also can support 1.5GHz A9s, 1080p stereoscopic 3D and 12 MP stereo (dual camera). In addition, we have changes to OPPs supported, clock tree etc, hence having a chip detection is required. For more details on OMAP4460, see Highlights: http://focus.ti.com/general/docs/wtbu/wtbuproductcontent.tsp?contentId=53243&navigationId=12843&templateId=6123 Public TRM is available here as usual: http://focus.ti.com/general/docs/wtbu/wtbudocumentcenter.tsp?templateId=6123&navigationId=12667 [nm@ti.com: cleanups and introduction of ramp system] Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Rajendra Nayak <rnayak@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Reviewed-by: Paul Walmsley <paul@pwsan.com> [tony@atomide.com: updated to not use CHIP_IS_OMAP44XX] Signed-off-by: Tony Lindgren <tony@atomide.com>
* OMAP2+: Common CPU DIE ID reading code reads wrong registers for OMAP4430Andy Green2011-03-141-0/+13
| | | | | | | | | This adapts the register offsets used to read the CPU DIE ID registers when run on 44XX so they match what is in the OMAP4430 Reference Manual page 269 Signed-off-by: Andy Green <andy.green@linaro.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
* omap: Add chip id recognition for OMAP4 ES2.1 and ES2.2Nishant Kamat2011-02-171-11/+20
| | | | | | | | | | | | | | | | | | | | | | | Allow OMAP4 ES2.1 and ES2.2 revisions to be recognized in the omap4_check_revision() function. Mainly, ES2.1 has fixes that allow LPDDR to be used at 100% OPP (400MHz). ES2.2 additionally has a couple of power management fixes (to reduce leakage), an I2C1 SDA line state fix, and a floating point write corruption fix (cortex erratum). Even though the current mainline support doesn't need to distinguish between ES2.X versions, it's still useful to know the correct silicon rev when issues are reported. Moreover, these id checks can be used by power management code that selects suitable OPPs considering the memory speed limitation on ES2.0. For details about the silicon errata on OMAP4430, refer http://focus.ti.com/pdfs/wtbu/SWPZ009A_OMAP4430_Errata_Public_vA.pdf Signed-off-by: Nishant Kamat <nskamat@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* TI816X: Update common OMAP machine specific sourcesHemant Pedanekar2011-02-161-2/+31
| | | | | | | | | This patch updates the common machine specific source files with support for TI816X. Signed-off-by: Hemant Pedanekar <hemantp@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* OMAP: control: move plat-omap/control.h to mach-omap2/control.hPaul Walmsley2010-10-081-1/+2
| | | | | | | | | | | | | | | | | Only OMAP2+ platforms have the System Control Module (SCM) IP block. In the past, we've kept the SCM header file in plat-omap. This has led to abuse - device drivers including it; includes being added that create implicit dependencies on OMAP2+ builds; etc. In response, move the SCM headers into mach-omap2/. As part of this, remove the direct SCM access from the OMAP UDC driver. It was clearly broken. The UDC code needs an indepth review for use on OMAP2+ chips. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Cory Maccarrone <darkstar6262@gmail.com> Cc: Kyungmin Park <kyungmin.park@samsung.com>
* omap2/3: Update revision identificationSanjeev Premi2010-10-011-24/+48
| | | | | | | | | | | | The existing definitions for cpu revision used upper nibble in the bits[15:08]. With OMAP3630, definitions use lower nibble. This patch unifies the definitions to start at lower nibble. Signed-off-by: Sanjeev Premi <premi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* Merge branch 'omap4_and_sdrc_2.6.27' of git://git.pwsan.com/linux-2.6 into ↵Tony Lindgren2010-09-271-1/+1
|\ | | | | | | omap-for-linus
| * omap4: control: Fix the control module register accessesSantosh Shilimkar2010-09-271-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch has multiple fixes together. To ensure that git bisect work across commits, all changes are clubbed together 1. Move the common control base address to control core 2. Remove the manually coeded defines and use the ones from headers. 3. Fix the the status register define in id.c for OMAP4 4. Fix all the register define in hsmmc.c 5. Use the control pad accessor API for omap4 hsmmc register accesses Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
* | omap4: Update id.c and cpu.h for es2.0Santosh Shilimkar2010-09-241-7/+31
|/ | | | | | | | | This patch updates the id.c and cpu.h files to support omap4 ES2.0 silicon detection. Few initial omap4 es2 samples IDCODE is same as es1. So the patch uses ARM cpuid register to detect the ES version for such samples Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
* omap3: id: fix 3630 rev detectionNishanth Menon2010-08-161-1/+1
| | | | | | | | | | | | | | | | Wrong placement of break causes all revisions of 3630 to be detected as 3630 es1.2, we need to break main loop if we have an identified chip, default falls through as in the rest of the switches in this function. Cc: Paul Walmsley <paul@pwsan.com> Cc: Sanjeev Premi <premi@ti.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Manjunath K <manjugk@ti.com> Cc: Anand Gadiyar <gadiyar@ti.com> Cc: Felipe Balbi <felipe.balbi@nokia.com> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* OMAP3630: Add ES1.1 and ES1.2 detectionAnand Gadiyar2010-08-041-3/+25
| | | | | | | | | | | | | | | | | | Add revision detection for ES1.1 and ES1.2. Set default revision as ES1.2. Add CHIP_GE_OMAP3630ES1_1 to detect revisions 1.1 and later. This is needed for at least one feature that is broken in 3630ES1.0 but exists on older (3430 ES3.1) and newer revisions. Additionally, update some of the CHIP_GE_* macros to use other macros for ease of maintenance. Signed-off-by: Anand Gadiyar <gadiyar@ti.com> Cc: Nishanth Menon <nm@ti.com> Cc: Manjunatha GK <manjugk@ti.com> [tony@atomide.com: update to remove fallthrough handling] Signed-off-by: Tony Lindgren <tony@atomide.com>
* omap: Use omap_get_die_id() to get the DIE idsKan-Ru Chen2010-08-021-8/+6
| | | | | Signed-off-by: Kan-Ru Chen <kanru@0xlab.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
* omap: Add new interface omap_get_die_idKan-Ru Chen2010-08-021-0/+10
| | | | | | | Allow DIE id to be get and used by others. Signed-off-by: Kan-Ru Chen <kanru@0xlab.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
* OMAP3: AM3505/3517 do not have IO wakeup capabilitystanley.miao2010-08-021-0/+2
| | | | | | | | | | | | AM3505/3517 doesn't have IO wakeup capability, so we do not need to set the bit OMAP3430_EN_IO and the bit OMAP3430_EN_IO_CHAIN in the register PM_WKEN_WKUP when the system enters suspend state. Tested on AM3517EVM and OMAP3530EVM. Signed-off-by: Stanley.Miao <stanley.miao@windriver.com> Acked-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* omap2/3: id: fix sparse warningNishanth Menon2010-08-021-5/+5
| | | | | | | | | | | | | | | | | | | | | omap24xx_check_revision, omap3_check_features, omap3_check_revision, omap4_check_revision, omap3_cpuinfo are not used elsewhere, it should be static Also fixes the following sparse warnings: arch/arm/mach-omap2/id.c:105:13: warning: symbol 'omap24xx_check_revision' was not declared. Should it be static? arch/arm/mach-omap2/id.c:167:13: warning: symbol 'omap3_check_features' was not declared. Should it be static? arch/arm/mach-omap2/id.c:189:13: warning: symbol 'omap3_check_revision' was not declared. Should it be static? arch/arm/mach-omap2/id.c:270:13: warning: symbol 'omap4_check_revision' was not declared. Should it be static? arch/arm/mach-omap2/id.c:300:13: warning: symbol 'omap3_cpuinfo' was not declared. Should it be static? Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* Merge branch 'for_2.6.34_b' of git://git.pwsan.com/linux-2.6 into omap-for-linusTony Lindgren2010-02-241-0/+3
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| * OMAP3 clock: add support for 192Mhz DPLL4M2 outputVishwanath BS2010-02-241-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In 3630, DPLL4M2 output can be 96MHz or 192MHz (for SGX to run at 192). This patch has changes to support this feature. 96MHz clock is generated by dividing 192Mhz clock by 2 using CM_CLKSEL_CORE register. SGX can select Core Clock, 192MHz clock or CM_96M_FCLK as it's functional clock. In summary changes done are: 1. Added a feature called omap3_has_192mhz_clk and enabled for 3630 2. Added a new clock node called omap_192m_alwon_ck 3. Made omap_96m_alwon_fck to derive its clock from omap_192m_alwon_ck Signed-off-by: Vishwanath BS <Vishwanath.bs@ti.com> [paul@pwsan.com: fixed whitespace] Signed-off-by: Paul Walmsley <paul@pwsan.com>
* | omap4: Fix omap_type() for omap4Santosh Shilimkar2010-02-231-0/+2
|/ | | | | | | | | | This patch fixes the omap_type function to detect whether the device is GP or HS Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@deeprootsystems.com> Reviewed-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: OMAP4: PM: OMAP4 essential basic initialisations.Abhijit Pagare2010-01-261-0/+1
| | | | | | | | | | | | | Some of the OMAP4 specific chip level initialisations are taken care of. Signed-off-by: Abhijit Pagare <abhijitpagare@ti.com> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Rajendra Nayak <rnayak@ti.com> Cc: Tony Lindgren <tony@atomide.com> [paul@pwsan.com: updated to use '4430ES1' rather than simply '4430'; updated to apply after the intervening cpu.h/id.c patch; thanks also to Tony for catching a bug in my rewrite] Signed-off-by: Paul Walmsley <paul@pwsan.com>
* omap3: Fix cpu detectionTony Lindgren2010-01-191-18/+23
| | | | | | | | | | | | | | | | We need to set the omap_chip.oc carefully for the clocks to work. To fix this, set the omap_chip.oc in omap3_check_features() based on the CONTROL_IDCODE and silicon revision registers. Also add handling for 34xx es3.1.2 as es3.1 for now. Fixes booting on at least overo board. Based on an earlier patch by Paul Walmsley <paul@pwsan.com>. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* omap3: id code detection 3525 vs 3515Sergey Lapin2009-12-111-2/+2
| | | | | | | | | The runtime detection of OMAP3515 and OMAP3525 was reversed. Signed-off-by: Sergey Lapin <slapin@ossfans.org> Signed-off-by: Sanjeev Premi <premi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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