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* memory: gpmc: Move omap gpmc code to live under driversTony Lindgren2014-11-281-2094/+0
| | | | | | | | | | | | Just move to drivers as further clean-up can now happen there finally. Let's also add Roger and me to the MAINTAINERS so we get notified for any patches related to GPMC. Cc: Arnd Bergmann <arnd@arndb.de> Acked-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: OMAP2+: Move GPMC initcall to devices.cTony Lindgren2014-11-281-30/+1
| | | | | | | | | | | | | | | | | This will us allow to just move gpmc.c to live under drivers in the next patch. Note that we now also remove the omap specific check for the initcall. That's OK as gpmc_probe() checks for the pdata and bails out for other platforms compiled in. Also the postcore_initcall() maybe possible to change to just regular module_init(), but let's do that in separate patch after the move to drivers is done. Cc: Arnd Bergmann <arnd@arndb.de> Acked-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: OMAP2+: Prepare to move GPMC to drivers by platform data headerTony Lindgren2014-11-201-5/+58
| | | | | | | | | | | | | | | | | | We still need to support platform data for omap3 until it's booting in device tree only mode. So let's add platform_data/omap-gpmc.h for that, and a minimal linux/omap-gpmc.h for the save and restore used by the PM code. Let's also keep a minimal mach-omap2/gpmc.h still around to avoid churn on the board-*.c files. Once omap3 boots in device tree only mode, we can drop mach-omap2/gpmc.h and we can make the data structures in platform_data/omap-gpmc.h private to the GPMC driver. Note that we can now also remove gpmc-nand.h and gpmc-onenand.h. Cc: Arnd Bergmann <arnd@arndb.de> Acked-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: OMAP2+: Remove unnecesary include in GPMC driverJavier Martinez Canillas2014-11-061-1/+0
| | | | | | | | The GPMC driver includes arch/arm/mach-omap2/common.h but does not use anything on that header so it can be removed. Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: Tony Lindgren <tony@atomide.com>
* Merge branch 'for-v3.19/gpmc-omap' of github.com:rogerq/linux into ↵Tony Lindgren2014-11-031-33/+54
|\ | | | | | | | | | | | | omap-for-v3.19/gpmc Conflicts: arch/arm/mach-omap2/gpmc.c
| * ARM: OMAP2+: gpmc: Sanity check GPMC fck on probeRoger Quadros2014-10-301-8/+7
| | | | | | | | | | | | | | | | | | | | | | | | This prevents potential division by zero errors if GPMC fck turns out to be zero due to faulty clock data. Use resource managed clk_get() API. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
| * ARM: OMAP2+: gpmc: Keep Chip Select disabled while configuring itRoger Quadros2014-10-301-7/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | As per the OMAP reference manual [1], the Chip Select must be disabled (i.e. CSVALID is 0) while configuring any of the Chip select parameters. [1] - 10.1.5.1 Chip-Select Base Address and Region Size Configuration http://www.ti.com/lit/pdf/swpu177 Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
| * ARM: OMAP2+: gpmc: Always enable A26-A11 for non NAND devicesRoger Quadros2014-10-301-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | Although RESET state of LIMITEDADDRESS bit in GPMC_CONFIG register is 0 (i.e. A26-A11 enabled), faulty bootloaders might accidentally set this bit. e.g. u-boot 2014.07 with CONFIG_NOR disabled. Explicity disable LIMITEDADDRESS bit for non NAND devices so that they can always work. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
| * ARM: OMAP2+: gpmc: Error out if timings fail in gpmc_probe_generic_child()Roger Quadros2014-10-301-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | gpmc_cs_set_timings() returns non-zero if there was an error while setting the GPMC timings. e.g. Timing was too large to be accomodated with current GPMC clock frequency and available timing range. Fail in this case, else we risk operating a NOR device with non compliant timings. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
| * ARM: OMAP2+: gpmc: Print error message in set_gpmc_timing_reg()Roger Quadros2014-10-301-17/+6
| | | | | | | | | | | | | | | | | | | | | | | | Simplify set_gpmc_timing_reg() and always print error message if the requested timing cannot be achieved due to a too fast GPMC functional clock, irrespective if whether DEBUG is defined or not. This should help us debug timing configuration issues, which were otherwise simply not being displayed in the kernel log. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
* | ARM: OMAP2+: Require proper GPMC timings for devicesTony Lindgren2014-11-031-16/+0
| | | | | | | | | | | | | | | | | | | | Now that we have timings in the .dts files for smc91x and 8250, we can remove the device specific checks and just print out the bootloader timings for devices that may not have timings in the .dts files. Acked-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | ARM: OMAP2+: Show bootloader GPMC timings to allow configuring the .dts fileTony Lindgren2014-11-031-3/+141
| | | | | | | | | | | | | | | | | | | | | | | | | | As we still have some devices with GPMC timings missing from the .dts files, let's make it a bit easier to use the bootloader values and print them out. Note that we now need to move the parsing of the device tree provided configuration a bit earlier so we can use that for checking if anything was configured. Acked-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | ARM: OMAP2+: Fix support for multiple devices on a GPMC chip selectTony Lindgren2014-11-031-12/+49
|/ | | | | | | | | | | | | | | | | | | | There are cases where we have multiple device instances connected to a single GPMC chip select. For example, there are four UARTs on the Zoom debug boards that all share a single chip select and a GPIO interrupt. We do have support for this already in theory, but it's broken because we're bailing out if the chip select is already taken. To be able to provide checks on the chip select usage, let's add new struct gpmc_cs_data so we can start using already registered device names for checks. Later on we probably want to start using struct gpmc_cs_data as a wrapper for all the GPMC chipselect related data. Acked-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* Merge tag 'for-linus-20141015' of git://git.infradead.org/linux-mtdLinus Torvalds2014-10-181-0/+2
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull MTD update from Brian Norris: "Sorry for delaying this a bit later than usual. There's one mild regression from 3.16 that was noticed during the 3.17 cycle, and I meant to send a fix for it along with this pull request. I'll probably try to queue it up for a later pull request once I've had a better look at it, hopefully by -rc2 at the latest. Summary for this pull: NAND - Cleanup for Denali driver - Atmel: add support for new page sizes - Atmel: fix up 'raw' mode support - Atmel: miscellaneous cleanups - New timing mode helpers for non-ONFI NAND - OMAP: allow driver to be (properly) built as a module - bcm47xx: RESET support and other cleanups SPI NOR - Miscellaneous cleanups, to prepare framework for wider use (some further work still pending) - Compile-time configuration to select 4K vs. 64K support for flash that support both (necessary for using UBIFS on some SPI NOR) A few scattered code quality fixes, detected by Coverity See the changesets for more" * tag 'for-linus-20141015' of git://git.infradead.org/linux-mtd: (59 commits) mtd: nand: omap: Correct CONFIG_MTD_NAND_OMAP_BCH help message mtd: nand: Force omap_elm to be built as a module if omap2_nand is a module mtd: move support for struct flash_platform_data into m25p80 mtd: spi-nor: add Kconfig option to disable 4K sectors mtd: nand: Move ELM driver and rename as omap_elm nand: omap2: Replace pr_err with dev_err nand: omap2: Remove horrible ifdefs to fix module probe mtd: nand: add Hynix's H27UCG8T2ATR-BC to nand_ids table mtd: nand: support ONFI timing mode retrieval for non-ONFI NANDs mtd: physmap_of: Add non-obsolete map_rom probe mtd: physmap_of: Fix ROM support via OF MAINTAINERS: add l2-mtd.git, 'next' tree for MTD mtd: denali: fix indents and other trivial things mtd: denali: remove unnecessary parentheses mtd: denali: remove another set-but-unused variable mtd: denali: fix include guard and license block of denali.h mtd: nand: don't break long print messages mtd: bcm47xxnflash: replace some magic numbers mtd: bcm47xxnflash: NAND_CMD_RESET support mtd: bcm47xxnflash: add cmd_ctrl handler ...
| * nand: omap2: Add support for flash-based bad block tableEzequiel García2014-09-171-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit adds a new platform-data boolean property that enables use of a flash-based bad block table. This can also be enabled by setting the 'nand-on-flash-bbt' devicetree property. If the flash BBT is not enabled, the driver falls back to use OOB bad block markers only, as before. If the flash BBT is enabled the kernel will keep track of bad blocks using a BBT, in addition to the OOB markers. As explained by Brian Norris the reasons for using a BBT are: "" The primary reason would be that NAND datasheets specify it these days. A better argument is that nobody guarantees that you can write a bad block marker to a worn out block; you may just get program failures. This has been acknowledged by several developers over the last several years. Additionally, you get a boot-time performance improvement if you only have to read a few pages, instead of a page or two from every block on the flash. "" Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Acked-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | Merge tag 'fixes-nc-for-linus' of ↵Linus Torvalds2014-10-081-1/+1
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC non-critical bug fixes from Arnd Bergmann: "These are bug fixes for harmless problems that were not important enough to get fixed in 3.17. The majority of these are OMAP specific, but there are also a couple for Marvell mvebu, cns3xxx, and others, as well as some updates for the MAINTAINERS file. In particular, Robert Jarzmik and Daniel Mack now volunteered to help out maintaining the PXA platform, Krzysztof Halasa took over the cns3xxx platform, Carlo Caione is the maintainer for the new Amlogic meson platform, and Matthias Brugger is now listed for the mediatek platform he recently contributed" * tag 'fixes-nc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (42 commits) MAINTAINERS: update Shawn's email address MAINTAINERS: condense some Tegra related entries MAINTAINERS: add Alexandre Courbot for Tegra MAINTAINERS: CNS3xxx and IXP4xx update. MAINTAINERS: Add maintainers entry for Mediatek SoCs arm, vt8500, LLVMLlinux: Use mcr instead of mcr% for mach-vt8500 MAINTAINERS: add a third maintainer to mach-bcm CNS3xxx: Fix PCIe read size limit. CNS3xxx: Fix logical PCIe topology. CNS3xxx: Fix debug UART. MAINTAINERS: Add entry for the Amlogic MesonX SoCs MAINTAINERS: update ARM pxa maintainers ARM: at91/PMC: don't forget to write PMC_PCDR register to disable clocks ARM: at91: fix at91sam9263ek DT mmc pinmuxing settings ARM: mvebu: Netgear RN102: Use Hardware BCH ECC ARM: Kirkwood: Fix DT based DSA. ARM: OMAP2+: make of_device_ids const ARM: omap2: make arrays containing machine compatible strings const ARM: LPC32xx: Fix reset function ARM: mvebu: Netgear RN2120: Use Hardware BCH ECC ...
| * ARM: OMAP2+: make of_device_ids constUwe Kleine-König2014-09-111-1/+1
| | | | | | | | | | | | | | | | | | | | of_device_ids (i.e. compatible strings and the respective data) are not supposed to change at runtime. All functions working with of_device_ids provided by <linux/of.h> work with const of_device_ids. So mark the non-const function parameters and structs for OMAP2+ as const, too. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | ARM: OMAP2+: gpmc: Don't complain if wait pin is used without r/w monitoringRoger Quadros2014-09-041-4/+3
|/ | | | | | | | | | | | | | | | For NAND read & write wait pin monitoring must be kept disabled as the wait pin is only used to indicate NAND device ready status and not to extend each read/write cycle. So don't print a warning if wait pin is specified while read/write monitoring is not in the device tree. Sanity check wait pin number irrespective if read/write monitoring is set or not. Signed-off-by: Roger Quadros <rogerq@ti.com> Reviewed-by: Pekon Gupta <pekon@pek-sem.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: OMAP2+: GPMC: Support Software ECC scheme via DTRoger Quadros2014-08-251-2/+5
| | | | | | | | | | | | | | | For v3.14 and prior, 1-bit Hamming code ECC via software was the default choice for some boards e.g. 3430sdp. Commit ac65caf514ec in v3.15 changed the behaviour to use 1-bit Hamming code via Hardware using a different ECC layout i.e. (ROM code layout) than what is used by software ECC. This ECC layout change causes NAND filesystems created in v3.14 and prior to be unusable in v3.15 and later. So don't mark "sw" scheme as deperecated and support it. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: OMAP2+: Make GPMC skip disabled devicesGuido Martínez2014-07-071-1/+1
| | | | | | | | | | | | | Currently, child nodes of the gpmc node are iterated and probed regardless of their 'status' property. This means adding 'status = "disabled";' has no effect. This patch changes the iteration to only probe nodes marked as available. Signed-off-by: Guido Martínez <guido@vanguardiasur.com.ar> Tested-by: Pekon Gupta <pekon@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* Merge tag 'for-linus-20140610' of git://git.infradead.org/linux-mtdLinus Torvalds2014-06-111-0/+15
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull MTD updates from Brian Norris: - refactor m25p80.c driver for use as a general SPI NOR framework for other drivers which may speak to SPI NOR flash without providing full SPI support (i.e., not part of drivers/spi/) - new Freescale QuadSPI driver (utilizing new SPI NOR framework) - updates for the STMicro "FSM" SPI NOR driver - fix sync/flush behavior on mtd_blkdevs - fixup subpage write support on a few NAND drivers - correct the MTD OOB test for odd-sized OOB areas - add BCH-16 support for OMAP NAND - fix warnings and trivial refactoring - utilize new ECC DT bindings in pxa3xx NAND driver - new LPDDR NVM driver - address a few assorted bugs caught by Coverity - add new imx6sx support for GPMI NAND - use a bounce buffer for NAND when non-DMA-able buffers are used * tag 'for-linus-20140610' of git://git.infradead.org/linux-mtd: (77 commits) mtd: gpmi: add gpmi support for imx6sx mtd: maps: remove check for CONFIG_MTD_SUPERH_RESERVE mtd: bf5xx_nand: use the managed version of kzalloc mtd: pxa3xx_nand: make the driver work on big-endian systems mtd: nand: omap: fix omap_calculate_ecc_bch() for-loop error mtd: nand: r852: correct write_buf loop bounds mtd: nand_bbt: handle error case for nand_create_badblock_pattern() mtd: nand_bbt: remove unused variable mtd: maps: sc520cdp: fix warnings mtd: slram: fix unused variable warning mtd: pfow: remove unused variable mtd: lpddr: fix Kconfig dependency, for I/O accessors mtd: nand: pxa3xx: Add supported ECC strength and step size to the DT binding mtd: nand: pxa3xx: Use ECC strength and step size devicetree binding mtd: nand: pxa3xx: Clean pxa_ecc_init() error handling mtd: nand: Warn the user if the selected ECC strength is too weak mtd: nand: omap: Documentation: How to select correct ECC scheme for your device ? mtd: nand: omap: add support for BCH16_ECC - NAND driver updates mtd: nand: omap: add support for BCH16_ECC - ELM driver updates mtd: nand: omap: add support for BCH16_ECC - GPMC driver updates ...
| * mtd: nand: omap: add support for BCH16_ECC - GPMC driver updatespekon gupta2014-05-201-0/+15
| | | | | | | | | | | | | | | | | | | | This patch add support for BCH16_ECC in GPMC (controller) driver: - extends configuration space to include BCH16 registers - extends parsing of DT binding for selecting BCH16 ecc-scheme Signed-off-by: Pekon Gupta <pekon@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | ARM: OMAP2+: raw read and write endian fixVictor Kamensky2014-05-081-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All OMAP IP blocks expect LE data, but CPU may operate in BE mode. Need to use endian neutral functions to read/write h/w registers. I.e instead of __raw_read[lw] and __raw_write[lw] functions code need to use read[lw]_relaxed and write[lw]_relaxed functions. If the first simply reads/writes register, the second will byteswap it if host operates in BE mode. Changes are trivial sed like replacement of __raw_xxx functions with xxx_relaxed variant. Signed-off-by: Victor Kamensky <victor.kamensky@linaro.org> Signed-off-by: Taras Kondratiuk <taras.kondratiuk@linaro.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | ARM: OMAP2+: Fix GPMC remap for devices using an offsetTony Lindgren2014-04-231-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At least the smc91x driver expects the device to be at 0x300 offset from bus base address. This does not work currently for GPMC when booted in device tree mode as it attempts to remap the the allocated GPMC partition to the address configured by the device tree plus the device offset. Note that this works just fine when booted with legacy mode. Let's fix the issue by just ignoring any device specific offset while remapping. And let's make sure the remap address confirms to the GPMC 16MB minimum granularity as listed in the TRM for GPMC_CONFIG7 BASEADDRESS bits. Otherwise we can get something like this: omap-gpmc 6e000000.gpmc: cannot remap GPMC CS 1 to 0x01000300 Cc: Pekon Gupta <pekon@ti.com> Reviewed-by: Javier Martinez Canillas <javier@dowhile0.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | ARM: OMAP2+: Fix oops for GPMC freeTony Lindgren2014-04-211-2/+5
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If gpmc_cs_remap() fails we will get an error because we are calling release_resource() on an uninitialized resource. Let's fix that by checking the resource flags. And while at it, let's also make gpmc_cs_delete_mem() use the res pointer that we already have to avoid confusion. Without this patch we can get the following error: omap-gpmc 6e000000.gpmc: cannot remap GPMC CS 1 to 0x01000300 Unable to handle kernel NULL pointer dereference at virtual address 00000018 ... (gpmc_cs_free+0x94/0xc8) (gpmc_probe_generic_child+0x178/0x1ec) (gpmc_probe_dt+0x1bc/0x2cc) (gpmc_probe+0x250/0x44c) (platform_drv_probe+0x3c/0x6c) (really_probe+0x74/0x208) (driver_probe_device+0x34/0x50) (bus_for_each_drv+0x60/0x8c) (device_attach+0x80/0xa4) (bus_probe_device+0x88/0xb0) (device_add+0x320/0x450) (of_platform_device_create_pdata+0x80/0x9c) (of_platform_bus_create+0xd0/0x170) (of_platform_bus_create+0x12c/0x170) (of_platform_populate+0x60/0x98) (pdata_quirks_init+0x30/0x48) (customize_machine+0x20/0x48) (do_one_initcall+0x2c/0x14c) (do_basic_setup+0x98/0xd8) (kernel_init_freeable+0x12c/0x1e0) (kernel_init+0x8/0xf0) (ret_from_fork+0x14/0x2c) Code: e1a04000 e59f0070 eb195136 e5942010 (e5923018) Cc: Pekon Gupta <pekon@ti.com> Reviewed-by: Javier Martinez Canillas <javier@dowhile0.org> Signed-off-by: tony Lindgren <tony@atomide.com>
* ARM: OMAP2+: gpmc: fix: DT ONENAND child nodes not probed when MTD_ONENAND ↵Pekon Gupta2014-02-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | is built as module Fixes: commit 75d3625e0e86b2d8d77b4e9c6f685fd7ea0d5a96 ARM: OMAP2+: gpmc: add DT bindings for OneNAND OMAP SoC(s) depend on GPMC controller driver to parse GPMC DT child nodes and register them platform_device for ONENAND driver to probe later. However this does not happen if generic MTD_ONENAND framework is built as module (CONFIG_MTD_ONENAND=m). Therefore, when MTD/ONENAND and MTD/ONENAND/OMAP2 modules are loaded, they are unable to find any matching platform_device and remain un-binded. This causes on board ONENAND flash to remain un-detected. This patch causes GPMC controller to parse DT nodes when CONFIG_MTD_ONENAND=y || CONFIG_MTD_ONENAND=m CC: <stable@vger.kernel.org> # 3.9.x+ Signed-off-by: Pekon Gupta <pekon@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: OMAP2+: gpmc: fix: DT NAND child nodes not probed when MTD_NAND is ↵Pekon Gupta2014-02-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | built as module Fixes: commit bc6b1e7b86f5d8e4a6fc1c0189e64bba4077efe0 ARM: OMAP: gpmc: add DT bindings for GPMC timings and NAND OMAP SoC(s) depend on GPMC controller driver to parse GPMC DT child nodes and register them platform_device for NAND driver to probe later. However this does not happen if generic MTD_NAND framework is built as module (CONFIG_MTD_NAND=m). Therefore, when MTD/NAND and MTD/NAND/OMAP2 modules are loaded, they are unable to find any matching platform_device and remain un-binded. This causes on board NAND flash to remain un-detected. This patch causes GPMC controller to parse DT nodes when CONFIG_MTD_NAND=y || CONFIG_MTD_NAND=m CC: <stable@vger.kernel.org> # 3.9.x+ Signed-off-by: Pekon Gupta <pekon@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* Merge tag 'omap-for-v3.13/more-fixes-for-merge-window-take2' of ↵Olof Johansson2013-11-251-39/+19
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes From Tony Lindgren: Few more fixes for issues found booting older omaps using device tree. Also few randconfig build fixes and removal of some dead code for omap4 as it no longer has legacy platform data based booting support. * tag 'omap-for-v3.13/more-fixes-for-merge-window-take2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: OMAP2+: Remove legacy omap4_twl6030_hsmmc_init ARM: OMAP2+: Remove legacy mux code for display.c ARM: OMAP2+: Fix undefined reference to set_cntfreq gpio: twl4030: Fix passing of pdata in the device tree case gpio: twl4030: Fix regression for twl gpio output ARM: OMAP2+: More randconfig fixes for reconfigure_io_chain ARM: dts: Fix omap2 specific dtsi files by adding the missing entries ARM: OMAP2+: Fix GPMC and simplify bootloader timings for 8250 and smc91x i2c: omap: Fix missing device tree flags for omap2
| * ARM: OMAP2+: Fix GPMC and simplify bootloader timings for 8250 and smc91xTony Lindgren2013-11-151-39/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit f2bf0e72d000 (ARM: OMAP2+: Add minimal 8250 support for GPMC) added support for using bootloader timings for some devices. Turns out we can do the same by looking at the compatible flags of the child without adding a new function as smc91x has a similar issue as 8250 with the bootloader timings. And let's fix the 8250 naming, we should use the device type as the name like uart instead of 8250 for zoom dts file. Cc: "Benoît Cousson" <bcousson@baylibre.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | Merge tag 'for-linus-20131112' of git://git.infradead.org/linux-mtdLinus Torvalds2013-11-141-14/+34
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull MTD changes from Brian Norris: - Unify some compile-time differences so that we have fewer uses of #ifdef CONFIG_OF in atmel_nand - Other general cleanups (removing unused functions, options, variables, fields; use correct interfaces) - Fix BUG() for new odd-sized NAND, which report non-power-of-2 dimensions via ONFI - Miscellaneous driver fixes (SPI NOR flash; BCM47xx NAND flash; etc.) - Improve differentiation between SLC and MLC NAND -- this clarifies an ABI issue regarding the MTD "type" (in sysfs and in the MEMGETINFO ioctl), where the MTD_MLCNANDFLASH type was present but inconsistently used - Extend GPMI NAND to support multi-chip-select NAND for some platforms - Many improvements to the OMAP2/3 NAND driver, including an expanded DT binding to bring us closer to mainline support for some OMAP systems - Fix a deadlock in the error path of the Atmel NAND driver probe - Correct the error codes from MTD mmap() to conform to POSIX and the Linux Programmer's Manual. This is an acknowledged change in the MTD ABI, but I can't imagine somebody relying on the non-standard -ENOSYS error code specifically. Am I just being unimaginative? :) - Fix a few important GPMI NAND bugs (one regression from 3.12 and one long-standing race condition) - More? Read the log! * tag 'for-linus-20131112' of git://git.infradead.org/linux-mtd: (98 commits) mtd: gpmi: fix the NULL pointer mtd: gpmi: fix kernel BUG due to racing DMA operations mtd: mtdchar: return expected errors on mmap() call mtd: gpmi: only scan two chips for imx6 mtd: gpmi: Use devm_kzalloc() mtd: atmel_nand: fix bug driver will in a dead lock if no nand detected mtd: nand: use a local variable to simplify the nand_scan_tail mtd: nand: remove deprecated IRQF_DISABLED mtd: dataflash: Say if we find a device we don't support mtd: nand: omap: fix error return code in omap_nand_probe() mtd: nand_bbt: kill NAND_BBT_SCANALLPAGES mtd: m25p80: fixup device removal failure path mtd: mxc_nand: Include linux/of.h header mtd: remove duplicated include from mtdcore.c mtd: m25p80: add support for Macronix mx25l3255e mtd: nand: omap: remove selection of BCH ecc-scheme via KConfig mtd: nand: omap: updated devm_xx for all resource allocation and free calls mtd: nand: omap: use drivers/mtd/nand/nand_bch.c wrapper for BCH ECC instead of lib/bch.c mtd: nand: omap: clean-up ecc layout for BCH ecc schemes mtd: nand: omap2: clean-up BCHx_HW and BCHx_SW ECC configurations in device_probe ...
| * ARM: OMAP2+: cleaned-up DT support of various ECC schemesPekon Gupta2013-11-061-14/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | OMAP NAND driver support multiple ECC scheme, which can used in different flavours, depending on in-build Hardware engines present on SoC. This patch updates following in DT bindings related to sectionion of ecc-schemes - ti,elm-id: replaces elm_id (maintains backward compatibility) - ti,nand-ecc-opts: selection of h/w or s/w implementation of an ecc-scheme depends on ti,elm-id. (supported values ham1, bch4, and bch8) - maintain backward compatibility to deprecated DT bindings (sw, hw, hw-romcode) Below table shows different flavours of ecc-schemes supported by OMAP devices +---------------------------------------+---------------+---------------+ | ECC scheme |ECC calculation|Error detection| +---------------------------------------+---------------+---------------+ |OMAP_ECC_HAM1_CODE_HW |H/W (GPMC) |S/W | +---------------------------------------+---------------+---------------+ |OMAP_ECC_BCH8_CODE_HW_DETECTION_SW |H/W (GPMC) |S/W | |(requires CONFIG_MTD_NAND_ECC_BCH) | | | +---------------------------------------+---------------+---------------+ |OMAP_ECC_BCH8_CODE_HW |H/W (GPMC) |H/W (ELM) | |(requires CONFIG_MTD_NAND_OMAP_BCH && | | | | ti,elm-id in DT) | | | +---------------------------------------+---------------+---------------+ To optimize footprint of omap2-nand driver, selection of some ECC schemes also require enabling following Kconfigs, in addition to setting appropriate DT bindings - Kconfig:CONFIG_MTD_NAND_ECC_BCH error detection done in software - Kconfig:CONFIG_MTD_NAND_OMAP_BCH error detection done by h/w engine Signed-off-by: Pekon Gupta <pekon@ti.com> Reviewed-by: Felipe Balbi <balbi@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | ARM: OMAP2+: Add minimal 8250 support for GPMCTony Lindgren2013-10-111-0/+38
|/ | | | | | | | | | | Just initialize things using the bootloader timings like we've been doing for the legacy booting too. It should be possible to patch in the GPMC timings for the based on the TL16CP743C/TL16C754C manual at: http://www.ti.com/lit/ds/slls644g/slls644g.pdf Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: mach-omap2: gpmc: Fix warning when CONFIG_ARM_LPAE=yFabio Estevam2013-09-181-2/+2
| | | | | | | | | | | | | | When CONFIG_ARM_LPAE=y the following build warning is generated: arch/arm/mach-omap2/gpmc.c:1495:4: warning: format '%x' expects argument of type 'unsigned int', but argument 4 has type 'resource_size_t' [-Wformat] According to Documentation/printk-formats.txt '%pa' can be used to properly print 'resource_size_t'. Reported-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: OMAP2: use 'int' instead of 'unsigned' for variable 'gpmc_irq_start'Chen Gang2013-08-221-1/+1
| | | | | | | | | | | | | 'gpmc_irq_start' is mostly used as 'int', and for a variable, do not suggest to only use 'unsigned' as its type, so use 'int' instead of 'unsigned' for variable 'gpmc_irq_start'. Also it will fix the related issue (dummy the real world failure): arch/arm/mach-omap2/gpmc.c:728:2: warning: comparison of unsigned expression < 0 is always false [-Wtype-limits] Signed-off-by: Chen Gang <gang.chen@asianux.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: OMAP2+: Cocci spatch "ptr_ret.spatch"Thomas Meyer2013-07-041-1/+1
| | | | | | | | Cocci spatch "ptr_ret.spatch" Signed-off-by: Thomas Meyer <thomas@m3y3r.de> Acked-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: OMAP2+: gpmc: Low power transition supportavinash philip2013-06-181-2/+19
| | | | | | | | | | | | | GPMC is hardware controller for external memory interfaces. This patch adds suspend/resume support for GPMC driver. It also preserves GPMC register configurations across device low-power states in which GPMC hardware can be powered-off. gpmc_suspend()/gpmc_resume() are called by default by core PM framework as part of driver's runtime PM callbacks. Signed-off-by: Philip Avinash <avinashphilip@ti.com> Signed-off-by: Pekon Gupta <pekon@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: OMAP2+: gpmc: Converts GPMC driver to pm_runtime capableavinash philip2013-06-121-2/+6
| | | | | | | | Support for pm_runtime add to GPMC driver. Signed-off-by: Philip Avinash <avinashphilip@ti.com> Signed-off-by: Pekon Gupta <pekon@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: OMAP2+: gpmc: get number of useable GPMC chip-selects via DTGupta Pekon2013-06-121-9/+29
| | | | | | | | | | | | | | | | | | | This patch enables usage of DT property 'gpmc,num-cs' as already documented in Documentation/devicetree/bindings/bus/ti-gpmc.txt Though GPMC hardware supports upto 8 chip-selects, but all chip-selects may not be available for use because: - chip-select pin may not be bonded out at SoC device boundary. - chip-select pin-mux may conflict with other pins usage. - board level constrains. gpmc,num-cs allows user to configure maximum number of GPMC chip-selects available for use on any given platform. This ensures: - GPMC child nodes having chip-selects within allowed range are only probed. - And un-used GPMC chip-selects remain blocked.(may be for security reasons). Signed-off-by: Gupta, Pekon <pekon@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: dts: OMAP2+: Simplify NAND supportJon Hunter2013-05-161-1/+0
| | | | | | | | | | | | | | Commit 8c8a777 (ARM: OMAP2+: Add function to read GPMC settings from device-tree) added a device-tree property "gpmc,device-nand" to indicate is the GPMC child device is NAND. This commit should have updated the GPMC NAND documentation (Documentation/devicetree/bindings/mtd/gpmc-nand.txt) to list the property "gpmc,device-nand" as a required property and also updated the example. However, this property is redundant and not needed because the GPMC child device node for NAND is called "nand". Therefore, remove this property. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: OMAP2+: Allow NAND transfer mode to be specified in DTMark Jackson2013-05-161-0/+14
| | | | | | | | | | | | OMAP devices support various NAND transfer modes. Currently all device-tree definitions will use the default "prefetch polled" mode, so this patch enables the transfer mode to be specified in the device-tree. Signed-off-by: Mark Jackson <mpfj@newflow.co.uk> Acked-by: Pekon Gupta <pekon@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: OMAP2+: only WARN if a GPMC child probe function failJavier Martinez Canillas2013-04-301-3/+2
| | | | | | | | | If any of the GPMC child nodes fails, this shouldn't make the whole gpmc_probe_dt() function to fail. It is better to just WARN and allow other devices probe function to succeed. Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: Jon Hunter <jon-hunter@ti.com>
* ARM: OMAP2+: only search for GPMC DT child nodes on probeJavier Martinez Canillas2013-04-301-23/+10
| | | | | | | | | | | | | | | | | | | The GPMC DT probe function use for_each_node_by_name() to search child device nodes of the GPMC controller. But this function does not use the GPMC device node as the root of the search and instead search across the complete Device Tree. This means that any device node on the DT that is using any of the GPMC child nodes names searched for will be returned even if they are not connected to the GPMC, making the gpmc_probe_xxx_child() function to fail. Fix this by using the GPMC device node as the search root so the search will be restricted to its children. Reported-by: Lars Poeschel <poeschel@lemonage.de> Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: Jon Hunter <jon-hunter@ti.com>
* ARM: OMAP2+: Add GPMC DT support for Ethernet child nodesJavier Martinez Canillas2013-04-031-0/+8
| | | | | | | | | | | | | Besides being used to interface with external memory devices, the General-Purpose Memory Controller can be used to connect Pseudo-SRAM devices such as ethernet controllers to OMAP2+ processors using the TI GPMC as a data bus. This patch allows an ethernet chip to be defined as an GPMC child device node. Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: Jon Hunter <jon-hunter@ti.com>
* ARM: OMAP2+: rename gpmc_probe_nor_child() to gpmc_probe_generic_child()Javier Martinez Canillas2013-04-031-5/+5
| | | | | | | | | | | | | | The gpmc_probe_nor_child() function is used in the GPMC driver to configure the GPMC for a NOR child device node. But this function is quite generic and all the NOR specific configuration is made by the driver of the actual NOR flash memory used. Other Pseudo-SRAM devices such as ethernet controllers need a similar setup so by making this function generic it can be used for those too. Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: Jon Hunter <jon-hunter@ti.com>
* ARM: OMAP2+: return -ENODEV if GPMC child device creation failsJavier Martinez Canillas2013-04-031-0/+1
| | | | | | | | | | | | | | | | gpmc_probe_nor_child() calls of_platform_device_create() to create a platform device for the NOR child. If this function fails the value of ret is returned to the caller but this value is zero since it was assigned the return of a previous call to gpmc_cs_program_settings() that had to succeed or otherwise gpmc_probe_nor_child() would have returned before. This means that if of_platform_device_create() fails, 0 will be returned to the caller instead of an appropriate error code. Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: Jon Hunter <jon-hunter@ti.com> Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
* ARM: OMAP2+: Allow GPMC probe to complete even if CS mapping failsJon Hunter2013-04-031-17/+7
| | | | | | | | | | | | | | | | | | | | When the GPMC driver is probed, we call gpmc_mem_init() to see which chip-selects have already been configured and enabled by the boot-loader and allocate space for them. If we fail to allocate space for one chip-select, then we return failure from the probe and the GPMC driver will not be available. Rather than render the GPMC useless for all GPMC devices, if we fail to allocate space for one chip-select print a warning and disable the chip-select. This way other GPMC clients can still be used. There is no downside to this approach, because all GPMC clients need to request a chip-select before they can use the GPMC and on requesting a chip-select, if memory has not already been reserved for the chip-select then it will be. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
* ARM: OMAP2+: Remove unnecesssary GPMC definitions and variableJon Hunter2013-04-031-7/+5
| | | | | | | | | | With commit 21cc2bd (ARM: OMAP2+: Remove apollon board support) the variable "boot_rom_space" is now not needed and the code surrounding this variable can be cleaned up and simplified. Remove unnecessary definitions and clean-up the comment as well. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
* ARM: OMAP2+: Detect incorrectly aligned GPMC base addressJon Hunter2013-04-031-3/+19
| | | | | | | | | | | | | Each GPMC chip-select can be configured to map 16MB, 32MB, 64MB or 128MB of address space. The physical base address where a chip-select starts is also configurable and must be aligned on a boundary that is equal to or greater than the size of the address space mapped bt the chip-select. When enabling a GPMC chip-select, ensure that the base address is aligned to the appropriate boundary. Reported-by: Mark Jackson <mpfj-list@mimc.co.uk> Signed-off-by: Jon Hunter <jon-hunter@ti.com> Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
* ARM: OMAP2+: Add device-tree support for NOR flashJon Hunter2013-04-031-0/+115
| | | | | | | | | | | NOR flash is not currently supported when booting with device-tree on OMAP2+ devices. Add support to detect and configure NOR devices when booting with device-tree. Add documentation for the TI GPMC NOR binding. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
* ARM: OMAP2+: Add additional GPMC timing parametersJon Hunter2013-04-031-47/+47
| | | | | | | | | | | | | | | | | | | | | | Some of the GPMC timings parameters are currently missing from the GPMC device-tree binding. Add these parameters to the binding documentation as well as code to read them. Also add either "-ps" or "-ns" suffix to the GPMC timing properties to indicate whether the timing is in picoseconds or nanoseconds. The existing code in gpmc_read_timings_dt() is checking the value of of_property_read_u32() and only is successful storing the value read in the gpmc_timings structure. Checking the return value in this case is not necessary and we can simply read the value, if present, and store directly in the gpmc_timings structure. Therefore, simplify the code by removing these checks. The comment in the gpmc_read_timings_dt() function, "only for OMAP3430" is also incorrect as it is applicable to all OMAP3+ devices. So correct this too. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
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