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* ARM: OMAP2+: raw read and write endian fixVictor Kamensky2014-05-081-2/+2
| | | | | | | | | | | | | | | | All OMAP IP blocks expect LE data, but CPU may operate in BE mode. Need to use endian neutral functions to read/write h/w registers. I.e instead of __raw_read[lw] and __raw_write[lw] functions code need to use read[lw]_relaxed and write[lw]_relaxed functions. If the first simply reads/writes register, the second will byteswap it if host operates in BE mode. Changes are trivial sed like replacement of __raw_xxx functions with xxx_relaxed variant. Signed-off-by: Victor Kamensky <victor.kamensky@linaro.org> Signed-off-by: Taras Kondratiuk <taras.kondratiuk@linaro.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: OMAP2+: CM: cm_inst offset s16->u16Ankur Kishore2013-10-131-8/+8
| | | | | | | | | | | | | | | | | Most of the AM43x CM reg address offsets are with MSB bit '1' (on 16-bit value) leading to arithmetic miscalculations while calculating CLOCK ENABLE register's address because cm_inst field was a type of "const s16", so make it "const u16". Also modify relevant functions so as to take care of the above. [afzal@ti.com: fixup and cleanup] Signed-off-by: Ankur Kishore <a-kishore@ti.com> Signed-off-by: Afzal Mohammed <afzal@ti.com> Acked-by: Rajendra Nayak <rnayak@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
* ARM: OMAP2: am33xx-hwmod: Fix "register offset NULL check" bugHebbar Gururaja2013-02-081-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | am33xx_cm_wait_module_ready() checks if register offset is NULL. int am33xx_cm_wait_module_ready(u16 inst, s16 cdoffs, u16 clkctrl_offs) { int i = 0; if (!clkctrl_offs) return 0; In case of AM33xx, CLKCTRL register offset for different clock domains are not uniformly placed. An example of this would be the RTC clock domain with CLKCTRL offset at 0x00. In such cases the module ready check is skipped which leads to a data abort during boot-up when RTC registers is accessed. Remove this check here to avoid checking module readiness for modules with clkctrl register offset at 0x00. Koen Kooi notes that this patch fixes a crash on boot with CONFIG_RTC_DRV_OMAP=y with v3.8-rc5. Signed-off-by: Hebbar Gururaja <gururaja.hebbar@ti.com> Cc: Koen Kooi <koen@dominion.thruhere.net> [paul@pwsan.com: noted Koen's test in the patch description] Signed-off-by: Paul Walmsley <paul@pwsan.com>
* Merge tag 'omap-for-v3.8/cleanup-headers-prepare-multiplatform-v3-signed' of ↵Arnd Bergmann2012-11-121-2/+0
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/headers From Tony Lindgren <tony@atomide.com>: These changes deal with the issues of relative includes introduced by the earlier clean-up and clean up few more things for enabling multiplatform support. The multiplatform kernel has been booted on omaps on top of this branch with the work-in-progress patches applied manually. We cannot yet enable the multiplatform support though. We still need the common clock framework patches, some solution for dma-omap.h, and serial-omap.h moved before we can enable it. * tag 'omap-for-v3.8/cleanup-headers-prepare-multiplatform-v3-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: OMAP: Remove omap_init_consistent_dma_size() ARM: OMAP: Remove NEED_MACH_GPIO_H ARM: OMAP: Remove unnecessary mach and plat includes ARM: OMAP2+: Fix relative includes for serial.h ARM: OMAP: Fix relative includes for fpga.h ARM: OMAP1: Remove relative includes ARM: OMAP: Remove cpu_is_omap usage from plat-omap/dma.c ARM: OMAP: Fix relative includes for debug-devices.h ARM: OMAP: Remove plat-omap/common.h ARM: OMAP: Move omap-pm-noop.c local to mach-omap2 ARM: OMAP: Fix relative includes for shared i2c.h file ARM: OMAP: Make plat-omap/i2c.c port checks local ARM: OMAP: Move omap2+ specific parts of sram.c to mach-omap2 ARM: OMAP: Move omap1 specific code to local sram.c ARM: OMAP: Introduce common omap_map_sram() and omap_sram_reset() ARM: OMAP: Split sram.h to local headers and minimal shared header ARM: OMAP1: usb: fix sparse warnings Conflicts: arch/arm/mach-omap2/cm33xx.c Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * ARM: OMAP: Remove plat-omap/common.hTony Lindgren2012-10-311-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Most of the prototypes in plat-omap/common.h are not common to omap1 and omap2+, they are local to omap2+ and should not be in plat-omap/common.h. The only shared function prototype in this file is omap_init_clocksource_32k(), let's put that into counter-32k.h. Note that the new plat/counter-32k.h must not be included from drivers, that will break omap2+ build for CONFIG_MULTIPLATFORM. Signed-off-by: Tony Lindgren <tony@atomide.com>
* | Merge tag 'omap-cleanup-a-for-3.8' of ↵Tony Lindgren2012-10-241-0/+56
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into omap-for-v3.8/cleanup-prcm The first set of OMAP PRM/CM-related cleanup patches for 3.8. Prepares for the future move of the PRM/CM code to drivers/. Also includes some prcm.[ch] cleanup patches from the WDTIMER cleanup series that don't need external acks. Basic test logs for this branch on top of v3.7-rc2 are here: http://www.pwsan.com/omap/testlogs/prcm_cleanup_a_3.8/20121021123719/ But due to the number of unrelated regressions present in v3.7-rc[12], it's not particularly usable as a testing base. With reverts, fixes, and workarounds applied as documented in: http://www.pwsan.com/omap/testlogs/test_v3.7-rc2/20121020134755/README.txt the following test logs were obtained: http://www.pwsan.com/omap/testlogs/prcm_cleanup_a_3.8/20121020231757/ which indicate that the series tests cleanly. Conflicts: arch/arm/mach-omap2/Makefile arch/arm/mach-omap2/clockdomain2xxx_3xxx.c arch/arm/mach-omap2/pm24xx.c
| * ARM: OMAP2/3: clockdomain/PRM/CM: move the low-level clockdomain functions ↵Paul Walmsley2012-10-211-0/+56
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into PRM/CM Move the low-level SoC-specific clockdomain control functions into cm*.c and prm*.c. For example, OMAP2xxx low-level clockdomain functions go into cm2xxx.c. Then remove the unnecessary clockdomain*xxx*.c files. The objective is to centralize low-level CM and PRM register accesses into the cm*.[ch] and prm*.[ch] files, and then to export an OMAP SoC-independent API to higher-level OMAP power management code. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Rajendra Nayak <rnayak@ti.com> Cc: Vaibhav Hiremath <hvaibhav@ti.com> Acked-by: Rajendra Nayak <rnayak@ti.com> Reviewed-by: Russ Dill <Russ.Dill@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
* | ARM: OMAP: Make plat/common.h local to mach-omap1 and mach-omap2Tony Lindgren2012-10-171-1/+1
|/ | | | | | We cannot keep this in plat/common.h for common zImage support. Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: OMAP AM33xx: CM: Introduce AM33xx CM APIs and register level detailsVaibhav Hiremath2012-06-181-0/+313
As far as PRM/CM/PRCM modules are concerned, AM33XX device is different than OMAP3 and OMAP4 architectures; so similar to PRM implementation, handle AM33XX CM separately. This patch introduces AM33XX CM module low-level api's, used and required by omap clockdomain and hwmod framework. Please note that cm-regbits-33xx.h (register bit field offset) and cm33xx.h (register addr offset) files are mostly auto generated. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Afzal Mohammed <afzal@ti.com> Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com> Cc: Kevin Hilman <khilman@ti.com> Cc: Rajendra Nayak <rnayak@ti.com> CC: Tony Lindgren <tony@atomide.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Benoit Cousson <b-cousson@ti.com> [paul@pwsan.com: split the hwmod code changes in this patch into a separate patch; updated for 3.5] Signed-off-by: Paul Walmsley <paul@pwsan.com>
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