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* DA850: Split MMCSD clock into two to support both MMCSD peripheralsJuha Kuikka2010-09-241-3/+11
| | | | | | | | Split mmcsd_clk into mmcsd0_clk and mmcsd1_clk and add davinci_mmc.1 in preparation for adding support for MMCSD1 peripheral in DA850. Signed-off-by: Juha Kuikka <juha.kuikka@elektrobit.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* DA850: move MII/RMII pin lists to the board fileSergei Shtylyov2010-09-241-9/+3
| | | | | | | | | | | | The CPGMAC pin list in da850.c was incorrectly split into two MII/RMII mode specific pin lists, while what pin group is used is a function of how the board is wired. Copy the pin lists to board-da850-evm.c, renaming them accordingly, and merge the two lists in da850.c into one, da850_cpgmac_pins[], representing the CPGMAC module as a whole... Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Tested-by: Ben Gardiner <bengardiner@nanometrics.ca> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* DA850: move NAND/NOR pin lists to the board fileSergei Shtylyov2010-09-241-20/+12
| | | | | | | | | | | | | | | The NAND/NOR flash pin lists (da850_nand_pins/da850_nor_pins) are purely board specific and as such shouldn't be in da850.c -- copy them to board-da850-evm.c, renaming to da850_evm_nand_pins/da850_evm_nor_pins respectively, and merge the two lists in da850.c into one, representing the EMIF 2.5 module as a whole, just like we have it in da830.c... While at it, remove the '__init' modifier from da850_evm_setup_nor_nand() as this function is called from non '__init' code... Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Tested-by: Ben Gardiner <bengardiner@nanometrics.ca> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* davinci: am18x/da850/omap-l138: keep async clock constant with cpufreqSekhar Nori2010-09-241-1/+9
| | | | | | | | | Keep PLL0 SYSCLK3 at a constant rate of 100MHz. This enables the AEMIF timing to remain valid even as the PLL0 output is changed by cpufreq driver to save power. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* davinci: am18x/da850/omap-l138: use 'NOM' voltage defined in datasheet as ↵Sekhar Nori2010-09-241-3/+3
| | | | | | | | | | | | | | | | | | min voltage For each DA850 OPP, the normal ('NOM') voltage defined in the tecnical reference manual (TRM) is actually the minimum voltage the frequency is supported at. The minimum ('MIN') voltage defined in TRM is meant to take care of voltage fluctuations and the device should not be run at this voltage for extended periods of time. Fix the OPP definitions to define the cvdd_min as the normal voltage defined in the datasheet. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* davinci: cpufreq: bailout on regulator errorsSekhar Nori2010-09-241-1/+1
| | | | | | | | | | | | | | | | | | | | | | Current cpufreq code does not consider errors that can occur while changing voltage. Code to increase CPU frequency goes ahead even in the case the regulator has failed to increase the voltage. This leads to hard error since lower voltages cannot support increased frequency. Prevent this by not increasing frequency in case increasing voltage is not successful. Also, do not lower the voltage if changing the cpu frequency has failed for some reason. Note that we do not return error on failure to decrease voltage as that is not a hard error. Build fix for non-cpufreq kernels by Caglar Akyuz. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Cc: Caglar Akyuz <caglar@bilkon-kontrol.com.tr> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* davinci: da8xx: sparse cleanup: remove duplicate entries in irq prioritiesSekhar Nori2010-08-051-25/+0
| | | | | | | | | | | | | | | | | | | | | This patch helps get rid of the following sparse warnings of the type: CHECK arch/arm/mach-davinci/da830.c arch/arm/mach-davinci/da830.c:1026:3: warning: Initializer entry defined twice arch/arm/mach-davinci/da830.c:1027:3: also defined here coming from the irq priorities array init. Apart from one instance of genuinie repetition, most are are instances of multiple #defines of the same interrupt number. I have not removed the multiple definitions from the irq.h file in the hope that someone might decide to use them as shared interrupts at some point of time. The priority initialization however needs to be done only once and hence has been corrected. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* Davinci: iotable based ioremap() interceptionCyril Chemparathy2010-05-131-2/+2
| | | | | | | | | | | | | | This patch allows for a more flexible ioremap() interception based on iotable contents. With this patch, the ioremap() interception code can properly translate addresses only after davinci_soc_info has been initialized. Consequently, in soc-specific init functions, davinci_common_init() has to happen before any ioremap() attempts. The da8xx init sequence has been suitably modified to meet this restriction. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* Davinci: pinmux - use ioremap()Cyril Chemparathy2010-05-131-2/+1
| | | | | | | | This patch modifies the pinmux implementation so as to ioremap() the pinmux register area on first use. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* Davinci: aintc/cpintc - use ioremap()Cyril Chemparathy2010-05-131-1/+1
| | | | | | | | | | | | | | | | | | This patch implements the following: - interrupt initialization uses ioremap() instead of passing a virtual address via davinci_soc_info. - machine definitions directly point to cp_intc_init() or davinci_irq_init() - davinci_intc_type and davinci_intc_base now get initialized in controller specific init functions instead of davinci_common_init() - minor fix in davinci_irq_init() to use intc_irq_num instead of DAVINCI_N_AINTC_IRQ Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* Davinci: psc - use ioremap()Cyril Chemparathy2010-05-131-4/+1
| | | | | | | | This patch modifies the psc and clock control code to use ioremap()ed registers. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* Davinci: timer - use ioremap()Cyril Chemparathy2010-05-131-4/+4
| | | | | | | | This patch eliminates IO_ADDRESS() usage for Davinci timer definitions. The timer code has correspondingly been modified to ioremap() MMRs instead. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* Davinci: jtag_id - use ioremap()Cyril Chemparathy2010-05-131-2/+1
| | | | | | | | | | | This patch replaces the jtag id base info in davinci_soc_info with a physical address which is then ioremap()ed within common code. This patch (in combination with a similar change for PSC) will allow us to eliminate the SYSCFG nastiness in DA8xx code. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* Davinci: gpio - use ioremap()Cyril Chemparathy2010-05-131-1/+1
| | | | | | | | | This patch modifies the gpio_base definition in davinci_soc_info to be a physical address, which is then ioremap()ed by the gpio initialization function. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* Davinci: watchdog reset separation across socsCyril Chemparathy2010-05-061-0/+1
| | | | | | | | | | | | | | | | | The earlier watchdog reset mechanism had a couple of limitations. First, it embedded a reference to "davinci_wdt_device" inside common code. This forced all derived platforms (da8xx and tnetv107x) to define such a device. This also would have caused problems in including multiple socs in a single build due to symbol redefinition. With this patch, davinci_watchdog_reset() now takes the platform device as an argument. The davinci_soc_info struct has been extended to include a reset function and a watchdog platform_device. arch_reset() then uses these elements to reset the system in a SoC specific fashion. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Tested-by: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* Davinci: gpio - controller type supportCyril Chemparathy2010-05-061-0/+2
| | | | | | | | | | | | | This patch allows for gpio controllers that deviate from those found on traditional davinci socs. davinci_soc_info has an added field to indicate the soc-specific gpio controller type. The gpio initialization code then bails out if necessary. More elements (tnetv107x) to be added later into enum davinci_gpio_type. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Tested-by: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* davinci: clkdev cleanup: remove clk_lookup wrapper, use clkdev_add_table()Kevin Hilman2010-02-041-4/+4
| | | | | | | Remove unneeded 'struct davinci_clk' wrapper around 'struct clk_lookup' and use clkdev_add_table() to add the list of clocks in one go. Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* davinci: da850/omap-l138: add support for SoC suspendSekhar Nori2010-02-041-0/+39
| | | | | | | | | | | | | | | | | | This patch adds support for registering for suspend-to-RAM functionality on da850/omap-l138 SoCs. da850 supports wakeup based on external event and RTC alarm. Currently only RTC alarm based wakeup is supported. Support for wakeup based on external event will be added as later improvements. For scheduling an alarm event on RTC some useful code is present in Documentation/rtc.txt Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* davinci: da850/omap-l138: create static map for SRAMSekhar Nori2010-02-041-0/+8
| | | | | | | | | | | | | Create static map for internal SRAM and populate SRAM base and size in soc_info structure to allow SRAM allocation functions from arch/arm/mach-davinci/sram.c to work. On DA850 SRAM is used for suspend-to-RAM implementation in places where DDR2 cannot be accessed as its clocks are stopped. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* davinci: da850/omap-l138: unlock PLL registers during initSekhar Nori2010-02-041-6/+13
| | | | | | | | | | | | | | | | | On omap-l1 devices the PLL registers can be locked from writes. Currently the cpufreq rate setting code unlocks PLL0 before the write actually happens. With suspend support getting added PLL1 registers need be be unlocked as well. To facilitate this, unlock both PLLs during the init time itself. This also obviates the need to unlock PLL registers for each CPUFreq transtition. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* davinci: da8xx/omapl1: add support for the second sysconfig moduleSekhar Nori2010-02-041-8/+12
| | | | | | | | | | | | | OMAP-L138 adds a second SYSCFG region having useful functionality like deep sleep, pull up/down control and SATA clock stop. This patch makes provision for accessing registers from second SYSCFG region in da8xx code. Note that OMAP-L137 has a single SYSCFG region. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* davinci: DA850/OMAP-L138: avoid using separate initcall for initializing ↵Sekhar Nori2009-11-251-33/+31
| | | | | | | | | | | | | | | | | | regulator Using a device_initcall() for initializing the voltage regulator on DA850 is not such a good idea because it gets called for all platforms - even those who do not have a regulator implemented. This leads to a big fat warning message during boot-up when regulator cannot be found. Instead, tie initialization of voltage regulator to cpufreq init. Define a platform specific init call which in case of DA850 gets used for initializing the regulator. On other future platforms it can be used for other purposes. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* davinci: DA850/OMAP-L138: Set ASYNC3 domain flag for McASPChaithrika U S2009-11-251-0/+1
| | | | | | | | In the McASP clock definition add a flag to indicate that the peripheral clock belongs to ASYNC3 clock domain. Signed-off-by: Chaithrika U S <chaithrika@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* DaVinci: remove unneeded #include'sSergei Shtylyov2009-11-251-3/+0
| | | | | | | | | | There have accumulated quite a lot of them after the code reorganizations... In several cases I had to replace #include <linux/dma-mapping.h> which wasn't needed directly but happened to #include <linux/err.h> which was needed. Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* davinci: RMII support for DA850/OMAP-L138 EVMChaithrika U S2009-11-251-0/+17
| | | | | | | | | | | | | | | | DA850/OMAP-L138 EVM has a RMII Ethernet PHY on the UI daughter card. The PHY is enabled by proper programming of the IO Expander (TCA6416) ports. Also for RMII PHY to work, the MDIO clock of MII PHY has to be disabled since both the PHYs have the same address. This is done via the GPIO2[6] pin. This patch adds support for RMII PHY. This patch also adds a menuconfig option to select one or no peripheral connected to expander. Currently, sub-options in this menu are RMII and no peripheral.This menuconfig option is similar to the one present for UI card on DA830/OMAP-L137 EVM. Signed-off-by: Chaithrika U S <chaithrika@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* davinci: DA8xx: rename 'psc_ctlr' field into 'gpsc'Sergei Shtylyov2009-11-251-10/+10
| | | | | | | | | | Replace badly chosen 'psc_ctlr' name of the 'struct clk' field (PSC already means "Power and Sleep Controller", so the '_ctlr' postfix makes the name tautological) with technically correct 'gpsc' (Global PSC -- which contains all the module registers). Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* davinci: DA850/OMAP-L138: add voltage regulation supportSekhar Nori2009-11-251-0/+43
| | | | | | | | | | | This patch adds support for regulating the CVDD voltage for the DA850/OMAP-L138 platform. The CVDD min and max values for each OPP have been obtained from section 5.2 "Recommended Operating Conditions" of SPRS586 Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* davinci: DA850/OMAP-L138: add frequency scaling supportSekhar Nori2009-11-251-0/+153
| | | | | | | | | | | | | | | | | | | | | | | | Adds basic frequency scaling support for DA850/OMAP-L138. Currently, frequency scaling only on PLL0 is supported. No scaling of PLL1 as yet. Peripherals like MMC/SD which have a clock input synchronous with ARM clock will not work well since the clock will change behind their backs. Support for notification to such devices to adjust themselves to the new frequency will be added in later patches. Current defconfigs keep CPUFreq disabled so it will not affect normal operation. The OPP defintions assume clock input of 24MHz to the SoC. This is inline with hardcoding of input frequency in the <soc>.c files. At some point this will need to move into board dependent code as new boards appear with a different reference clock. Tested on OMAP-L138 EVM with ondemand governer and a shell script to vary processor load. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* davinci: Correct the GPIO number for LCD panel powerSudhakar Rajashekhara2009-11-251-7/+6
| | | | | | | | | | | | | | | On the latest DA850/OMAP-L138 EVM (Beta) the GPIO pin number of LCD panel power has changed. This patch takes care of this change. Software will support only Beta versions of DA850/OMAP-L138 EVM. In the process, add the missing entry for data pin 0 and remove the GPIO specific pins from da850_lcdcntl_pins structure. EVM specific muxing for LCD is being done in the board file now. Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* davinci: DA850/OMAP-L138: allow async3 source to be changedSekhar Nori2009-11-251-0/+40
| | | | | | | | | | | The patch allows Async3 clock source to be selected between PLL1 SYSCLK2 and PLL0 SYSCLK2. Having Async3 source from PLL1 SYSCLK2 allows peripherals on that domain to remain unaffected by frequency scaling on PLL0. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* davinci: DA8XX/OMAP-L1XX: JTAG ID register should offset from SYSCFG baseSekhar Nori2009-11-251-1/+2
| | | | | | | | This makes it clear that JTAG ID register is part of the SYSCFG module Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* davinci: DA8XX/OMAP-L1XX: Avoid use of IO_ADDRESS for SYSCFG moduleSekhar Nori2009-11-251-1/+6
| | | | | | | Avoid use of IO_ADDRESS() for SYSCFG module by doing an ioremap() instead. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* davinci: DA8XX/OMAP-L1XX: It's SYSCFG not BOOT_CFGSekhar Nori2009-11-251-1/+1
| | | | | | | | Rename the DA8XX_BOOT_CFG_BASE macro to get it in line with the public documentation for these parts. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* davinci: Add NOR flash support for da850/omap-l138Sudhakar Rajashekhara2009-08-261-0/+50
| | | | | | | | | | This patch adds platform data for the 8MB NOR flash found on da850/omap-l138 EVM. Both NOR and NAND can co-exist on da850/omap-l138 as they are using different chip selects. Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* davinci: Add NAND flash support for DA850/OMAP-L138Sudhakar Rajashekhara2009-08-261-0/+31
| | | | | | | | | This patch adds platform data for the 512MB NAND Flash found on DA850/OMAP-L138 EVM. Currently it supports only 1-bit ECC. Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* davinci: Add MMC/SD support for da850/omap-l138Sudhakar Rajashekhara2009-08-261-0/+23
| | | | | | | | | | | | There are two instances of MMC/SD on da850/omap-l138. Connector for the first instance is available on the EVM. This patch adds support for this instance. This patch also adds support for card detect and write protect switches on da850/omap-l138 EVM. Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* davinci: Add platform support for da850/omap-l138 GLCDSudhakar Rajashekhara2009-08-261-0/+42
| | | | | | | | This patch adds platform support for the graphic display (Sharp LK043T1DG01) found on DA850/OMAP-L138 based EVM. Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* davinci: Audio support for DA850/OMAP-L138 EVMChaithrika U S2009-08-261-0/+39
| | | | | | | | Define resources for McASP used on DA850/OMAP-L138 EVM, add platform device defintion and Pin Mux configurations. Signed-off-by: Chaithrika U S <chaithrika@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* davinci: Correct the number of GPIO pins for da850/omap-l138Sudhakar Rajashekhara2009-08-261-1/+1
| | | | | | | | | | | | DA850/OMAP-L138 has 144 pins configurable as GPIO, but currently this has been configured as 128. This patch corrects it. Also, this patch adds the base address for GPIO pins greater than 128. Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* davinci: Configure MDIO pins for EMACSudhakar Rajashekhara2009-08-261-1/+5
| | | | | | | | | | | | | | | Earlier patch which adds EMAC support for da850/omap-l138 was not configuring the MDIO pins. Ethernet was working fine with the earlier patch, because the MDIO pins were configured from the boot loader. This patch removes that dependency. Also, this patch populates a member in the emac clk structure to say that EMAC LPSC sits on controller 1. Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* davinci: Add EMAC support for da850/omap-l138Sudhakar Rajashekhara2009-08-261-0/+31
| | | | | | | | | | | | | | | Ethernet Media Access Controller (EMAC) on da850/omap-l138 supports 10/100 Mbps operation. It also supports Media Independent Interface (MII) and Reduced Media Independent Interface (RMII) to physical layer (PHY). Phy which supports MII is present on the DA850/OMAP-L138 base board and Phy supporting RMII is present on the UI card. This patch adds support only for the MII Phy. Support for RMII Phy will be added later. Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* davinci: Add base DA850/OMAP-L138 SoC supportSudhakar Rajashekhara2009-08-261-0/+600
The DA850/OMAP-L138 is a new SoC from TI in the same family as DA830/OMAP-L137. Major changes include better support for power management, support for SATA devices and McBSP (same IP as DM644x). DA850/OMAP-L138 documents are available at http://focus.ti.com/docs/prod/folders/print/omap-l138.html. Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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