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* Merge tag 'armsoc-drivers' of ↵Linus Torvalds2015-06-261-0/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC driver updates from Kevin Hilman: "Some of these are for drivers/soc, where we're now putting SoC-specific drivers these days. Some are for other driver subsystems where we have received acks from the appropriate maintainers. Some highlights: - simple-mfd: document DT bindings and misc updates - migrate mach-berlin to simple-mfd for clock, pinctrl and reset - memory: support for Tegra132 SoC - memory: introduce tegra EMC driver for scaling memory frequency - misc. updates for ARM CCI and CCN busses" * tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (48 commits) drivers: soc: sunxi: Introduce SoC driver to map SRAMs arm-cci: Add aliases for PMU events arm-cci: Add CCI-500 PMU support arm-cci: Sanitise CCI400 PMU driver specific code arm-cci: Abstract handling for CCI events arm-cci: Abstract out the PMU counter details arm-cci: Cleanup PMU driver code arm-cci: Do not enable CCI-400 PMU by default firmware: qcom: scm: Add HDCP Support ARM: berlin: add an ADC node for the BG2Q ARM: berlin: remove useless chip and system ctrl compatibles clk: berlin: drop direct of_iomap of nodes reg property ARM: berlin: move BG2Q clock node ARM: berlin: move BG2CD clock node ARM: berlin: move BG2 clock node clk: berlin: prepare simple-mfd conversion pinctrl: berlin: drop SoC stub provided regmap ARM: berlin: move pinctrl to simple-mfd nodes pinctrl: berlin: prepare to use regmap provided by syscon reset: berlin: drop arch_initcall initialization ...
| * ARM: berlin: select MFD_SYSCON by defaultAntoine Tenart2015-05-181-0/+1
| | | | | | | | | | | | | | | | | | The chip and system controller nodes handle sub-devices, such as the clock, pinctrl or reset controllers. The drivers handling them need a regmap provided by syscon. Select it by default when using a Berlin SoC. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
* | ARM: v7 setup function should invalidate L1 cacheRussell King2015-06-012-8/+1
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All ARMv5 and older CPUs invalidate their caches in the early assembly setup function, prior to enabling the MMU. This is because the L1 cache should not contain any data relevant to the execution of the kernel at this point; all data should have been flushed out to memory. This requirement should also be true for ARMv6 and ARMv7 CPUs - indeed, these typically do not search their caches when caching is disabled (as it needs to be when the MMU is disabled) so this change should be safe. ARMv7 allows there to be CPUs which search their caches while caching is disabled, and it's permitted that the cache is uninitialised at boot; for these, the architecture reference manual requires that an implementation specific code sequence is used immediately after reset to ensure that the cache is placed into a sane state. Such functionality is definitely outside the remit of the Linux kernel, and must be done by the SoC's firmware before _any_ CPU gets to the Linux kernel. Changing the data cache clean+invalidate to a mere invalidate allows us to get rid of a lot of platform specific hacks around this issue for their secondary CPU bringup paths - some of which were buggy. Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Tested-by: Florian Fainelli <f.fainelli@gmail.com> Tested-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Tested-by: Thierry Reding <treding@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com> Tested-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Michal Simek <michal.simek@xilinx.com> Tested-by: Wei Xu <xuwei5@hisilicon.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: berlin: do not select RESET_CONTROLLERAntoine Tenart2014-11-181-1/+0
| | | | | | | | RESET_CONTROLLER is meant to be user-selectable. To respect that, do not select it automatically when using ARCH_BERLIN. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
* ARM: Berlin: select the reset controllerAntoine Ténart2014-10-211-1/+3
| | | | | | | | The Marvell Berlin SoCs now has a reset controller. Add the needed configuration. While at it reorder Kconfigs alphabetically. Signed-off-by: Antoine Ténart <antoine.tenart@free-electrons.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
* Merge tag 'berlin-soc-3.17-1' of ↵Olof Johansson2014-07-074-1/+134
|\ | | | | | | | | | | | | | | | | | | | | | | | | git://git.infradead.org/users/hesselba/linux-berlin into next/soc Merge "Berlin SoC changes for v3.17" from Sebastian Hesselbarth: - SMP support for BG2 and BG2Q * tag 'berlin-soc-3.17-1' of git://git.infradead.org/users/hesselba/linux-berlin: ARM: berlin: add SMP support Signed-off-by: Olof Johansson <olof@lixom.net>
| * ARM: berlin: add SMP supportAntoine Ténart2014-06-164-1/+134
| | | | | | | | | | | | | | | | | | | | | | | | | | Adds SMP support for Berlin SoCs. Secondary CPUs are reset, then execute the instruction we put in the reset exception register, setting the pc at the address contained in the software reset address register, which is the physical address of the Berlin secondary startup. This implementation avoid using the pen lock mechanism. Signed-off-by: Antoine Ténart <antoine.tenart@free-electrons.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
* | ARM: use menuconfig for sub-arch menusRob Herring2014-06-171-5/+1
|/ | | | | | | | | | | | | The System Type menu is getting quite long with platforms and is inconsistent in handling of sub-arch specific options. Tidy up the menu by making platform options a menuconfig entry containing any platform specific config items. [arnd: change OMAP part according to suggestion from Tony Lindgren <tony@atomide.com>] Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* Merge branch 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-arm into nextLinus Torvalds2014-06-051-11/+6
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull ARM updates from Russell King: - Major clean-up of the L2 cache support code. The existing mess was becoming rather unmaintainable through all the additions that others have done over time. This turns it into a much nicer structure, and implements a few performance improvements as well. - Clean up some of the CP15 control register tweaks for alignment support, moving some code and data into alignment.c - DMA properties for ARM, from Santosh and reviewed by DT people. This adds DT properties to specify bus translations we can't discover automatically, and to indicate whether devices are coherent. - Hibernation support for ARM - Make ftrace work with read-only text in modules - add suspend support for PJ4B CPUs - rework interrupt masking for undefined instruction handling, which allows us to enable interrupts earlier in the handling of these exceptions. - support for big endian page tables - fix stacktrace support to exclude stacktrace functions from the trace, and add save_stack_trace_regs() implementation so that kprobes can record stack traces. - Add support for the Cortex-A17 CPU. - Remove last vestiges of ARM710 support. - Removal of ARM "meminfo" structure, finally converting us solely to memblock to handle the early memory initialisation. * 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-arm: (142 commits) ARM: ensure C page table setup code follows assembly code (part II) ARM: ensure C page table setup code follows assembly code ARM: consolidate last remaining open-coded alignment trap enable ARM: remove global cr_no_alignment ARM: remove CPU_CP15 conditional from alignment.c ARM: remove unused adjust_cr() function ARM: move "noalign" command line option to alignment.c ARM: provide common method to clear bits in CPU control register ARM: 8025/1: Get rid of meminfo ARM: 8060/1: mm: allow sub-architectures to override PCI I/O memory type ARM: 8066/1: correction for ARM patch 8031/2 ARM: 8049/1: ftrace/add save_stack_trace_regs() implementation ARM: 8065/1: remove last use of CONFIG_CPU_ARM710 ARM: 8062/1: Modify ldrt fixup handler to re-execute the userspace instruction ARM: 8047/1: rwsem: use asm-generic rwsem implementation ARM: l2c: trial at enabling some Cortex-A9 optimisations ARM: l2c: add warnings for stuff modifying aux_ctrl register values ARM: l2c: print a warning with L2C-310 caches if the cache size is modified ARM: l2c: remove old .set_debug method ARM: l2c: kill L2X0_AUX_CTRL_MASK before anyone else makes use of this ...
| * ARM: l2c: berlin: convert to generic l2c OF initialisationRussell King2014-05-301-11/+6
| | | | | | | | | | | | | | | | | | Remove the explicit call to l2x0_of_init(), converting to the generic infrastructure instead. We can remove the explicit machine init too as this becomes identical to the generic version. Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: l2c: remove platforms/SoCs setting early BRESPRussell King2014-05-301-1/+1
| | | | | | | | | | | | | | | | | | | | | | Since we now automatically enable early BRESP in core L2C-310 code when we detect a Cortex-A9, we don't need platforms/SoCs to set this bit explicitly. Instead, they should seek to preserve the value of bit 30 in the auxiliary control register. Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | ARM: berlin: add the pinctrl dependency for the Marvell Berlin SoCsAntoine Tenart2014-05-191-0/+4
| | | | | | | | | | Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
* | ARM: berlin: add the LIBGPIO as a dependency for the BG2QAntoine Tenart2014-05-191-0/+1
| | | | | | | | | | | | | | | | | | The BG2Q has GPIOs driven by the dwapb GPIO driver. Add the LIBGPIO as a dependency to be able to support them. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Reviewed-by: Jisheng Zhang <jszhang@marvell.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
* | ARM: berlin: add MACH_BERLIN_BG2Q symbolAlexandre Belloni2014-05-191-0/+5
|/ | | | | | | | Now that we start supporting the Marvell Berlin BG2Q, add a symbol allowing to differentiate that SoC from the other SoCs of the Berlin family. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
* ARM: select HAVE_SMP for V7 multi-platformRob Herring2014-02-191-1/+0
| | | | | | | | | All V7 platforms can run SMP kernels, so make CONFIG_SMP visible for V7 multi-platform builds. Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Stephen Warren <swarren@nvidia.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
* ARM: centralize common multi-platform kconfig optionsRob Herring2014-02-191-3/+0
| | | | | | | | | | | | Multi-platform requires various kconfig options to be selected, so platforms don't need to select them individually. Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Cc: Russell King <linux@arm.linux.org.uk> Acked-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Arnd Bergmann <arnd@arndb.de>
* ARM: add initial support for Marvell Berlin SoCsSebastian Hesselbarth2013-12-133-0/+69
This adds initial support for the Marvell Berlin SoC family with Armada 1500 (88DE3100) and Armada 1500-mini (88DE3005) SoCs. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Reviewed-by: Jason Cooper <jason@lakedaemon.net> Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de>
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