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* ARM: BCM5301X: Add back handler ignoring external imprecise abortsRafał Miłecki2016-11-161-0/+28
| | | | | | | | | | | | | | | | | | | | Since early BCM5301X days we got abort handler that was removed by commit 937b12306ea79 ("ARM: BCM5301X: remove workaround imprecise abort fault handler"). It assumed we need to deal only with pending aborts left by the bootloader. Unfortunately this isn't true for BCM5301X. When probing PCI config space (device enumeration) it is expected to have master aborts on the PCI bus. Most bridges don't forward (or they allow disabling it) these errors onto the AXI/AMBA bus but not the Northstar (BCM5301X) one. iProc PCIe controller on Northstar seems to be some older one, without a control register for errors forwarding. It means we need to workaround this at platform level. All newer platforms are not affected by this issue. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
* ARM: BCM5301X: remove workaround imprecise abort fault handlerLucas Stach2015-11-241-35/+0
| | | | | | | | | | | This is not needed anymore. Handling a potentially pending imprecise external abort left behind by the bootloader is now done in a slightly safer way inside the common ARM startup code. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Acked-by: Hauke Mehrtens <hauke@hauke-m.de> Tested-by: Tyler Baker <tyler.baker@linaro.org> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
* ARM: appropriate __init annotation for const dataNicolas Pitre2015-07-281-1/+1
| | | | | | | | | | Init data marked const should be annotated with __initconst for correctness and not __initdata. In some cases the array gathering references to that data has to be marked const as well. This fixes LTO builds that otherwise fail with section mismatch errors. Signed-off-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Olof Johansson <olof@lixom.net>
* ARM: BCM5301X: Ignore another (BCM4709 specific) fault codeRafał Miłecki2015-05-201-4/+5
| | | | | | | | | Broadcom ARM devices seem to generate some fault once per boot. We already have an ignoring handler for BCM4707/BCM4708, but BCM4709 generates different code. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
* ARM: l2c: bcm_5301x: convert to generic l2c OF initialisationRussell King2014-05-301-7/+2
| | | | | | | | Remove the explicit call to l2x0_of_init(), converting to the generic infrastructure instead. We can remove the explicit machine init too as this becomes identical to the generic version. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: l2c: remove unnecessary UL-suffix to mask valuesRussell King2014-05-221-1/+1
| | | | | | | | They're u32, they're not unsigned long. The UL suffix is not required here. Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: BCM5301X: workaround suppress faultHauke Mehrtens2014-03-061-0/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Without this patch I am getting a unhandled fault exception like this one after "Freeing unused kernel memory": Freeing unused kernel memory: 1260K (c02c1000 - c03fc000) Unhandled fault: imprecise external abort (0x1c06) at 0xb6f89005 Kernel panic - not syncing: Attempted to kill init! exitcode=0x00000007 The address which is here 0xb6f89005 changes from boot to boot, with a new build the changes are bigger. With kernel 3.10 I have also seen this fault at different places in the boot process, but starting with 3.11 they are always occurring after the "Freeing unused kernel memory" message. I never was able to completely boot to userspace without this handler. The abort code is constant 0x1c06. This fault just happens once in the boot process I have never seen it happing twice or more. I also tried changing the CPSR.A bit to 0 in init_early, with this code like Afzal suggested, but that did not change anything: asm volatile("mrs r12, cpsr\n" "bic r12, r12, #0x00000100\n" "msr cpsr_c, r12" ::: "r12", "cc", "memory"); Disabling the L2 cache by building with CONFIG_CACHE_L2X0 unset did not help. This workaround was copied from the vendor code including most of the comments. It says it they think this is caused by the CFE boot loader used on this device. I do not have any access to any datasheet or errata document to check this. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Christian Daudt <bcm@fixthebug.org> Signed-off-by: Matt Porter <mporter@linaro.org>
* ARM: BCM5301X: initial support for the BCM5301X/BCM470X SoCs with ARM CPUHauke Mehrtens2014-03-061-0/+28
This patch adds support for the BCM5301X/BCM470X SoCs with an ARM CPUs. Currently just booting to a shell is working and nothing else, no Ethernet, wifi, flash, ... I have some pending patches to make Ethernet work for this device. Mostly device tree support for bcma is missing. This SoC is used in small office and home router with Broadcom SoCs it's internal name is Northstar. This code should support the BCM4707, BCM4708, BCM4709, BCM53010, BCM53011 and BCM53012 SoC. It uses one or two ARM Cortex A9 Cores, some highlights are 2 PCIe 2.0 controllers, 4 Gigabit Ethernet MACs and a USB 3.0 host controller. This SoC uses a dual core CPU, but this is currently not implemented. More information about this SoC can be found here: http://www.anandtech.com/show/5925/broadcom-announces-bcm4708x-and-bcm5301x-socs-for-80211ac-routers Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Christian Daudt <bcm@fixthebug.org> Signed-off-by: Matt Porter <mporter@linaro.org>
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