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* at91: vmalloc fix missing AT91_VIRT_BASE defineJean-Christophe PLAGNIOL-VILLARD2011-11-091-0/+2
| | | | | | | | | | | | | | VMALLOC_END is defined in terms of AT91_VIRT_BASE but this needs mach/hardware.h for it's definition. In file included from arch/arm/mach-at91/board-usb-a926x.c:26:0: include/linux/mm.h: In function 'is_vmalloc_addr': include/linux/mm.h:305:41: error: 'AT91_VIRT_BASE' undeclared (first use in this function) include/linux/mm.h:305:41: note: each undeclared identifier is reported only once for each function it appears in Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Jamie Iles <jamie@jamieiles.com>
* Merge git://git.infradead.org/mtd-2.6Linus Torvalds2011-11-071-1/+2
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * git://git.infradead.org/mtd-2.6: (226 commits) mtd: tests: annotate as DANGEROUS in Kconfig mtd: tests: don't use mtd0 as a default mtd: clean up usage of MTD_DOCPROBE_ADDRESS jffs2: add compr=lzo and compr=zlib options jffs2: implement mount option parsing and compression overriding mtd: nand: initialize ops.mode mtd: provide an alias for the redboot module name mtd: m25p80: don't probe device which has status of 'disabled' mtd: nand_h1900 never worked mtd: Add DiskOnChip G3 support mtd: m25p80: add EON flash EN25Q32B into spi flash id table mtd: mark block device queue as non-rotational mtd: r852: make r852_pm_ops static mtd: m25p80: add support for at25df321a spi data flash mtd: mxc_nand: preset_v1_v2: unlock all NAND flash blocks mtd: nand: switch `check_pattern()' to standard `memcmp()' mtd: nand: invalidate cache on unaligned reads mtd: nand: do not scan bad blocks with NAND_BBT_NO_OOB set mtd: nand: wait to set BBT version mtd: nand: scrub BBT on ECC errors ... Fix up trivial conflicts: - arch/arm/mach-at91/board-usb-a9260.c Merged into board-usb-a926x.c - drivers/mtd/maps/lantiq-flash.c add_mtd_partitions -> mtd_device_register vs changed to use mtd_device_parse_register.
| * mtd: ATMEL, AVR32: inline nand partition table accessDmitry Eremin-Solenikov2011-09-111-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently atmel_nand driver used by AT91 and AVR32 calls a special callback which return nand partition table and number of partitions. However in all boards this callback returns just static data. So drop this callback and make atmel_nand use partition table provided statically via platform_data. Nicolas Ferre: I am in favor for a mainline inclusion through linux-mtd tree. Hans-Christian Egtvedt: I'm fine by sending the changes for AVR32 through linux-mtd Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Acked-by: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
* | Merge branch 'next/devel' of git://git.linaro.org/people/arnd/arm-socLinus Torvalds2011-11-011-0/+5
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'next/devel' of git://git.linaro.org/people/arnd/arm-soc: (50 commits) ARM: tegra: update defconfig arm/tegra: Harmony: Configure PMC for low-level interrupts arm/tegra: device tree support for ventana board arm/tegra: add support for ventana pinmuxing arm/tegra: prepare Seaboard pinmux code for derived boards arm/tegra: pinmux: ioremap registers gpio/tegra: Convert to a platform device arm/tegra: Convert pinmux driver to a platform device arm/dt: Tegra: Add pinmux node to tegra20.dtsi arm/tegra: Prep boards for gpio/pinmux conversion to pdevs ARM: mx5: fix clock usage for suspend ARM i.MX entry-macro.S: remove now unused code ARM i.MX boards: use CONFIG_MULTI_IRQ_HANDLER ARM i.MX tzic: add handle_irq function ARM i.MX avic: add handle_irq function ARM: mx25: Add the missing IIM base definition ARM i.MX avic: convert to use generic irq chip mx31moboard: Add poweroff support ARM: mach-qong: Add watchdog support ARM: davinci: AM18x: Add wl1271/wlan support ... Fix up conflicts in: arch/arm/mach-at91/at91sam9g45.c arch/arm/mach-mx5/devices-imx53.h arch/arm/plat-mxc/include/mach/memory.h
| * \ Merge branch 'depends/rmk/gpio' into next/develArnd Bergmann2011-10-311-5/+0
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: arch/arm/mach-mxs/include/mach/gpio.h arch/arm/plat-mxc/include/mach/gpio.h Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | | at91: at91-ohci: support overcurrent notificationThomas Petazzoni2011-09-101-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Several USB power switches (AIC1526 or MIC2026) have a digital output that is used to notify that an overcurrent situation is taking place. This digital outputs are typically connected to GPIO inputs of the processor and can be used to be notified of those overcurrent situations. Therefore, we add a new overcurrent_pin[] array in the at91_usbh_data structure so that boards can tell the AT91 OHCI driver which pins are used for the overcurrent notification, and an overcurrent_supported boolean to tell the driver whether overcurrent is supported or not. The code has been largely borrowed from ohci-da8xx.c and ohci-s3c2410.c. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| * | | at91: ohci-at91: add vbus_pin_inverted platform attributeThomas Petazzoni2011-09-101-0/+1
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The existing OHCI AT91 driver made the assumption that the enable input of the USB power switch was active low. However, some USB power switches such as the Micrel MIC2026-1 [1] have an active high input to enable the power. A new vbus_pin_inverted attribute is added to the at91_usbh_data structure so that board files can tell the OHCI driver if the vbus pin logic is active low or active high. [1] http://www.micrel.com/page.do?page=product-info/products/mic2026.shtml Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
* | | Merge branch 'depends/rmk/devel-stable' into next/boardArnd Bergmann2011-11-012-3/+1
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The exynos4 updates conflict with code from the arm devel-stable branch and new boards need to set atag_offset in place of boot_param. Conflicts: arch/arm/Kconfig arch/arm/mach-exynos4/include/mach/entry-macro.S arch/arm/mach-exynos4/mach-smdkc210.c arch/arm/mach-exynos4/mach-smdkv310.c arch/arm/mach-exynos4/mct.c Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | | ARM: add an extra temp register to the low level debugging addruart macroNicolas Pitre2011-09-261-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some platforms (like OMAP not to name it) are doing rather complicated hacks just to determine the base UART address to use. Let's give their addruart macro some slack by providing an extra work register which will allow for much needed cleanups. This is basically a no-op as this commit is only adding the extra argument to the macro but no one is using it yet. Signed-off-by: nicolas Pitre <nicolas.pitre@linaro.org> Reviewed-by: Kevin Hilman <khilman@ti.com>
| * | | ARM: mach-at91: Setup consistent dma size at boot timeJon Medhurst2011-08-221-2/+0
| |/ / | | | | | | | | | | | | Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Ferre<nicolas.ferre@atmel.com>
* | | Merge branch 'depends/rmk/gpio' into next/boardArnd Bergmann2011-10-211-5/+0
|\ \ \ | | |/ | |/| | | | | | | | | | | | | | | | Conflicts: arch/arm/mach-at91/board-usb-a9260.c arch/arm/mach-at91/board-usb-a9263.c arch/arm/mach-tegra/board-paz00.h arch/arm/mach-tegra/board-seaboard.h
| * | ARM: gpio: make trivial GPIOLIB implementation the defaultRussell King2011-08-121-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rather than marking the mach/gpio.h header files which want to use the trivial GPIOLIB implementation, mark those which do not want to use it instead. This means that by default, you get the trivial implementation and only have to do something extra if you need to. This should encourage the use of the trivial default implementation. As an additional bonus, several gpio.h header files become empty. Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Tested-by: Jamie Iles <jamie@jamieiles.com> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | ARM: gpio: consolidate trivial gpiolib implementationsRussell King2011-08-121-4/+1
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | Consolidate 24 trivial gpiolib implementions out of mach/gpio.h into asm/gpio.h. This is basically the include of asm-generic/gpio.h and the definition of gpio_get_value, gpio_set_value, and gpio_cansleep as described in Documentation/gpio.txt Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Tested-by: David Brown <davidb@codeaurora.org> Acked-by: David Brown <davidb@codeaurora.org> Tested-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Tested-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | at91: USB-A9G20 C01 & C11 board supportJean-Christophe PLAGNIOL-VILLARD2011-09-071-0/+5
|/ | | | | | | | | Add support for Calao USB-A9G20 boards. It will be integrated in existing support for board of same form factor using at91sam9260 or at91sam9263. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
* Merge branch 'at91/cleanup' of ↵Linus Torvalds2011-07-2912-97/+135
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc * 'at91/cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc: at91: add arch specific ioremap support at91: factorize sram init at91: move register clocks to soc generic init at91: move clock subsystem init to soc generic init at91: use structure to store the current soc at91: remove AT91_DBGU offset from dbgu register macro at91: factorize at91 interrupts init to soc at91: introduce commom AT91_BASE_SYS
| * at91: add arch specific ioremap supportJean-Christophe PLAGNIOL-VILLARD2011-07-281-1/+10
| | | | | | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
| * at91: use structure to store the current socJean-Christophe PLAGNIOL-VILLARD2011-07-281-70/+89
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | instead of reading the registers everytime the current implementation respect the following constrain: - allow 1 to n soc to be enabled - allow to have a virtual cpu type and subtype - always detect the cpu type and subtype and report it - detect if the soc support is enabled - prepare for sysfs export support - drop soc specific code via compiler when the soc not enabled (via cpu_is_xxx) Today if we read the exid we will have the same value for 9g35 and 9m11 and we will need to check the cidr too with the new implementation we just need to check the soc subtype this will also allow to have specific virtual subtype for rm9200 which the board will have to specify via at91rm9200_set_type(int) as we have no way to detect it. this implementation is inspired by the SH cpu detection support Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
| * at91: remove AT91_DBGU offset from dbgu register macroJean-Christophe PLAGNIOL-VILLARD2011-07-283-23/+26
| | | | | | | | | | | | to make the soc base specified at runtime instead of compiled time Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * at91: introduce commom AT91_BASE_SYSJean-Christophe PLAGNIOL-VILLARD2011-07-288-7/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On all at91 except rm9200 and x40 have the System Controller starts at address 0xffffc000 and has a size of 16KiB. On rm9200 it's start at 0xfffe4000 of 111KiB with non reserved data starting at 0xfffff000 This patch removes the individual definitions of AT91_BASE_SYS and replaces them with a common version at base 0xfffffc000 and size 16KiB and map the same memory space Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
* | Merge git://git.kernel.org/pub/scm/linux/kernel/git/wim/linux-watchdogLinus Torvalds2011-07-291-37/+0
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * git://git.kernel.org/pub/scm/linux/kernel/git/wim/linux-watchdog: (25 commits) watchdog: WatchDog Timer Driver Core - Add minimum and max timeout watchdog: WatchDog Timer Driver Core - Add ioctl call watchdog: WatchDog Timer Driver Core - Add nowayout feature watchdog: WatchDog Timer Driver Core - Add Magic Close feature watchdog: WatchDog Timer Driver Core - Add WDIOC_SETTIMEOUT and WDIOC_GETTIMEOUT ioctl watchdog: WatchDog Timer Driver Core - Add WDIOC_SETOPTIONS ioctl watchdog: WatchDog Timer Driver Core - Add WDIOC_KEEPALIVE ioctl watchdog: WatchDog Timer Driver Core - Add basic ioctl functionality watchdog: WatchDog Timer Driver Core - Add basic framework watchdog: hpwdt: add next gen HP servers watchdog: it8712f_wdt.c: improve includes watchdog: at91sam9/wdt: move register header to drivers watchdog: Add Xilinx watchdog timer driver watchdog: remove empty pm-functions watchdog: sp805: Flush posted writes in enable/disable. watchdog: sp805: Don't write 0 to the load value register. watchdog: imx2_wdt: add device tree probe support watchdog: s3c2410: Add support for device tree based probe watchdog: mpcore_wdt: Add suspend/resume support. watchdog: mtx1-wdt: use dev_{err,info} instead of printk() ...
| * | watchdog: at91sam9/wdt: move register header to driversJean-Christophe Plagniol-Villard2011-07-261-37/+0
| |/ | | | | | | | | | | | | | | | | move register header to drivers Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
* | Merge branch 'next/cross-platform' of ↵Linus Torvalds2011-07-261-7/+0
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc * 'next/cross-platform' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc: ARM: Consolidate the clkdev header files ARM: set vga memory base at run-time ARM: convert PCI defines to variables ARM: pci: make pcibios_assign_all_busses use pci_has_flag ARM: remove unnecessary mach/hardware.h includes pci: move microblaze and powerpc pci flag functions into asm-generic powerpc: rename ppc_pci_*_flags to pci_*_flags Fix up conflicts in arch/microblaze/include/asm/pci-bridge.h
| * | ARM: Consolidate the clkdev header filesKyungmin Park2011-07-191-7/+0
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now most of ARM machines has the alsmot same __clk_get/put() macro So place it at the arch/arm/include/asm/clkdev.h and remove the reduntant header files But some machines don't have the same form as above. It can use the machince specific clkdev file by HAVE_MACH_CLKDEV config Now there are only 3 caese. 1) define the clk structure with clkdev macro => Need to move clk structure to proper header file arch/arm/mach-versatile/include/mach/clkdev.h arch/arm/mach-realview/include/mach/clkdev.h arch/arm/mach-vexpress/include/mach/clkdev.h arch/arm/mach-integrator/include/mach/clkdev.h 2) export the __clk_get/put function at clock.c arch/arm/mach-shmobile/include/mach/clkdev.h 3) demuxing the clk source arch/arm/mach-u300/include/mach/clkdev.h Acked-by: Viresh Kumar <viresh.kumar@st.com> Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
* | mmc: at91_mci: move register header from include/ to drivers/Jean-Christophe PLAGNIOL-VILLARD2011-07-211-115/+0
|/ | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Chris Ball <cjb@laptop.org>
* AT91: Change nand buswidth logic to match hardware default configurationNicolas Ferre2011-07-041-5/+5
| | | | | | | | | | | | | | The recently modified nand buswitth configuration is not aligned with board reality: the double footprint on boards is always populated with 8bits buswidth nand flashes. So we have to consider that without particular configuration the 8bits buswidth is selected by default. Moreover, the previous logic was always using !board_have_nand_8bit(), we change it to a simpler: board_have_nand_16bit(). Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Tested-by: Ludovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* at91: drop at572d940hf supportJean-Christophe PLAGNIOL-VILLARD2011-05-256-263/+1
| | | | | | | | | | no-one use it and it's nearly impossible get a board to work on it and the Mainline implementation was never finished Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com> Cc: Andrew Victor <linux@maxim.org.za>
* at91rm9200: introduce at91rm9200_set_type to specficy cpu packageJean-Christophe PLAGNIOL-VILLARD2011-05-251-0/+7
| | | | | | | | | | as we can not detect it by defaut the type will be bga introduce cpu_is_at91rm9200_bga and cpu_is_at91rm9200_pqfp Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
* at91: drop boot_params and PLAT_PHYS_OFFSETJean-Christophe PLAGNIOL-VILLARD2011-05-254-13/+0
| | | | | | | | | | | | | | | select ARM_PATCH_PHYS_VIRT as with ARM_PATCH_PHYS_VIRT you can patch boot_params at runtime or any recent bootloader will provide a valid atags pointer in r2 as point out by Russell on AT91 we never use XIP so se do not need PLAT_PHYS_OFFSET Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com> Cc: Andrew Victor <linux@maxim.org.za> Cc: Russell King <rmk+kernel@arm.linux.org.uk>
* at91: factorize common irq IDJean-Christophe PLAGNIOL-VILLARD2011-05-2510-18/+6
| | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com> Cc: Andrew Victor <linux@maxim.org.za>
* at91: switch to CLKDEV_LOOKUPJean-Christophe PLAGNIOL-VILLARD2011-05-251-0/+7
| | | | | | | | | we do not change the clock naming convention so does not need to switch the AVR32 yet Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
* at91: fix map_io init usageJean-Christophe PLAGNIOL-VILLARD2011-05-251-1/+1
| | | | | | | | | | | | | | switch early init to init_early and introduce soc map_io with this Patch we will not do any more early device setup during the map io tks to Russell to point the new call back Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Acked-by: Andrew Victor <linux@maxim.org.za>
* atmel_serial: keep the platform_device unchangedJean-Christophe PLAGNIOL-VILLARD2011-05-251-0/+1
| | | | | | | | | | | | specify the port num via platform_data this will allow to match the clock with the plaform_dev staticaly Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Alan Cox <alan@linux.intel.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com> Cc: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com> Cc: Greg Kroah-Hartman <gregkh@suse.de>
* at91: remove MTD_NAND_ATMEL_BUSWIDTH_16 optionJean-Christophe PLAGNIOL-VILLARD2011-05-251-0/+25
| | | | | | | | | | | | | | no board configure it as 'n' and it's an issue to merge all defconfigs in one On AT91SAM926x boards both types of NAND flash can be present (8 and 16 bit data bus width). so will pass it via system_rev Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
* at91: Add ARCH_ID and basic cpu macros definition for 5series chips family.Jean-Christophe PLAGNIOL-VILLARD2011-04-231-0/+28
| | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
* Fix common misspellingsLucas De Marchi2011-03-312-2/+2
| | | | | | Fixes generated by 'codespell' and manually reviewed. Signed-off-by: Lucas De Marchi <lucas.demarchi@profusion.mobi>
* arm: at91: at572d940hf: Fix SDRAMC defineThomas Gleixner2011-03-291-1/+1
| | | | | | That wants to be AT91_SDRAMC0 Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* Merge branch 'p2v' into develRussell King2011-03-161-1/+1
|\ | | | | | | | | | | Conflicts: arch/arm/kernel/module.c arch/arm/mach-s5pv210/sleep.S
| * ARM: P2V: separate PHYS_OFFSET from platform definitionsRussell King2011-02-171-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This uncouple PHYS_OFFSET from the platform definitions, thereby facilitating run-time computation of the physical memory offset. Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Acked-by: Viresh Kumar <viresh.kumar@st.com> Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: Magnus Damm <damm@opensource.se> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Wan ZongShun <mcuos.com@gmail.com> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Acked-by: Eric Miao <eric.y.miao@gmail.com> Acked-by: Jiandong Zheng <jdzheng@broadcom.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | ARM: 6664/1: AT91: Use macros for gpio_to_irq/irq_to_gpioRyan Mallon2011-02-191-9/+2
|/ | | | | | | | | Replace the static inline functions for gpio_to_irq/irq_to_gpio so that they can be used in static initialisers. Signed-off-by: Ryan Mallon <ryan@bluewatersys.com> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* AT91: Support for gsia18s boardIgor Plyatov2011-01-141-0/+33
| | | | | | | | | | The GS_IA18_S (GMS) is a carrier board from GeoSIG Ltd used with the Stamp9G20 SoM from Taskit company. It operate as an internet accelerometer. Signed-off-by: Igor Plyatov <plyatov@gmail.com> [nicolas.ferre@atmel.com: rm Kconfig, whitespace fixes, change machine name] Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
* mmc: at91_mci: fix multiblock SDIO transfersYauhen Kharuzhy2010-12-211-0/+2
| | | | | | | | | | | | | | | | | | | The AT91 MCI has special SDIO transfer types: SDIO block and SDIO byte transfers, but at91_mci driver doesn't use them and handles all SDIO transfers as ordinary MMC block transfers. This causes problems for multiple-block SDIO transfers (in particular for 256-bytes blocks). Fix this situation by checking the opcode for SDIO CMD53 and setting the transfer type in the AT91_MCI_CMDR register properly. This patch was tested with libertas SDIO driver: problem with TX timeouts on big packets was eliminated. Signed-off-by: Yauhen Kharuzhy <yauhen.kharuzhy@promwad.com> Cc: <stable@kernel.org> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Chris Ball <cjb@laptop.org>
* at91: Refactor Stamp9G20 and PControl G20 board fileChristian Glindkamp2010-12-171-0/+7
| | | | | | | | | As PControl G20 is a carrier board for the Stamp9G20 SoM, some code can be shared. Therefore board-stamp9g20.c is refactored to allow reusing the SoM initialization and board-pcontrol-g20.c is modified to use it. Signed-off-by: Christian Glindkamp <christian.glindkamp@taskit.de> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
* at91: Convert remaining boards to new-style UART initializationJean-Christophe PLAGNIOL-VILLARD2010-11-301-6/+0
| | | | | | | | | | | | | Convert the following AT91RM9200-based boards to the new-style UART initialization: - Ajeco 1ARM Single Board Computer - Sperry-Sun KAFA board - picotux 200 Remove the deprecated at91_init_serial Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Andrew Victor <linux@maxim.org.za>
* arm: return both physical and virtual addresses from addruartJeremy Kerr2010-10-201-5/+3
| | | | | | | | | | | | | | | | | | | | Rather than checking the MMU status in every instance of addruart, do it once in kernel/debug.S, and change the existing addruart macros to return both physical and virtual addresses. The main debug code can then select the appropriate address to use. This will also allow us to retreive the address of a uart for the MMU state that we're not current in. Updated with fixes for OMAP from Jason Wang <jason77.wang@gmail.com> and Tony Lindgren <tony@atomide.com>, and fix for versatile express from Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>. Signed-off-by: Jeremy Kerr <jeremy.kerr@canonical.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Jason Wang <jason77.wang@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Tested-by: Kevin Hilman <khilman@deeprootsystems.com>
* Merge branch 'for-rmk' of ↵Russell King2010-10-191-4/+3
|\ | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into devel-stable Conflicts: arch/arm/mach-at91/include/mach/system.h arch/arm/mach-imx/mach-cpuimx27.c AT91 conflict resolution: Acked-by: Anders Larsen <al@alarsen.net> IMX conflict resolution confirmed by Uwe Kleine-König.
| * ARM: 6436/1: AT91: Fix power-saving in idle-mode on 926T processorsAnders Larsen2010-10-081-4/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | According to Atmel, their 926T processors (AT91 post RM9200) requires 'Wait for Interrupt' mode be entered right after disabling the processor clock in order to minimise current consumption when idle, so do both provided we're not running on a 920T (an RM9200). Furthermore, get rid of the #ifndef CONFIG_DEBUG_KERNEL, since arch_idle() can be turned off completely with the kernel parameter 'nohlt'. Cc: Andrew Victor <avictor.za@gmail.com> Signed-off-by: Anders Larsen <al@alarsen.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | AT91: fix use of clock disable on idle for AT91x40 devicesGreg Ungerer2010-10-072-0/+10
|/ | | | | | | | | | | The simpler AT91x40 processors do not have the same power management controller as the new AT91 devices. They do have a simpler power controller module that we can use to disable the CPU clock at idle time. Add code to support that. Signed-off-by: Greg Ungerer <gerg@uclinux.org> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
* ARM: 6209/3: at91_udc: Add vbus polarity and polling modeRyan Mallon2010-07-181-0/+2
| | | | | | | | | | | | Allow the vbus signal to optionally use polling. This is required if the vbus signal is connected to an non-interrupting io expander for example. If vbus is in polling mode, then it is assumed that the vbus gpio may sleep. Also add an option to have vbus be an active low signal. Both options are set in the platform data for the device. Signed-off-by: Ryan Mallon <ryan@bluewatersys.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 6200/1: AT91: Define NR_BUILTIN_GPIORyan Mallon2010-07-091-0/+1
| | | | | | | | Add definition for NR_BUILTIN_GPIO for AT91 family Signed-off-by: Ryan Mallon <ryan@bluewatersys.com> Acked-by: Andrew Victor <linux@maxim.org.za> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 6185/1: AT91: PM: dual ram controller supportNicolas Ferre2010-07-097-21/+162
| | | | | | | | | | | | | | | | | | | This rework allows to address tow memory controllers. AT91SAM9263 and AT91SAM9G45 family have tow SDRAM or DDR/SDRAM controllers. Power management should take care of this. This patch modify the way RAM IP header files are implemented to allow access to registers of both controllers ; it also adds some macros. We also modify the power management files to use those modified header files. Slow clock (assembly) and regular power management functions are synchronized for setting of RAM self-refresh procedure: (lpr & ~AT91_DDRSDRC_LPCB) | AT91_DDRSDRC_LPCB_SELF_REFRESH Note that AT91RM9200 is not impacted by this modification. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Andrew Victor <linux@maxim.org.za> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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