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* ARM: 7989/1: Delete asm/system.hDavid Howells2014-02-251-7/+0
| | | | | | | | | | | | Delete ARM's asm/system.h. It's the last holdout and should be got rid of. This builds for defconfig, lpc32xx_defconfig, exynos_defconfig + XEN, the previous changed to a Gemini system and an omap3 config with TI_DAVINCI_EMAC. Signed-off-by: David Howells <dhowells@redhat.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* the only place that needs to include asm/exec.h is linux/binfmts.hAl Viro2012-09-201-1/+0
| | | | Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
* Disintegrate asm/system.h for ARMDavid Howells2012-03-281-466/+8
| | | | | | | | Disintegrate asm/system.h for ARM. Signed-off-by: David Howells <dhowells@redhat.com> cc: Russell King <linux@arm.linux.org.uk> cc: linux-arm-kernel@lists.infradead.org
* ARM: move CP15 definitions to separate header fileRussell King2012-03-281-77/+0
| | | | | | | | | | | | | | | Avoid namespace conflicts with drivers over the CP15 definitions by moving CP15 related prototypes and definitions to a private header file. Acked-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> [Tegra] Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Tested-by: H Hartley Sweeten <hsweeten@visionengravers.com> [EP93xx] Acked-by: Nicolas Pitre <nico@linaro.org> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: David Howells <dhowells@redhat.com>
* Merge branch 'restart' into for-linusRussell King2012-01-051-1/+0
|\ | | | | | | | | | | | | | | Conflicts: arch/arm/mach-exynos/cpu.c The changes to arch/arm/mach-exynos/cpu.c were moved to mach-exynos/common.c.
| * ARM: restart: remove the now empty arch_reset()Russell King2012-01-051-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove the now empty arch_reset() from all the mach/system.h includes, and remove its callsite. Remove arm_machine_restart() as this function no longer does anything useful. For samsung platforms, remove the include of mach/system-reset.h and plat/system-reset.h from their respective mach/system.h headers as these just define their arch_reset functions. As a result, the s3c2410 and plat-samsung system-reset.h files are no longer referenced, so remove these files entirely. Acked-by: Nicolas Pitre <nico@linaro.org> Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: Jamie Iles <jamie@jamieiles.com> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | ARM: LPAE: Add fault handling supportCatalin Marinas2011-12-081-0/+8
|/ | | | | | | | The DFSR and IFSR register format is different when LPAE is enabled. In addition, DFSR and IFSR have similar definitions for the fault type. This modifies the fault code to correctly handle the new format. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
* ARM: restart: only perform setup for restart when soft-restartingRussell King2011-11-211-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | We only need to set the system up for a soft-restart if we're going to be doing a soft-restart. Provide a new function (soft_restart()) which does the setup and final call for this, and make platforms use it. Eliminate the call to setup_restart() from the default handler. This means that platforms arch_reset() function is no longer called with the page tables prepared for a soft-restart, and caches will still be enabled. Acked-by: Nicolas Pitre <nico@linaro.org> Acked-by: Will Deacon <will.deacon@arm.com> Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Viresh Kumar <viresh.kumar@st.com> Acked-by: Krzysztof Ha■asa <khc@pm.waw.pl> Acked-by: Paul Mundt <lethal@linux-sh.org> Acked-by: Richard Purdie <richard.purdie@linuxfoundation.org> Acked-by: Wan ZongShun <mcuos.com@gmail.com> Acked-by: Eric Miao <eric.y.miao@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* Merge branch 'misc' into for-linusRussell King2011-10-251-2/+2
|\ | | | | | | | | Conflicts: arch/arm/mach-integrator/integrator_ap.c
| * ARM: 7068/1: process: change from __backtrace to dump_stack in show_regsLaura Abbott2011-10-171-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, show_regs calls __backtrace which does nothing if CONFIG_FRAME_POINTER is not set. Switch to dump_stack which handles both CONFIG_FRAME_POINTER and CONFIG_ARM_UNWIND correctly. __backtrace is now superseded by dump_stack in general and show_regs was the last caller so remove __backtrace as well. Signed-off-by: Laura Abbott <lauraa@codeaurora.org> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: 7029/1: Make cpu_architecture into a global variableDave Martin2011-10-171-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | The CPU architecture really should not be changing at runtime, so make it a global variable instead of a function. The cpu_architecture() function declared in <asm/system.h> remains the correct way to read this variable from C code. Signed-off-by: Dave Martin <dave.martin@linaro.org> Reviewed-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | ARM: 7115/4: move __exception and friends to asm/exception.hJamie Iles2011-10-171-7/+0
|/ | | | | | | | | | | | | | | The definition of __exception_irq_entry for CONFIG_FUNCTION_GRAPH_TRACER=y needs linux/ftrace.h, but this creates a circular dependency with it's current home in asm/system.h. Create asm/exception.h and update all current users. v4: - rebase to rmk/for-next v3: - remove redundant includes of linux/ftrace.h v2: - document the usage restricitions of __exception* Cc: Zoltan Devai <zdevai@gmail.com> Signed-off-by: Jamie Iles <jamie@jamieiles.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 6870/1: The mandatory barrier rmb() must be a dsb() in for device accessesCatalin Marinas2011-05-121-1/+1
| | | | | | | | | | Since mandatory barriers may be used (explicitly or implicitly via readl etc.) to ensure the ordering between Device and Normal memory accesses, a DMB is not enough. This patch converts it to a DSB. Cc: Colin Cross <ccross@android.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* Fix common misspellingsLucas De Marchi2011-03-311-1/+1
| | | | | | Fixes generated by 'codespell' and manually reviewed. Signed-off-by: Lucas De Marchi <lucas.demarchi@profusion.mobi>
* ARM: v6k: select cmpxchg code sequences according to V6 variantsRussell King2011-02-021-8/+9
| | | | | | | | | | | | | | If CONFIG_CPU_V6 is enabled, we must avoid the byte/halfword/doubleword exclusive operations, which aren't implemented before V6K. Use the generic versions (or omit them) instead. If CONFIG_CPU_V6 is not set, but CONFIG_CPU_32v6K is enabled, we have the K extnesions, so use these new instructions. Acked-by: Tony Lindgren <tony@atomide.com> Tested-by: Sourav Poddar <sourav.poddar@ti.com> Tested-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* Merge branch 'misc' into develRussell King2011-01-061-0/+7
|\ | | | | | | | | | | | | | | Conflicts: arch/arm/Kconfig arch/arm/common/Makefile arch/arm/kernel/Makefile arch/arm/kernel/smp.c
| * ARM: 6541/1: move sev definition to common system.h include fileShiraz Hashim2010-12-241-0/+7
| | | | | | | | | | | | | | | | | | sev is used to send wakeup event to other cores in ARMv6K and above. This has been moved from platform specific part to standard common ARM header file (asm/system.h). Also introduced wfi() and wfe(). Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | Merge branch 'clksrc' into develRussell King2011-01-051-0/+5
|\ \ | | | | | | | | | | | | | | | | | | Conflicts: arch/arm/mach-vexpress/v2m.c arch/arm/plat-omap/counter_32k.c arch/arm/plat-versatile/Makefile
| * | ARM: place C irq handlers in IRQ_ENTRY for ftraceRabin Vincent2010-11-191-0/+5
| |/ | | | | | | | | | | | | | | When FUNCTION_GRAPH_TRACER is enabled, place do_IRQ() and friends in the IRQ_ENTRY section so that the irq-related features of the function graph tracer work. Signed-off-by: Rabin Vincent <rabin@rab.in>
* | ARM: 6605/1: Add missing include "asm/memory.h"Axel Lin2011-01-031-0/+1
|/ | | | | | | | | | | | | | | | | | | | | This patch fixes below build error by adding the missing asm/memory.h, which is needed for arch_is_coherent(). $ make pxa3xx_defconfig; make CC init/do_mounts_rd.o In file included from include/linux/list_bl.h:5, from include/linux/rculist_bl.h:7, from include/linux/dcache.h:7, from include/linux/fs.h:381, from init/do_mounts_rd.c:3: include/linux/bit_spinlock.h: In function 'bit_spin_unlock': include/linux/bit_spinlock.h:61: error: implicit declaration of function 'arch_is_coherent' make[1]: *** [init/do_mounts_rd.o] Error 1 make: *** [init] Error 2 Signed-off-by: Axel Lin <axel.lin@gmail.com> Acked-by: Peter Huewe <peterhuewe@gmx.de> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
*-. Merge branches 'at91', 'dcache', 'ftrace', 'hwbpt', 'misc', 'mmci', 's3c', ↵Russell King2010-10-181-0/+6
|\ \ | | | | | | | | | 'st-ux' and 'unwind' into devel
| | * ARM: 6428/1: add cpu_idle_wait() to support CPUidle on SMP systems.Kevin Hilman2010-10-081-0/+2
| |/ |/| | | | | | | | | | | | | | | | | | | | | In order for CPUidle to work on SMP systems, an implementation of cpu_idle_wait() is needed. This patch duplicates the x86 implementation of cpu_idle_wait() for ARM. Tested-by: Colin Cross <ccross@android.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: 6355/1: hw-breakpoint: add mechanism for hooking into prefetch abortsWill Deacon2010-09-081-0/+4
|/ | | | | | | | | | | | | | | On ARM processors with hardware breakpoint and watchpoint support, triggering these events results in a debug exception. These manifest as prefetch and data aborts respectively. arch/arm/mm/fault.c already provides hook_fault_code for hooking into data aborts dependent on the DFSR. This patch adds a new function, hook_ifault_code for hooking into prefetch aborts in the same manner. Cc: Frederic Weisbecker <fweisbec@gmail.com> Cc: S. Karthikeyan <informkarthik@gmail.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 6269/1: Add 'code' parameter for hook_fault_code()Kirill A. Shutemov2010-07-271-1/+1
| | | | | | | | Add one more parameter to hook_fault_code() to be able to set 'code' field of struct fsr_info. Signed-off-by: Kirill A. Shutemov <kirill@shutemov.name> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* Merge branch 'devel-stable' into develRussell King2010-05-171-6/+10
|\ | | | | | | | | | | | | Conflicts: arch/arm/Kconfig arch/arm/include/asm/system.h arch/arm/mm/Kconfig
| * ARM: 5996/1: ARM: Change the mandatory barriers implementation (4/4)Catalin Marinas2010-03-251-6/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The mandatory barriers (mb, rmb, wmb) are used even on uniprocessor systems for things like ordering Normal Non-cacheable memory accesses with DMA transfer (via Device memory writes). The current implementation uses dmb() for mb() and friends but this is not sufficient. The DMB only ensures the relative ordering of the observability of accesses by other processors or devices acting as masters. In case of DMA transfers started by writes to device memory, the relative ordering is not ensured because accesses to slave ports of a device are not considered observable by the DMB definition. A DSB is required for the data to reach the main memory (even if mapped as Normal Non-cacheable) before the device receives the notification to begin the transfer. Furthermore, some L2 cache controllers (like L2x0 or PL310) buffer stores to Normal Non-cacheable memory and this would need to be drained with the outer_sync() function call. The patch also allows platforms to define their own mandatory barriers implementation by selecting CONFIG_ARCH_HAS_BARRIERS and providing a mach/barriers.h file. Note that the SMP barriers are unchanged (being DMBs as before) since they are only guaranteed to work with Normal Cacheable memory. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | ARM: Optionally allow ARMv6 to use 'normal, bufferable' memory for DMARussell King2010-05-171-1/+1
|/ | | | | | | | | | | | | Provide a configuration option to allow the ARMv6 to use normal bufferable memory for coherent DMA. This option is forced to 'y' for ARMv7, and offered as a configuration option on ARMv6. Enabling this option requires drivers to have the necessary barriers to ensure that data in DMA coherent memory is visible prior to the DMA operation commencing. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: add notify_die() supportRussell King2010-02-151-2/+1
| | | | | | | | | | | Kernel debuggers want to be informed of die() events, so that they can take some action to allow the problem to be inspected. Provide the hook in a similar manner to x86. Note that we currently don't implement the individual trap hooks. Acked-by: Jason Wessel <jason.wessel@windriver.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: dma-mapping: switch ARMv7 DMA mappings to retain 'memory' attributeRussell King2009-11-241-7/+12
| | | | | | | | | | | | | | On ARMv7, it is invalid to map the same physical address multiple times with different memory types. Since system RAM is already mapped as 'memory', subsequent remapping of it must retain this attribute. However, DMA memory maps it as "strongly ordered". Fix this by introducing 'pgprot_dmacoherent()' which provides the necessary page table bits for DMA mappings. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Acked-by: Greg Ungerer <gerg@uclinux.org> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
* [ARM] Add cmpxchg support for ARMv6+ systems (v5)Mathieu Desnoyers2009-05-281-0/+173
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add cmpxchg/cmpxchg64 support for ARMv6K and ARMv7 systems (original patch from Catalin Marinas <catalin.marinas@arm.com>) The cmpxchg and cmpxchg64 functions can be implemented using the LDREX*/STREX* instructions. Since operand lengths other than 32bit are required, the full implementations are only available if the ARMv6K extensions are present (for the LDREXB, LDREXH and LDREXD instructions). For ARMv6, only 32-bits cmpxchg is available. Mathieu : Make cmpxchg_local always available with best implementation for all type sizes (1, 2, 4 bytes). Make cmpxchg64_local always available. Use "Ir" constraint for "old" operand, like atomic.h atomic_cmpxchg does. Change since v3 : - Add "memory" clobbers (thanks to Nicolas Pitre) - removed __asmeq(), only needed for old compilers, very unlikely on ARMv6+. Note : ARMv7-M should eventually be ifdefed-out of cmpxchg64. But it's not supported by the Linux kernel currently. Put back arm < v6 cmpxchg support. Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@polymtl.ca> CC: Catalin Marinas <catalin.marinas@arm.com> CC: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] barriers: improve xchg, bitops and atomic SMP barriersRussell King2009-05-281-0/+3
| | | | | | | | | | | | | | | | | Mathieu Desnoyers pointed out that the ARM barriers were lacking: - cmpxchg, xchg and atomic add return need memory barriers on architectures which can reorder the relative order in which memory read/writes can be seen between CPUs, which seems to include recent ARM architectures. Those barriers are currently missing on ARM. - test_and_xxx_bit were missing SMP barriers. So put these barriers in. Provide separate atomic_add/atomic_sub operations which do not require barriers. Reported-Reviewed-and-Acked-by: Mathieu Desnoyers <mathieu.desnoyers@polymtl.ca> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* Merge branch 'for-rmk' of git://gitorious.org/linux-gemini/mainline into develRussell King2009-03-261-0/+6
|\ | | | | | | | | | | | | Conflicts: arch/arm/mm/Kconfig Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: Add support for FA526 v2Paulius Zaleckas2009-03-251-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adds support for Faraday FA526 core. This core is used at least by: Cortina Systems Gemini and Centroid family Cavium Networks ECONA family Grain Media GM8120 Pixelplus ImageARM Prolific PL-1029 Faraday IP evaluation boards v2: - move TLB_BTB to separate patch - update copyrights Signed-off-by: Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
* | [ARM] pass reboot command line to arch_reset()Russell King2009-03-191-2/+2
|/ | | | | | | | | | | | | | | OMAP wishes to pass state to the boot loader upon reboot in order to instruct it whether to wait for USB-based reflashing or not. There is already a facility to do this via the reboot() syscall, except we ignore the string passed to machine_restart(). This patch fixes things to pass this string to arch_reset(). This means that we keep the reboot mode limited to telling the kernel _how_ to perform the reboot which should be independent of what we request the boot loader to do. Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] asm/system.h does not require asm/memory.hRussell King2008-11-281-2/+0
| | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] mm: fix page table initializationRussell King2008-11-061-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | As a result of the ptebits changes, we ended up marking device mappings as normal memory on ARMv7 CPUs, resulting in undesirable behaviour with serial ports and the like. While reviewing the section mapping table entries, other errors in the memory type settings for devices were detected and confirmed to prevent Xscale3 platforms booting. Tested on: OMAP34xx (ARMv7), OMAP24xx (ARMv6), OMAP16xx (ARM926T, ARMv5), PXA311 (Xscale3), PXA272 (Xscale), PXA255 (Xscale), IXP42x (Xscale), S3C2410 (ARM920T, ARMv4T), ARM720T (ARMv4T) StrongARM-110 (ARMv4) Acked-by: Tony Lindgren <tony@atomide.com> Tested-by: Robert Jarzmik <robert.jarzmik@free.fr> Tested-by: Mike Rapoport <mike@compulab.co.il> Tested-by: Ben Dooks <ben-linux@fluff.org> Tested-by: Anders Grafström <grfstrm@users.sourceforge.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] cputype: separate definitions, use themRussell King2008-09-011-58/+0
| | | | | | | | Add asm/cputype.h, moving functions and definitions from asm/system.h there. Convert all users of 'processor_id' to the more efficient read_cpuid_id() function. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] move include/asm-arm to arch/arm/include/asmRussell King2008-08-021-0/+388
Move platform independent header files to arch/arm/include/asm, leaving those in asm/arch* and asm/plat* alone. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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