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* ARM: avoid unwanted GCC memset()/memcpy() optimisations for IO variantsRussell King2015-07-031-3/+6
| | | | | | | | | | | | | We don't want GCC optimising our memset_io(), memcpy_fromio() or memcpy_toio() variants, so we must not call one of the standard functions. Provide a separate name for our assembly memcpy() and memset() functions, and use that instead, thereby bypassing GCC's ability to optimise these operations. GCCs optimisation may introduce unaligned accesses which are invalid for device mappings. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: io: convert ioremap*() to functionsRussell King2015-07-031-11/+13
| | | | | | | | | Convert the ioremap*() preprocessor macros to real functions, moving them out of line. This allows us to kill off __arm_ioremap(), and __arm_iounmap() helpers, and remove __arm_ioremap_pfn_caller() from global view. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: io: fix ioremap_wt() implementationRussell King2015-07-031-1/+1
| | | | | | | | | | | | | | | | ioremap_wt() was added by aliasing it to ioremap_nocache(), which is a device mapping. Device mappings do not allow unaligned accesses, but it appears that GCC is able to inline its own memcpy() implementation which may use such accesses. The only user of this is pmem, which uses memcpy() on the region. Therefore, this is unsafe. We must implement ioremap_wt() correctly for ARM, or not at all. This patch adds a more correct implementation by re-using ioremap_wc() to provide a normal-memory non-cacheable mapping. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: io: document ARM specific behaviour of ioremap*() implementationsRussell King2015-07-031-3/+39
| | | | | | | Add documentation of the ARM specific behaviour of the mappings setup by the ioremap() series of macros. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* Merge branch 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-armLinus Torvalds2015-06-261-15/+37
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull ARM updates from Russell King: "Bigger items included in this update are: - A series of updates from Arnd for ARM randconfig build failures - Updates from Dmitry for StrongARM SA-1100 to move IRQ handling to drivers/irqchip/ - Move ARMs SP804 timer to drivers/clocksource/ - Perf updates from Mark Rutland in preparation to move the ARM perf code into drivers/ so it can be shared with ARM64. - MCPM updates from Nicolas - Add support for taking platform serial number from DT - Re-implement Keystone2 physical address space switch to conform to architecture requirements - Clean up ARMv7 LPAE code, which goes in hand with the Keystone2 changes. - L2C cleanups to avoid unlocking caches if we're prevented by the secure support to unlock. - Avoid cleaning a potentially dirty cache containing stale data on CPU initialisation - Add ARM-only entry point for secondary startup (for machines that can only call into a Thumb kernel in ARM mode). Same thing is also done for the resume entry point. - Provide arch_irqs_disabled via asm-generic - Enlarge ARMv7M vector table - Always use BFD linker for VDSO, as gold doesn't accept some of the options we need. - Fix an incorrect BSYM (for Thumb symbols) usage, and convert all BSYM compiler macros to a "badr" (for branch address). - Shut up compiler warnings provoked by our cmpxchg() implementation. - Ensure bad xchg sizes fail to link" * 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-arm: (75 commits) ARM: Fix build if CLKDEV_LOOKUP is not configured ARM: fix new BSYM() usage introduced via for-arm-soc branch ARM: 8383/1: nommu: avoid deprecated source register on mov ARM: 8391/1: l2c: add options to overwrite prefetching behavior ARM: 8390/1: irqflags: Get arch_irqs_disabled from asm-generic ARM: 8387/1: arm/mm/dma-mapping.c: Add arm_coherent_dma_mmap ARM: 8388/1: tcm: Don't crash when TCM banks are protected by TrustZone ARM: 8384/1: VDSO: force use of BFD linker ARM: 8385/1: VDSO: group link options ARM: cmpxchg: avoid warnings from macro-ized cmpxchg() implementations ARM: remove __bad_xchg definition ARM: 8369/1: ARMv7M: define size of vector table for Vybrid ARM: 8382/1: clocksource: make ARM_TIMER_SP804 depend on GENERIC_SCHED_CLOCK ARM: 8366/1: move Dual-Timer SP804 driver to drivers/clocksource ARM: 8365/1: introduce sp804_timer_disable and remove arm_timer.h inclusion ARM: 8364/1: fix BE32 module loading ARM: 8360/1: add secondary_startup_arm prototype in header file ARM: 8359/1: correct secondary_startup_arm mode ARM: proc-v7: sanitise and document registers around errata ARM: proc-v7: clean up MIDR access ...
| * ARM: optimize memset_io()/memcpy_fromio()/memcpy_toio()Russell King2015-05-081-0/+25
| | | | | | | | | | | | | | | | | | If we are building for a LE platform, and we haven't overriden the MMIO ops, then we can optimize the mem*io operations using the standard string functions. Acked-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: 8341/1: io: Unpessimize relaxed io accessorsPeter Hurley2015-05-081-15/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit 195bbcac2e5c12f7fb ("ARM: 7500/1: io: avoid writeback addressing modes for __raw_ accessors") disables writeback addressing modes for raw i/o. However, the "+Q" output constraint forces the compiler to disable load hoist optimizations (because the output constraint informs the compiler of memory stores which the compiler assumes may alias other memory). Since the relaxed accessors only guarantee ordering wrt i/o accesses to the same device and not to main memory, there's never a possibility of an accessor invalidating a hoisted load (because only non-i/o loads would have been hoisted). The effect is especially noticable with complex address inputs in loops. For example, the following code: #include <linux/kernel.h> #include <linux/io.h> static const int *remap; void wr_loop(void __iomem *base, int c, int val) { int i; for (i = 0; i < c; i++) writew_relaxed(val, base + remap[c >> 2]); } generates current master | this patch 0: e3510000 cmp r1, #0 | 0: e3510000 cmp r1, #0 4: d12fff1e bxle lr | 4: d12fff1e bxle lr 8: e3003000 movw r3, #0 | 8: e3c1c003 bic ip, r1, #3 c: e3403000 movt r3, #0 | c: e6ff2072 uxth r2, r2 10: e92d4010 push {r4, lr} | 10: e3a03000 mov r3, #0 14: e6ff2072 uxth r2, r2 | 14: e59cc000 ldr ip, [ip] 18: e3c14003 bic r4, r1, #3 | 18: e080000c add r0, r0, ip 1c: e593e000 ldr lr, [r3] | 20: e3a03000 mov r3, #0 | 1c: e1c020b0 strh r2, [r0] | 20: e2833001 add r3, r3, #1 24: e79ec004 ldr ip, [lr, r4] | 24: e1530001 cmp r3, r1 28: e080c00c add ip, r0, ip | 28: 1afffffb bne 1c 2c: e1cc20b0 strh r2, [ip] | 2c: e12fff1e bx lr 30: e2833001 add r3, r3, #1 | 34: e1530001 cmp r3, r1 | 38: 1afffff9 bne 24 | | 3c: e8bd8010 pop {r4, pc} | Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Peter Hurley <peter@hurleysoftware.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | arch/*/io.h: Add ioremap_wt() to all architecturesToshi Kani2015-06-071-0/+1
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add ioremap_wt() to all arch-specific asm/io.h headers which define ioremap_wc() locally. These headers do not include <asm-generic/iomap.h>. Some of them include <asm-generic/io.h>, but ioremap_wt() is defined for consistency since they define all ioremap_xxx locally. In all architectures without Write-Through support, ioremap_wt() is defined indentical to ioremap_nocache(). frv and m68k already have ioremap_writethrough(). On those we add ioremap_wt() indetical to ioremap_writethrough() and defines ARCH_HAS_IOREMAP_WT in both architectures. The ioremap_wt() interface is exported to drivers. Signed-off-by: Toshi Kani <toshi.kani@hp.com> Signed-off-by: Borislav Petkov <bp@suse.de> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Andy Lutomirski <luto@amacapital.net> Cc: Elliott@hp.com Cc: H. Peter Anvin <hpa@zytor.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Luis R. Rodriguez <mcgrof@suse.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: arnd@arndb.de Cc: hch@lst.de Cc: hmh@hmh.eng.br Cc: jgross@suse.com Cc: konrad.wilk@oracle.com Cc: linux-mm <linux-mm@kvack.org> Cc: linux-nvdimm@lists.01.org Cc: stefan.bader@canonical.com Cc: yigal@plexistor.com Link: http://lkml.kernel.org/r/1433436928-31903-9-git-send-email-bp@alien8.de Signed-off-by: Ingo Molnar <mingo@kernel.org>
* ARM: Use include/asm-generic/io.hThierry Reding2014-11-101-53/+36
| | | | | | | | Include the generic I/O header file so that duplicate implementations can be removed. This will also help to establish consistency across more architectures regarding which accessors they support. Signed-off-by: Thierry Reding <treding@nvidia.com>
* ARM: Define PCI_IOBASE as the base of virtual PCI IO spaceLiviu Dudau2014-09-301-0/+1
| | | | | | | | | | | | | This is needed for calls into OF code that parses PCI ranges. It signals support for memory mapped PCI I/O accesses that are described by device trees. Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Arnd Bergmann <arnd@arndb.de> CC: Russell King <linux@arm.linux.org.uk> CC: Rob Herring <robh+dt@kernel.org>
* ARM: 8060/1: mm: allow sub-architectures to override PCI I/O memory typeThomas Petazzoni2014-06-011-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | Due to a design incompatibility between the PCIe Marvell controller and the Cortex-A9, stressing PCIe devices with a lot of traffic quickly causes a deadlock. One part of the workaround for this is to have all PCIe regions mapped as strongly-ordered (MT_UNCACHED) instead of the default MT_DEVICE. While the arch_ioremap_caller() mechanism allows sub-architecture code to override ioremap(), used to map PCIe memory regions, there isn't such a mechanism to override the behavior of pci_ioremap_io(). This commit adds the arch_pci_ioremap_mem_type variable, initialized to MT_DEVICE by default, and that sub-architecture code can override. We have chosen to expose a single variable rather than offering the possibility of overriding the entire pci_ioremap_io(), because implementing pci_ioremap_io() requires calling functions (get_mem_type()) that are private to the arch/arm/mm/ code. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 7930/1: Introduce atomic MMIO modifyEzequiel Garcia2014-01-281-0/+6
| | | | | | | | | | | | | | | | | | | | Some SoC have MMIO regions that are shared across orthogonal subsystems. This commit implements a possible solution for the thread-safe access of such regions through a spinlock-protected API. Concurrent access is protected with a single spinlock for the entire MMIO address space. While this protects shared-registers, it also serializes access to unrelated/unshared registers. We add relaxed and non-relaxed variants, by using writel_relaxed and writel, respectively. The rationale for this is that some users may not require register write completion but only thread-safe access to a register. Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Jason Cooper <jason@lakedaemon.net> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 7896/1: rename ioremap_cached to ioremap_cacheRob Herring2013-12-291-1/+1
| | | | | | | | | | | | | | | | | | ioremap_cache is more aligned with other architectures. There are only 2 users of this in the kernel: pxa2xx-flash and Xen. This fixes Xen build failures on arm64 caused by commit c04e8e2fe5 (arm64: allow ioremap_cache() to use existing RAM mappings) drivers/tty/hvc/hvc_xen.c:233:2: error: implicit declaration of function 'ioremap_cached' [-Werror=implicit-function-declaration] drivers/xen/grant-table.c:1174:3: error: implicit declaration of function 'ioremap_cached' [-Werror=implicit-function-declaration] drivers/xen/xenbus/xenbus_probe.c:778:4: error: implicit declaration of function 'ioremap_cached' [-Werror=implicit-function-declaration] Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Stefano Stabellini <stefano.stabellini@eu.citrix.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* arm,arm64/include/asm/io.h: define struct bio_vecStefano Stabellini2013-11-081-0/+1
| | | | | | Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
* arm,arm64: do not always merge biovec if we are running on XenStefano Stabellini2013-10-251-0/+8
| | | | | | | | | | | | | This is similar to what it is done on X86: biovecs are prevented from merging otherwise every dma requests would be forced to bounce on the swiotlb buffer. Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Changes in v7: - remove the extra autotranslate check in biomerge.c.
* ARM: 7728/1: mm: Use phys_addr_t properly for ioremap functionsLaura Abbott2013-05-231-4/+4
| | | | | | | | | | | | | Several of the ioremap functions use unsigned long in places resulting in truncation if physical addresses greater than 4G are passed in. Change the types of the functions and the callers accordingly. Cc: Krzysztof Halasa <khc@pm.waw.pl> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Laura Abbott <lauraa@codeaurora.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* Merge 3.7-rc6 into char-misc-nextGreg Kroah-Hartman2012-11-161-2/+2
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| * ARM: 7567/1: io: avoid GCC's offsettable addressing modes for halfword accessesWill Deacon2012-10-291-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Using the 'o' memory constraint in inline assembly can result in GCC generating invalid immediate offsets for memory access instructions with reduced addressing capabilities (i.e. smaller than 12-bit immediate offsets): http://gcc.gnu.org/bugzilla/show_bug.cgi?id=54983 As there is no constraint to specify the exact addressing mode we need, fallback to using 'Q' exclusively for halfword I/O accesses. This may emit an additional add instruction (using an extra register) in order to construct the address but it will always be accepted by GAS. Reported-by: Bastian Hecht <hechtb@googlemail.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | /dev/mem: use phys_addr_t for physical addressesCyril Chemparathy2012-10-241-1/+1
|/ | | | | | | | | This patch fixes the /dev/mem driver to use phys_addr_t for physical addresses. This is required on PAE systems, especially those that run entirely out of >4G physical memory space. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* Merge branch 'for-linus' of git://git.linaro.org/people/rmk/linux-armLinus Torvalds2012-10-071-6/+61
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull ARM updates from Russell King: "This is the first chunk of ARM updates for this merge window. Conflicts are expected in two files - asm/timex.h and mach-integrator/integrator_cp.c. Nothing particularly stands out more than anything else. Most of the growth is down to the opcodes stuff from Dave Martin, which is countered by Rob's patches to use more of the asm-generic headers on ARM." (A few more conflicts grew since then, but it all looked fairly trivial) * 'for-linus' of git://git.linaro.org/people/rmk/linux-arm: (44 commits) ARM: 7548/1: include linux/sched.h in syscall.h ARM: 7541/1: Add ARM ERRATA 775420 workaround ARM: ensure vm_struct has its phys_addr member filled in ARM: 7540/1: kexec: Check segment memory addresses ARM: 7539/1: kexec: scan for dtb magic in segments ARM: 7538/1: delay: add registration mechanism for delay timer sources ARM: 7536/1: smp: Formalize an IPI for wakeup ARM: 7525/1: ptrace: use updated syscall number for syscall auditing ARM: 7524/1: support syscall tracing ARM: 7519/1: integrator: convert platform devices to Device Tree ARM: 7518/1: integrator: convert AMBA devices to device tree ARM: 7517/1: integrator: initial device tree support ARM: 7516/1: plat-versatile: add DT support to FPGA IRQ ARM: 7515/1: integrator: check PL010 base address from resource ARM: 7514/1: integrator: call common init function from machine ARM: 7522/1: arch_timers: register a time/cycle counter ARM: 7523/1: arch_timers: enable the use of the virtual timer ARM: 7531/1: mark kernelmode mem{cpy,set} non-experimental ARM: 7520/1: Build dtb files in all target ARM: Fix build warning in arch/arm/mm/alignment.c ...
| * ARM: 7500/1: io: avoid writeback addressing modes for __raw_ accessorsWill Deacon2012-08-251-6/+61
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Data aborts taken to hyp mode do not provide a valid instruction syndrome field in the HSR if the faulting instruction is a memory access using a writeback addressing mode. For hypervisors emulating MMIO accesses to virtual peripherals, taking such an exception requires disassembling the faulting instruction in order to determine the behaviour of the access. Since this requires manually walking the two stages of translation, the world must be stopped to prevent races against page aging in the guest, where the first-stage translation is invalidated after the hypervisor has translated to an IPA and the physical page is reused for something else. This patch avoids taking this heavy performance penalty when running Linux as a guest by ensuring that our I/O accessors do not make use of writeback addressing modes. Cc: Marc Zyngier <marc.zyngier@arm.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | ARM: Add fixed PCI i/o mappingRob Herring2012-07-251-0/+8
|/ | | | | | | | | | | | | | | | This adds a fixed virtual mapping for PCI i/o addresses. The mapping is located at the last 2MB of vmalloc region (0xfee00000-0xff000000). 2MB is used to align with PMD size, but IO_SPACE_LIMIT is 1MB. The space is reserved after .map_io and can be mapped at any time later with pci_ioremap_io. Platforms which need early i/o mapping (e.g. for vga console) can call pci_map_io_early in their .map_io function. This has changed completely from the 1st implementation which only supported creating the static mapping at .map_io. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Russell King <linux@arm.linux.org.uk> Acked-by: Nicolas Pitre <nico@linaro.org>
* ARM: fix out[bwl]()Russell King2012-05-251-13/+11
| | | | | | | | out[bwl]() had a side effect that gcc read-back from the register after writing its value. This causes a problem for at least 3c589_cs, which spits out lots of "adapter failure, FIFO diagnostic register 2011." Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: fix __io macro for PCMCIARob Herring2012-04-051-1/+1
| | | | | | | | | | | | | | | | | | | | | | With commit c334bc1 (ARM: make mach/io.h include optional), PCMCIA was broken. PCMCIA depends on __io() returning a valid i/o address, and most ARM platforms require IO_SPACE_LIMIT be set to 0xffffffff for PCMCIA. This needs a better fix with a fixed i/o address mapping, but for now we just restore things to the previous behavior. This fixes at91, omap1, pxa and sa11xx. pxa needs io.h if PCI is enabled, but PCMCIA is not. sa11xx already has IO_SPACE_LIMIT set to 0xffffffff, so it doesn't need an io.h. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Joachim Eastwood <joachim.eastwood@jotron.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Andrew Victor <linux@maxim.org.za> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com> Tested-by: Paul Parsons <lost.distance@yahoo.com> (pxa270) Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Olof Johansson <olof@lixom.net>
* Merge tag 'cleanup2' of ↵Linus Torvalds2012-03-291-38/+33
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull "ARM: cleanups of io includes" from Olof Johansson: "Rob Herring has done a sweeping change cleaning up all of the mach/io.h includes, moving some of the oft-repeated macros to a common location and removing a bunch of boiler plate. This is another step closer to a common zImage for multiple platforms." Fix up various fairly trivial conflicts (<mach/io.h> removal vs changes around it, tegra localtimer.o is *still* gone, yadda-yadda). * tag 'cleanup2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (29 commits) ARM: tegra: Include assembler.h in sleep.S to fix build break ARM: pxa: use common IOMEM definition ARM: dma-mapping: convert ARCH_HAS_DMA_SET_COHERENT_MASK to kconfig symbol ARM: __io abuse cleanup ARM: create a common IOMEM definition ARM: iop13xx: fix missing declaration of iop13xx_init_early ARM: fix ioremap/iounmap for !CONFIG_MMU ARM: kill off __mem_pci ARM: remove bunch of now unused mach/io.h files ARM: make mach/io.h include optional ARM: clps711x: remove unneeded include of mach/io.h ARM: dove: add explicit include of dove.h to addr-map.c ARM: at91: add explicit include of hardware.h to uncompressor ARM: ep93xx: clean-up mach/io.h ARM: tegra: clean-up mach/io.h ARM: orion5x: clean-up mach/io.h ARM: davinci: remove unneeded mach/io.h include [media] davinci: remove includes of mach/io.h ARM: OMAP: Remove remaining includes for mach/io.h ARM: msm: clean-up mach/io.h ...
| * ARM: create a common IOMEM definitionRob Herring2012-03-131-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Several platforms create IOMEM defines for casting to 'void __iomem *', and other platforms are incorrectly using __io() macro for the same purpose. This creates a common definition and removes all the platform specific versions. Rather than try to make linux/io.h and asm/io.h assembly safe, the assembly version of IOMEM is moved into asm/assembler.h. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Sekhar Nori <nsekhar@ti.com> Cc: Kevin Hilman <khilman@ti.com> Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Cc: Ryan Mallon <rmallon@gmail.com> Cc: Eric Miao <eric.y.miao@gmail.com> Cc: Haojian Zhuang <haojian.zhuang@marvell.com> Acked-by: David Brown <davidb@codeaurora.org> Cc: Daniel Walker <dwalker@fifo99.com> Cc: Bryan Huntsman <bryanh@codeaurora.org> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Shawn Guo <shawn.guo@linaro.org> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Paul Walmsley <paul@pwsan.com> Acked-by: Viresh Kumar <viresh.kumar@st.com> Cc: Rajeev Kumar <rajeev-dlh.kumar@st.com> Cc: Colin Cross <ccross@android.com> Cc: Olof Johansson <olof@lixom.net> Cc: Stephen Warren <swarren@nvidia.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Arnd Bergmann <arnd@arndb.de>
| * ARM: kill off __mem_pciRob Herring2012-03-061-29/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | __mem_pci is only used to enable readl/writel and friends. Just condition this on readl being defined and remove all the __mem_pci defines. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Lennert Buytenhek <kernel@wantstofly.org> Cc: Imre Kaloz <kaloz@openwrt.org> Cc: Krzysztof Halasa <khc@pm.waw.pl> Cc: Nicolas Pitre <nico@fluxnic.net> Cc: Ben Dooks <ben-linux@fluff.org> Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: Colin Cross <ccross@android.com> Cc: Olof Johansson <olof@lixom.net> Cc: Stephen Warren <swarren@nvidia.com>
| * ARM: make mach/io.h include optionalRob Herring2012-03-061-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | Add a kconfig option NEED_MACH_IO_H to conditionally include mach/io.h. Basing this on CONFIG_PCI and CONFIG_ISA doesn't quite work. Most ISA platforms don't need mach/io.h, but ebsa110 does. Most PCI platforms need mach/io.h for now, but ks8695 doesn't which means i/o accesses are broken. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Russell King <linux@arm.linux.org.uk> Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: Nicolas Pitre <nico@linaro.org>
| * ARM: remove compile time __arch_ioremap/__arch_iounmapRob Herring2012-03-061-10/+5
| | | | | | | | | | | | | | | | | | Now that all custom ioremap/iounmap users are converted to runtime hook, remove the compile time defines. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Russell King <linux@arm.linux.org.uk> Acked-by: Nicolas Pitre <nico@linaro.org>
| * ARM: provide runtime hook for ioremap/iounmapRob Herring2012-03-061-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We have compile time over-ride of ioremap and iounmap, but an run-time override is needed for multi-platform builds. This adds an extra function pointer check, but ioremap is not peformance critical. The option for compile time selection remains. The caller variant is used here to provide correct caller information as ARM can only support level 0 for __builtin_return_address. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Russell King <linux@arm.linux.org.uk> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Nicolas Pitre <nico@linaro.org>
* | Disintegrate asm/system.h for ARMDavid Howells2012-03-281-1/+1
|/ | | | | | | | Disintegrate asm/system.h for ARM. Signed-off-by: David Howells <dhowells@redhat.com> cc: Russell King <linux@arm.linux.org.uk> cc: linux-arm-kernel@lists.infradead.org
* arm: switch to GENERIC_PCI_IOMAPMichael S. Tsirkin2011-11-281-1/+1
| | | | | | | | arm copied pci_iomap from generic code, probably to avoid pulling the rest of iomap.c in. Since that's in a separate file now, we can reuse the common implementation. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* Merge branch 'for-linus' of ↵Linus Torvalds2011-10-251-1/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial: (59 commits) MAINTAINERS: linux-m32r is moderated for non-subscribers linux@lists.openrisc.net is moderated for non-subscribers Drop default from "DM365 codec select" choice parisc: Kconfig: cleanup Kernel page size default Kconfig: remove redundant CONFIG_ prefix on two symbols cris: remove arch/cris/arch-v32/lib/nand_init.S microblaze: add missing CONFIG_ prefixes h8300: drop puzzling Kconfig dependencies MAINTAINERS: microblaze-uclinux@itee.uq.edu.au is moderated for non-subscribers tty: drop superfluous dependency in Kconfig ARM: mxc: fix Kconfig typo 'i.MX51' Fix file references in Kconfig files aic7xxx: fix Kconfig references to READMEs Fix file references in drivers/ide/ thinkpad_acpi: Fix printk typo 'bluestooth' bcmring: drop commented out line in Kconfig btmrvl_sdio: fix typo 'btmrvl_sdio_sd6888' doc: raw1394: Trivial typo fix CIFS: Don't free volume_info->UNC until we are entirely done with it. treewide: Correct spelling of successfully in comments ...
| * doc: fix broken referencesPaul Bolle2011-09-271-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | There are numerous broken references to Documentation files (in other Documentation files, in comments, etc.). These broken references are caused by typo's in the references, and by renames or removals of the Documentation files. Some broken references are simply odd. Fix these broken references, sometimes by dropping the irrelevant text they were part of. Signed-off-by: Paul Bolle <pebolle@tiscali.nl> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
* | Merge branch 'misc' into for-linusRussell King2011-10-251-5/+6
|\ \ | | | | | | | | | | | | Conflicts: arch/arm/mach-integrator/integrator_ap.c
| * | ARM: 7129/1: Add __arm_ioremap_exec for mapping external memory as MT_MEMORYTony Lindgren2011-10-221-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This allows mapping external memory such as SRAM for use. This is needed for some small chunks of code, such as reprogramming SDRAM memory source clocks that can't be executed in SDRAM. Other use cases include some PM related code. Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Acked-by: Andres Salomon <dilinger@queued.net> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | ARM: 7118/1: rename temp variable in read*_relaxed()Olof Johansson2011-10-171-5/+5
| |/ | | | | | | | | | | | | | | | | | | | | | | This resolves the following sparse warning from readl() and other macros, which ends up embedding readl_relaxed() using the same variable. arch/arm/mach-tegra/dma.c:169:8: warning: symbol '__v' shadows an earlier one arch/arm/mach-tegra/dma.c:169:8: originally declared here Signed-off-by: Olof Johansson <olof@lixom.net> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| |
| \
*-. \ Merge branches 'arnd-randcfg-fixes', 'debug', 'io' (early part), 'l2x0', ↵Russell King2011-10-251-0/+27
|\ \ \ | |_|/ |/| | | | | 'p2v', 'pgt' (early part) and 'smp' into for-linus
| | * ARM: io: add a default IO_SPACE_LIMIT definitionRussell King2011-08-171-0/+21
| |/ |/| | | | | | | | | | | Add a default IO_SPACE_LIMIT definition. Explain the chosen value and suggest why platforms would want to make it larger. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: add io{read,write}{16,32}be functionsArnd Bergmann2011-10-011-0/+6
|/ | | | | | | These functions are used in some PCI drivers with big-endian MMIO space, and they are trivial to add here. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* ARM: io: ensure inb/outb() et.al. are properly ordered on ARMv6+Russell King2011-01-311-16/+17
| | | | | | | | | | | Ensure that the ISA/PCI IO space accessors are properly ordered on ARMv6+ architectures. These should always be ordered with respect to all other accesses. This also fixes __iormb() and __iowmb() not being visible to ioread/ iowrite if a platform defines its own MMIO accessors. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: io: simplify ioremap* and iounmap definitionsRussell King2010-12-081-7/+4
| | | | | | | | | | We don't need to repeat the same definitions of the ioremap*(), once in terms of __arch_ioremap() and again in terms of __arm_ioremap(). Instead, if the platform hasn't provided an __arch_ioremap, define this to be __arm_ioremap, and only define the ioremap*() set using __arch_ioremap. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: io: make iounmap() a simple macroRussell King2010-12-081-2/+2
| | | | | | | | | | Defining iounmap() with arguments prevents it from being used as a function pointer, causing platforms to work around this. Instead, define it to be a simple macro. Do the same for __arch_io(re|un)map too. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: implement CONFIG_STRICT_DEVMEM by disabling access to RAM via /dev/memNicolas Pitre2010-10-011-0/+1
| | | | | | | | There are very few legitimate use cases, if any, for directly accessing system RAM through /dev/mem. So let's mimic what they do on x86 and forbid it when CONFIG_STRICT_DEVMEM is turned on. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
* ARM: Add barriers to io{read,write}{8,16,32} accessors as wellRussell King2010-07-291-20/+18
| | | | | | | | | The ioread/iowrite accessors also need barriers as they're used in place of readl/writel et.al. in portable drivers. Create __iormb() and __iowmb() which are conditionally defined to be barriers dependent on ARM_DMA_MEM_BUFFERABLE, and always use these macros in the accessors. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 6273/1: Add barriers to the I/O accessors if ARM_DMA_MEM_BUFFERABLECatalin Marinas2010-07-291-0/+11
| | | | | | | | | | | | | | | | | | | | | | | When the coherent DMA buffers are mapped as Normal Non-cacheable (ARM_DMA_MEM_BUFFERABLE enabled), buffer accesses are no longer ordered with Device memory accesses causing failures in device drivers that do not use the mandatory memory barriers before starting a DMA transfer. LKML discussions led to the conclusion that such barriers have to be added to the I/O accessors: http://thread.gmane.org/gmane.linux.kernel/683509/focus=686153 http://thread.gmane.org/gmane.linux.ide/46414 http://thread.gmane.org/gmane.linux.kernel.cross-arch/5250 This patch introduces a wmb() barrier to the write*() I/O accessors to handle the situations where Normal Non-cacheable writes are still in the processor (or L2 cache controller) write buffer before a DMA transfer command is issued. For the read*() accessors, a rmb() is introduced after the I/O to avoid speculative loads where the driver polls for a DMA transfer ready bit. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 6271/1: Introduce *_relaxed() I/O accessorsCatalin Marinas2010-07-291-12/+17
| | | | | | | | | | | | This patch introduces readl*_relaxed()/write*_relaxed() as the main I/O accessors (when __mem_pci is defined). The standard read*()/write*() macros are now based on the relaxed accessors. This patch is in preparation for a subsequent patch which adds barriers to the I/O accessors. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: Add caller information to ioremapRussell King2010-02-151-2/+9
| | | | | | | | | This allows the procfs vmallocinfo file to show who created the ioremap regions. Note: __builtin_return_address(0) doesn't do what's expected if its used in an inline function, so we leave __arm_ioremap callers in such places alone. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] Add a common typesafe __io implementationRussell King2008-11-301-0/+8
| | | | | | | | As Al did for Versatile in 2ad4f86b60b649fd7428265c08d73a3bd360c81b, add a typesafe __io implementation for platforms to use. Convert platforms to use this new simple typesafe implementation. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] Remove MT_DEVICE_IXP2000 and associated definitionsRussell King2008-10-011-3/+2
| | | | | | | | As of the previous commit, MT_DEVICE_IXP2000 encodes to the same PTE bit encoding as MT_DEVICE, so it's now redundant. Convert MT_DEVICE_IXP2000 to use MT_DEVICE instead, and remove its aliases. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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