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* arm: dts: vexpress: add missing CCI PMU device node to TC2Sudeep Holla2015-07-081-0/+10
| | | | | | | | | | | | The CCI device node was added to vexpress CA15_A7(i.e. TC2) much before the CCI PMU support and binding was added. This patch adds the missing PMU node so that CCI PMUs can be used on TC2. Cc: Liviu Dudau <liviu.dudau@arm.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Punit Agrawal <punit.agrawal@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> Signed-off-by: Kevin Hilman <khilman@linaro.org>
* arm: dts: vexpress: describe all PMUs in TC2 dtsMark Rutland2015-07-081-2/+13
| | | | | | | | | | | | | | | | | The dts for the CoreTile Express A15x2 A7x3 (TC2) only describes the PMUs of the Cortex-A15 CPUs, and not the Cortex-A7 CPUs. Now that we have a mechanism for describing disparate PMUs and their interrupts in device tree, this patch makes use of these to describe the PMUs for all CPUs in the system. For consistency, the existing A15 PMU interrupt-affinity property is reflowed across two lines. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Acked-by: Will Deacon <will.deacon@arm.com> Acked-by: Sudeep Holla <sudeep.holla@arm.com> Cc: Liviu Dudau <liviu.dudau@arm.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Kevin Hilman <khilman@linaro.org>
* ARM: vexpress/tc2: Add interrupt-affinity to the PMU nodeSudeep Holla2015-05-121-0/+1
| | | | | | | | | | | | | | | | Commit 9fd85eb502a7 ("ARM: pmu: add support for interrupt-affinity property") added an optional "interrupt-affinity" property, to specify the CPU affinity for each SPI listed in the interrupts property. Without this property, we get this boot warning: CPU PMU: Failed to parse <no-node>/interrupt-affinity[0] This patch adds interrupt-affinity to the PMU node in the vexpress-ca15_a7(a.k.a TC2) device tree. Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* coresight: remove the unnecessary configuration coresight-default-sinkKaixu Xia2015-04-031-1/+0
| | | | | | | | | The coresight-default-sink configuration option has been removed from the framework. As such remove it from DT and bindings. Signed-off-by: Kaixu Xia <xiakaixu@huawei.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight: adding basic support for Vexpress TC2Mathieu Poirier2014-11-071-0/+199
| | | | | | | | | | Support for the 2 PTMs, 3 ETMs, funnel, TPIU and replicator connected to the ETB are included. Proper handling of the ITM and the replicator linked to it along with the CTIs and SWO are not included. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* drivers: cpuidle: initialize big.LITTLE driver through DTLorenzo Pieralisi2014-09-251-0/+23
| | | | | | | | | | | | | | With the introduction of DT based idle states, CPUidle drivers for ARM can now initialize idle states data through properties in the device tree. This patch adds code to the big.LITTLE CPUidle driver to dynamically initialize idle states data through the updated device tree source file. Cc: Chander Kashyap <k.chander@samsung.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
* mfd: vexpress: Convert custom func API to regmapPawel Moll2014-05-151-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Components of the Versatile Express platform (configuration microcontrollers on motherboard and daughterboards in particular) talk to each other over a custom configuration bus. They provide miscellaneous functions (from clock generator control to energy sensors) which are represented as platform devices (and Device Tree nodes). The transactions on the bus can be generated by different "bridges" in the system, some of which are universal for the whole platform (for the price of high transfer latencies), others restricted to a subsystem (but much faster). Until now drivers for such functions were using custom "func" API, which is being replaced in this patch by regmap calls. This required: * a rework (and move to drivers/bus directory, as suggested by Samuel and Arnd) of the config bus core, which is much simpler now and uses device model infrastructure (class) to keep track of the bridges; non-DT case (soon to be retired anyway) is simply covered by a special device registration function * the new config-bus driver also takes over device population, so there is no need for special matching table for of_platform_populate nor "simple-bus" hack in the arm64 model dtsi file (relevant bindings documentation has been updated); this allows all the vexpress devices fit into normal device model, making it possible to remove plenty of early inits and other hacks in the near future * adaptation of the syscfg bridge implementation in the sysreg driver, again making it much simpler; there is a special case of the "energy" function spanning two registers, where they should be both defined in the tree now, but backward compatibility is maintained in the code * modification of the relevant drivers: * hwmon - just a straight-forward API change * power/reset driver - API change * regulator - API change plus error handling simplification * osc clock driver - this one required larger rework in order to turn in into a standard platform driver Signed-off-by: Pawel Moll <pawel.moll@arm.com> Acked-by: Mark Brown <broonie@linaro.org> Acked-by: Lee Jones <lee.jones@linaro.org> Acked-by: Guenter Roeck <linux@roeck-us.net> Acked-by: Mike Turquette <mturquette@linaro.org>
* Merge tag 'late-for-linus' of ↵Linus Torvalds2013-09-091-0/+25
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC late changes from Kevin Hilman: "These are changes that arrived a little late before the merge window, or had dependencies on previous branches. Highlights: - ux500: misc. cleanup, fixup I2C devices - exynos: DT updates for RTC; PM updates - at91: DT updates for NAND; new platforms added to generic defconfig - sunxi: DT updates: cubieboard2, pinctrl driver, gated clocks - highbank: LPAE fixes, select necessary ARM errata - omap: PM fixes and improvements; OMAP5 mailbox support - omap: basic support for new DRA7xx SoCs" * tag 'late-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (60 commits) ARM: dts: vexpress: Add CCI node to TC2 device-tree ARM: EXYNOS: Skip C1 cpuidle state for exynos5440 ARM: EXYNOS: always enable PM domains support for EXYNOS4X12 ARM: highbank: clean-up some unused includes ARM: sun7i: Enable the A20 clocks in the DTSI ARM: sun6i: Enable clock support in the DTSI ARM: sun5i: dt: Use the A10s gates in the DTSI ARM: at91: at91_dt_defconfig: enable rm9200 support ARM: dts: add ADC device tree node for exynos5420/5250 ARM: dts: Add RTC DT node to Exynos5420 SoC ARM: dts: Update the "status" property of RTC DT node for Exynos5250 SoC ARM: dts: Fix the RTC DT node name for Exynos5250 irqchip: mmp: avoid to include irqs head file ARM: mmp: avoid to include head file in mach-mmp irqchip: mmp: support irqchip irqchip: move mmp irq driver ARM: OMAP: AM33xx: clock: Add RNG clock data ARM: OMAP: TI81XX: add always-on powerdomain for TI81XX ARM: OMAP4: clock: Lock PLLs in the right sequence ARM: OMAP: AM33XX: hwmod: Add hwmod data for debugSS ...
| * ARM: dts: vexpress: Add CCI node to TC2 device-treeJon Medhurst (Tixy)2013-08-301-0/+25
| | | | | | | | | | | | | | | | | | | | The Versatile Express V2P-CA15_A7 (aka TC2) has a CCI-400 which is needed to get Multi-Cluster Power Management (MCPM) working. Signed-off-by: Jon Medhurst <tixy@linaro.org> Acked-by: Pawel Moll <pawel.moll@arm.com> Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Olof Johansson <olof@lixom.net>
* | ARM: vexpress: Add SCC to V2P-CA15_A7's device treePawel Moll2013-08-071-0/+6
|/ | | | | | | | | SCC (Serial Configuration Controller) is used to set initial conditions for the test chip (TC2). Its registers are also mapped in normal address space and used to obtain runtime information and for power management. Signed-off-by: Pawel Moll <pawel.moll@arm.com>
* ARM: vexpress: Remove A9 PMU compatible values for non-A9 platformsPawel Moll2013-04-111-1/+1
| | | | | | | | | | | | The ARM perf core code used to rely on the pmu node being compatible with "arm,cortex-a9-pmu", even when the PMUs of the different Cortex-A processors are not really compatible... This is no longer required and actually became harmful, so remove all the offending values from Versatile Express DTS files. Signed-off-by: Pawel Moll <pawel.moll@arm.com> Signed-off-by: Olof Johansson <olof@lixom.net>
* ARM: vexpress: Fix wdt interrupt in ca15{-tc1,_a7} dtsMark Rutland2013-01-291-1/+1
| | | | | | | | | | | | As the wdt nodes have the gic as their interrupt-parent, their interrupts property should be 3 cells in format described in the gic devicetree binding document. This patch fixes the interrupts property in the wdt nodes to be in the correct format. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Pawel Moll <pawel.moll@arm.com>
* ARM: vexpress: Enable A7 cores in V2P-CA15_A7's Device TreePawel Moll2013-01-241-2/+0
| | | | | | | | As the kernel is able to cope with multiple clusters, uncomment the A7 cores in the Device Tree for V2P-CA15_A7 tile, making all 5 cores available to the user. Signed-off-by: Pawel Moll <pawel.moll@arm.com>
* ARM: vexpress: Remove motherboard dependencies in the DTS filesPawel Moll2012-11-051-3/+8
| | | | | | | | | | | The way the VE motherboard Device Trees were constructed enforced naming and structure of daughterboard files. This patch makes it possible to simply include the motherboard description anywhere in the main Device Tree and retires the "arm,v2m-timer" alias - any of the motherboard SP804 timers will be used instead. Signed-off-by: Pawel Moll <pawel.moll@arm.com>
* ARM: vexpress: Add config bus components and clocks to DTsPawel Moll2012-11-051-0/+175
| | | | | | | | Add description of all functions provided by Versatile Express motherboard and daughterboards configuration controllers and clock dependencies between devices. Signed-off-by: Pawel Moll <pawel.moll@arm.com>
* ARM: vexpress: Add Device Tree for V2P-CA15_CA7 core tilePawel Moll2012-07-131-0/+188
This patch adds Device Tree file for the CoreTile Express A15x2 A7x3 (V2P-CA15_CA7). Note that the A7 cpu nodes are commented out, as the big.LITTLE-relevant patches are not upstreamed yet. Till this time one can use the board with two A15 cores only, keeping the A7s in reset by adding the following setting to the board.txt file in Versatile Express configuration tree: SCC: 0x018 0x00001FFF Signed-off-by: Pawel Moll <pawel.moll@arm.com>
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