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* ARM: dts: tegra: move serial aliases to per-boardOlof Johansson2014-11-131-0/+1
| | | | | | | | | | | | | | There are general changes pending to make the /aliases/serial* entries number the serial ports on the system. On Tegra, so far the ports have been just numbered dynamically as they are configured so that makes them change. To avoid this, add specific aliases per board to keep the old numbers. This allows us to change the numbering by default on future SoCs while keeping the numbering on existing boards. Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Thierry Reding <treding@nvidia.com>
* ARM: tegra: set up /aliases entries for RTCsStephen Warren2013-12-181-0/+5
| | | | | | | | | | This ensures that the PMIC RTC provides the system time, rather than the on-SoC RTC, which is not battery-backed. tegra124-venice2.dts isn't touched yet since we haven't added any off- SoC RTC device to its device tree. Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: convert dts files of Tegra20 platforms to use pinctrl definesLaxman Dewangan2013-12-161-20/+20
| | | | | | | | Use Tegra pinconrol dt-binding macro to set the values of different pinmux properties of Tegra20 platforms. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: convert device tree files to use key definesLaxman Dewangan2013-12-161-4/+5
| | | | | | | | | | | | | Use key code macros for all key code refernced for keys. For tegra20-seaboard.dts and tegra20-harmony.dts: The key comment for key (16th row and 1st column) is KEY_KPSLASH but code is 0x004e which is the key code for KEY_KPPLUS. As there other key exist with KY_KPPLUS, I am assuming key code is wrong and comment is fine. With this assumption, I am keeping the key code as KEY_KPSLASH. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: fix node sort orderStephen Warren2013-12-161-13/+13
| | | | | | | | | | | | | | | For Tegra DT files, I've been attempting to keep the nodes sorted in the order: 1) Nodes with reg, in order of reg. 2) Nodes without reg, alphabetically. This patch fixes a few escapees that I missed:-( The diffs look larger than they really are, because sometimes when one node was moved up or down, diff chose to represent this as many other nodes being moved the other way! Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: add missing unit addresses to DTStephen Warren2013-12-161-7/+7
| | | | | | | | | | DT node names should include a unit address iff the node has a reg property. For Tegra DTs at least, we were previously applying a different rule, namely that node names only needed to include a unit address if it was required to make the node name unique. Consequently, many unit addresses are missing. Add them. Signed-off-by: Stephen Warren <swarren@nvidia.com>
* Merge tag 'dt-for-linus' of ↵Linus Torvalds2013-09-061-1/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC DT updates from Olof Johansson: "Device tree and bindings updates for 3.12. General additions of various on-chip and on-board peripherals on various platforms as support gets added. Some of the bigger changes are: - Addition of (new) PCI-e support on Tegra. - More Tegra4 support, including PMC configuration for Dalmore. - Addition of a new board for Exynos4 (trats2) and more bindings for 4x12 IP. - Addition of Allwinner A20 and A31 SoC and board files. - Move of the ST Ericsson device tree files to now use ste-* prefix. - More move of hardware description of shmobile platforms to DT. - Two new board dts files for Freescale MXs" * tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (177 commits) dts: Rename DW APB timer compatible strings dts: Deprecate ALTR as a vendor prefix of: add vendor prefix for Altera Corp. ARM: at91/dt: sam9x5ek: add sound configuration ARM: at91/dt: sam9x5ek: enable SSC ARM: at91/dt: sam9x5ek: add WM8731 codec ARM: at91/dt: sam9x5: add SSC DMA parameters ARM: at91/dt: add at91rm9200 PQFP package version ARM: at91: at91rm9200: set default mmc0 pinctrl-names ARM: at91: at91sam9n12: correct pin number of gpio-key ARM: at91: at91sam9n12: add qt1070 support ARM: at91: at91sam9n12: add pinctrl of TWI ARM: at91: Add PMU support for sama5d3 ARM: at91: at91sam9260: add missing pinctrl-names on mmc ARM: tegra: configure power off for Dalmore ARM: DT: binding fixup to align with vendor-prefixes.txt (DT) ARM: dts: add sdio blocks to bcm28155-ap board ARM: dts: align sdio numbers to HW definition ARM: sun7i: Add Olimex A20-Olinuxino-Micro support ARM: sun7i: Add Allwinner A20 DTSI ...
| * ARM: tegra: enable LP1 suspend modeJoseph Lo2013-08-121-1/+1
| | | | | | | | | | | | | | | | Enabling the LP1 suspend mode for Tegra devices. Tested-by: Marc Dietrich <marvin24@gmx.de> # paz00 board Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* | Merge tag 'usb-3.12-rc1' of ↵Linus Torvalds2013-09-031-2/+0
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb Pull USB patches from Greg KH: "Here's the big USB driver pull request for 3.12-rc1 Lots of USB driver fixes and updates. Nothing major, just the normal xhci, gadget, and other driver changes. Full details in the shortlog" * tag 'usb-3.12-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (352 commits) usbcore: fix incorrect type in assignment in descriptors_changed() usbcore: compare and release one bos descriptor in usb_reset_and_verify_device() ehci: remove debugging statement with ehci statistics in ehci_stop() ehci: remove duplicate debug_async_open() prototype in ehci-dbg.c ehci: enable debugging code when CONFIG_DYNAMIC_DEBUG is set ehci: remove ehci_vdbg() verbose debugging statements Documentation sysfs-bus-usb: Document which files are used by libusb Documentation sysfs-bus-usb: Document the speed file used by libusb Documentation sysfs-bus-usb: Move files with known users to stable USB: fix build error when CONFIG_PM_SLEEP isn't enabled usb: r8a66597-hcd: use platform_{get,set}_drvdata() usb: phy-tegra-usb: use platform_{get,set}_drvdata() usb: acm gadget: Null termintate strings table dma: cppi41: off by one in desc_to_chan() xhci: Fix warning introduced by disabling runtime PM. dev-core: fix build break when DEBUG is enabled USB: OHCI: Allow runtime PM without system sleep usb: ohci-at91: remove unnecessary dev_set_drvdata() usb: renesas_usbhs: use platform_{get,set}_drvdata() usb: fotg210-udc: use platform_{get,set}_drvdata() ...
| * | arm: tegra: Remove obsolete nvidia,vbus-gpio propertiesMikko Perttunen2013-07-291-2/+0
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | USB VBUS regulators are now specified with the vbus-supply property instead of nvidia,vbus-gpio, so remove the obsolete properties. The equivalent vbus-supply properties were already added in patch "ARM: tegra: update device trees for USB binding rework". Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
* | ARM: tegra: always enable USB VBUS regulatorsStephen Warren2013-08-211-0/+4
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes a regression exposed during the merge window by commit 9f310de "ARM: tegra: fix VBUS regulator GPIO polarity in DT"; namely that USB VBUS doesn't get turned on, so USB devices are not detected. This affects the internal USB port on TrimSlice (i.e. the USB->SATA bridge, to which the SSD is connected) and the external port(s) on Seaboard/ Springbank and Whistler. The Tegra DT as written in v3.11 allows two paths to enable USB VBUS: 1) Via the legacy DT binding for the USB controller; it can directly acquire a VBUS GPIO and activate it. 2) Via a regulator for VBUS, which is referenced by the new DT binding for the USB controller. Those two methods both use the same GPIO, and hence whichever of the USB controller and regulator gets probed first ends up owning the GPIO. In practice, the USB driver only supports path (1) above, since the patches to support the new USB binding are not present until v3.12:-( In practice, the regulator ends up being probed first and owning the GPIO. Since nothing enables the regulator (the USB driver code is not yet present), the regulator ends up being turned off. This originally caused no problem, because the polarity in the regulator definition was incorrect, so attempting to turn off the regulator actually turned it on, and everything worked:-( However, when testing the new USB driver code in v3.12, I noticed the incorrect polarity and fixed it in commit 9f310de "ARM: tegra: fix VBUS regulator GPIO polarity in DT". In the context of v3.11, this patch then caused the USB VBUS to actually turn off, which broke USB ports with VBUS control. I got this patch included in v3.11-rc1 since it fixed a bug in device tree (incorrect polarity specification), and hence was suitable to be included early in the rc series. I evidently did not test the patch at all, or correctly, in the context of v3.11, and hence did not notice the issue that I have explained above:-( Fix this by making the USB VBUS regulators always enabled. This way, if the regulator owns the GPIO, it will always be turned on, even if there is no USB driver code to request the regulator be turned on. Even ignoring this bug, this is a reasonable way to configure the HW anyway. If this patch is applied to v3.11, it will cause a couple pretty trivial conflicts in tegra20-{trimslice,seaboard}.dts when creating v3.12, since the context right above the added lines changed in patches destined for v3.12. Reported-by: Kyle McMartin <kmcmarti@redhat.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
* ARM: tegra: fix VBUS regulator GPIO polarity in DTStephen Warren2013-07-031-0/+2
| | | | | | | | | | Commit 4c94c8b "ARM: tegra: update device trees for USB binding rework" added regulator definitions for GPIO-controlled USB VBUS. However, none of these contained the essential DT property enable-active-high. Add this so that the regulator definitions are correct. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* ARM: tegra20: convert device tree files to use CLK definesHiroshi Doyu2013-05-281-1/+3
| | | | | | | | | | | | Use the Tegra20 CAR binding header (tegra20-car.h) to replace magic numbers in the device tree. For example, - clocks = <&tegra_car 28>; + clocks = <&tegra_car CLK_HOST1X>; Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> [swarren, updated since tegra20-car.h moved for consistency] Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: convert device tree files to use IRQ definesStephen Warren2013-05-281-1/+1
| | | | | | Use the GIC and standard IRQ binding defines in all IRQ specifiers. Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: convert device tree files to use GPIO definesStephen Warren2013-05-281-5/+6
| | | | | | | Use TEGRA_GPIO() macro to name all GPIOs referenced by GPIO properties, and some interrupts properties. Use standard GPIO flag defines too. Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: use #include for all device treesStephen Warren2013-05-281-1/+1
| | | | | | | | | | | | | Replace /include/ (dtc) with #include (C pre-processor) for all Tegra DT files, so that gcc -E handles the entire include tree, and hence any of those files can #include some other file e.g. for constant definitions. This allows future use of #defines and header files in order to define names for various constants, such as the IDs and flags in GPIO specifiers. Use of those features will increase the readability of the device tree files. Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: update device trees for USB binding reworkVenu Byravarasu2013-05-171-0/+28
| | | | | | | | | | | | | This patch updates all Tegra board files so that they contain all the properties required by the updated USB DT binding. Note that this patch only adds the new properties and does not yet remove the old properties, in order to maintain bisectability. The old properties will be removed once the driver has been updated to assume the new bindings. Signed-off-by: Venu Byravarasu <vbyravarasu@nvidia.com> [swarren: fixed some newly added regulator-name properties to better match schematic, avoided duplicate regulator-name on Whistler.] Signed-off-by: Stephen Warren <swarren@nvidia.com>
* clk: tegra: Fix cdev1 and cdev2 IDsPrashant Gaikwad2013-04-041-1/+1
| | | | | | | | Correct IDs for cdev1 and cdev2 are 94 and 93 respectively. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> [swarren: split into separate driver and device-tree patches] Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: dts: tegra: add the PM configurations of PMCJoseph Lo2013-04-041-0/+8
| | | | | | | | Adding the PM configuration of PMC when the platform support suspend function. Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: add non-removable and keep-power-in-suspend property for MMCJoseph Lo2013-04-041-0/+1
| | | | | | | | | | | This patch adds "non-removable" property of MMC host where the eMMC device is for Tegra platform. And the "keep-power-in-suspend" property was used for the SDIO device that need this to go into suspend mode (e.g. BRCM43xx series). Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: whistler: add wakeup source for KBCJoseph Lo2013-04-041-0/+1
| | | | | | | Adding KBC as a wakeup source for Whistler board. Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: add clocks property to sound nodesStephen Warren2013-04-041-0/+3
| | | | | | | | Audio-related clocks need to be represented in the device tree. Update bindings to describe which clocks are needed, and DT files to include those clocks. Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: add clock source of PMC to device treesJoseph Lo2013-04-031-0/+13
| | | | | | | Adding the bindings of the clock source of PMC in DT. Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: dts: tegra: fix the activate polarity of cd-gpio in mmc hostJoseph Lo2013-03-111-0/+1
| | | | | | | | The GPIO pin of SD slot card detection should active low. Signed-off-by: Joseph Lo <josephl@nvidia.com> Tested-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: move serial clock-frequency attr into the Tegra20 dtsiLucas Stach2013-01-281-1/+0
| | | | | | | | | No Tegra20 Platform is running PLL_P at another rate than 216MHz, nor is any using any other PLL as UART source clock. Move attribute into SoC level dtsi file to slim down board DT files. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: whistler: enable keyboard in DTLaxman Dewangan2013-01-281-0/+12
| | | | | | | | | | | | Enable Tegra based keyboard controller and populate the key mapping for Whistler. With this patch, HOME, BACK, POWER and MENU keys will work. Still other keys which are in ROW3 and ROW4 will not work as it conflicts with KBC pins on SDIO2 pinmux. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: DT: tegra: Unify the description of Tegra20 boardsBryan Wu2013-01-281-1/+1
| | | | | | | Use engineering name 'Tegra20' instead of 'Tegra2' Signed-off-by: Bryan Wu <pengw@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: whistler: enable HDMI portStephen Warren2012-11-161-2/+19
| | | | | | | | | | Enable host1x, and the HDMI output. Whistler also has a DSI-based LCD, and a VGA output. tegradrm doesn't support either of those output types yet. Based on work by Thierry Reding for TrimSlice. Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: update *.dts for regulator-compatible deprecationStephen Warren2012-11-051-90/+29
| | | | | | | | | Commit 13511de "regulator: deprecate regulator-compatible DT property" now allows for simpler content within the regulators node within a PMIC. Modify all the Tegra device tree files to take advantage of this. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Thierry Reding <thierry.reding@avionic-design.de>
* ARM: dt: tegra: whistler: configure power offStephen Warren2012-09-191-0/+2
| | | | | | | Add DT property to tell the MAX8907 that it should provide the pm_power_off() implementation. This allows "shutdown" to work. Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: dt: tegra: whistler: add regulatorsStephen Warren2012-09-061-0/+293
| | | | | | | | | | | | | | | Whistler uses a Maxim 8907 regulator. Instantiate this. The voltage settings were derived from the schematic. The only exception is the BBAT voltage; the schematic says 1.2v, but the HW can't go that low, so use the HW default of 2.4v instead. Almost all regulators list all driven supply signal names in their regulator-names property. The exception is nvvdd_sv3, which is in turn named 12 more different names on the schematic, so these were omitted for brevity. Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: dt: tegra: add Whistler device tree fileStephen Warren2012-07-061-0/+301
Whistler is a highly configurable Tegra evaluation and development board. This change adds support for the following specific configuration: E1120 motherboard E1108 CPU board E1116 PMU board The motherboard configuration switches are set as follows: SW1=0 SW2=0 SW3=5 S1/S2/S3/S4 all on, except S3 7/8 are off. Other combinations of daugher boards may work to varying degrees, but will likely require some SW adjustment. Signed-off-by: Stephen Warren <swarren@nvidia.com>
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