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* ARM: dts: sun9i: Add uart4 pinmux setting for A80 SoCChen-Yu Tsai2014-10-311-0/+7
| | | | | | | uart4 only has one possible pinmux setting on the A80 SoC. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: dts: sun9i: Add i2c3 pinmux setting for A80 SoCChen-Yu Tsai2014-10-311-0/+7
| | | | | | | i2c3 has only one possible pinmux setting on the A80 SoC. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: dts: sun9i: Add i2c controller nodes to a80 dtsiChen-Yu Tsai2014-10-311-0/+55
| | | | | | | The A80 has 5 i2c controllers in the main processor block. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: sun9i: optimus: Set UART0 muxingMaxime Ripard2014-10-301-0/+7
| | | | | | | Enable the UART0 muxing, as set up by the bootloader. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
* ARM: sun9i: Enable the A80 pinctrl driverMaxime Ripard2014-10-301-0/+16
| | | | | | | | | | The A80 pinctrl driver is just as usual our pinctrl/gpio/external interrupt controller. Nothing really out of the extraordinary here... Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
* ARM: sunxi: Fix GPLv2 wordingMaxime Ripard2014-10-271-3/+3
| | | | | | | | | During the GPL to GPL/X11 licensing migration, the GPL notice introduced mentionned the device trees as a library, which is not really accurate. It began to spread by copy and paste. Fix all these library mentions to reflect the file that it's actually just a file. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: dts: sun9i: Add basic clocks and reset controlsChen-Yu Tsai2014-10-211-6/+171
| | | | | | | | Now that we have driver support for the basic clocks, add them to the dtsi and update existing peripherals. Also add reset controls to match. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: dts: sunxi: Add Allwinner A80 dtsiChen-Yu Tsai2014-10-201-0/+257
The Allwinner A80 is a new multi-purpose SoC with 4 Cortex-A7 and 4 Cortex-A15 cores in a big.LITTLE architecture, and a 64-core PowerVR G6230 GPU. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Tested-by: Andreas Färber <afaerber@suse.de>
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