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* arm: dts: socfpga: enable watchdog for socfpga platformDinh Nguyen2014-11-201-0/+4
| | | | Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
* ARM: dts: socfpga: memreserve first 4KB for future system useDinh Nguyen2014-09-041-0/+2
| | | | | | | | | | | | This patch adds a /memreserve/ section to reserve the first 4K for future use by the system. One possible use-case is trampoline code used to bring secondary cores online. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: Pavel Machek <pavel@denx.de> --- v3: Update commit message based on Mark Rutland's comment v2: Add a comment in the dts files
* ARM: dts: socfpga: Add SD card detectDinh Nguyen2014-09-041-1/+1
| | | | | | | Revision D of the SOCFGPA devkit has a GPIO line used for SD/MMC card detect. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: Pavel Machek <pavel@denx.de>
* ARM: dts: socfpga: unuse the slot-node and deprecate the supports-highspeed forJaehoon Chung2014-09-041-6/+3
| | | | | | | | | | | | | | | | dw-mmc dw-mmc controller can support multiple slots. But, there are no use-cases anywhere. So we don't need to support the slot-node for dw-mmc controller. And "supports-highspeed" property in dw-mmc is deprecated. "supports-highspeed" property can be replaced with "cap-sd/mmc-highspeed". Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Tushar Behera <trblinux@gmail.com> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Seungwon Jeon <tgih.jun@samsung.com> Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
* ARM: socfpga: dts: Remove hard coded clock-frequency propertyDinh Nguyen2014-05-051-24/+0
| | | | | | | | The timers and uart can get their clock frequencies using the common clock driver. Reviewed-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
* ARM: socfpga: dts: convert to preprocessor includesSteffen Trumtrar2014-05-051-1/+1
| | | | | | | | | Convert all socfpga DT files to the dtc preprocessor include syntax. This allows to include header files in the devicetrees like other SoC-types already do. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
* dts: socfpga: Add support for SD/MMC on the SOCFPGA platformDinh Nguyen2014-03-091-0/+11
| | | | | | | | | | | | | | | | Introduce "altr,socfpga-dw-mshc" to enable Altera's SOCFPGA platform specific implementation of the dw_mmc driver. Also add the "syscon" binding to the "altr,sys-mgr" node. The clock driver can use the syscon driver to toggle the register for the SD/MMC clock phase shift settings. Finally, fix an indentation error for the sysmgr node. Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Acked-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Tested-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Chris Ball <chris@printf.net>
* ARM: socfpga: dts: Move common nodes to cyclone5 dtsiSteffen Trumtrar2013-10-091-0/+65
The current socfpga_cyclone5.dts describes the Altera Cyclone5 SoC Development Kit. The Cyclone5 includes a SoCFPGA, which itself can be included in other SoC+FPGA combinations. Instead of having to describe all Cyclone5 common nodes in every board specific dts, move socfpga_cyclone5.dts to a dtsi and include this in a new dts for the Development Kit. [Dinh Nguyen] - Changed to 115200 for baudrate in dts bootargs Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
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