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* ARM: dts: qcom: Correct IPQ8064 tlmm interruptStephen Boyd2015-01-191-1/+1
| | | | | | | | | | | The interrupt is 16, not 32 (which it would be if we include PPIs in the count of interrupts). Cc: Andy Gross <agross@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Reviewed-by: Andy Gross <agross@codeaurora.org> Tested-by: Andy Gross <agross@codeaurora.org> Signed-off-by: Kumar Gala <galak@codeaurora.org>
* ARM: dts: qcom: Add SATA support on IPQ8064/AP148Kumar Gala2014-10-161-0/+33
| | | | | | | Add SATA PHY and SATA AHCI controller nodes to device tree to enable generic ahci support on the IPQ8064/AP148 board. Signed-off-by: Kumar Gala <galak@codeaurora.org>
* ARM: qcom: Add initial IPQ8064 SoC and AP148 device treesKumar Gala2014-08-211-0/+250
Add basic IPQ8064 SoC include device tree and support for basic booting on the AP148 Reference board with support for UART, I2C, and SPI. Signed-off-by: Kumar Gala <galak@codeaurora.org>
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