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* ARM: berlin: Add AHCI and SATA PHY nodes to BG2Sebastian Hesselbarth2014-11-121-0/+39
| | | | | | | | Add DT nodes for the AHCI controller and SATA PHY found on Marvell Berlin2 SoCs. Acked-by: Antoine Ténart <antoine.tenart@free-electrons.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
* ARM: dts: berlin: Add SDHCI controller nodes to BG2/BG2CDSebastian Hesselbarth2014-10-291-0/+34
| | | | | | | | Marvell Berlin BG2 has three, BG2CD just one pxav3 compatible sdhci controllers, add them to the corresponding DT SoC includes. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
* ARM: dts: berlin: Add BG2 ethernet DT nodesSebastian Hesselbarth2014-10-291-0/+36
| | | | | | | | | Marvell BG2 has two fast ethernet controllers with internal PHY, add the corresponding nodes to SoC dtsi. Tested-by: Antoine Ténart <antoine.tenart@free-electrons.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
* ARM: dts: berlin: add a required reset property in the chip controller nodeAntoine Ténart2014-10-291-0/+1
| | | | | | | | | The chip controller node now also describes the Marvell Berlin reset controller. Add the required 'reset-cells' property. Signed-off-by: Antoine Ténart <antoine.tenart@free-electrons.com> Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
* ARM: dts: berlin: add SMP related nodes and properties for BG2Antoine Ténart2014-06-161-0/+6
| | | | | | | | | Add required nodes and properties into the Berlin BG2 device tree to take advantage of the newly introduced SMP support. Add the scu and cpu-ctrl nodes along with the CPUs enable-method property. Signed-off-by: Antoine Ténart <antoine.tenart@free-electrons.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
* ARM: dts: berlin: add the pinctrl node and muxing setup for uartsAntoine Tenart2014-05-191-0/+26
| | | | | | | | | Add pinctrl bindings and system control nodes to what we currently know about Berlin SoCs. Where available, also set default pinctrl property for uarts, when there is only one pinmux option for it. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
* ARM: dts: berlin: convert BG2 to DT clock nodesSebastian Hesselbarth2014-05-191-33/+23
| | | | | | | | This converts Berlin BG2 SoC dtsi to make use of the new DT clock nodes for Berlin SoCs. While at it, also fix up twdclk which is running at cpuclk/3 instead of sysclk. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
* ARM: dts: berlin: add the BG2 GPIO nodesAntoine Tenart2014-05-191-0/+105
| | | | | | | | The Berlin BG2 has 32 GPIOs in SoC power domain and 16 in the SM one. Only the first 8 SM GPIOs have interrupt support. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
* ARM: dts: berlin: add scu and chipctrl device nodes for BG2/BG2QSebastian Hesselbarth2014-05-191-0/+10
| | | | | | | | | | | | This adds scu and general purpose registers device nodes required for SMP on Berlin BG2 and BG2Q SoCs. The secondary CPUs will pick their jump address from general purpose (SW generic) register 1. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Antoine Tenart <antoine.tenart@free-electrons.com> Acked-by: Jisheng Zhang <jszhang@marvell.com> Tested-by: Antoine Tenart <antoine.tenart@free-electrons.com>
* ARM: add Armada 1500 and Sony NSZ-GS7 device tree filesSebastian Hesselbarth2013-12-131-0/+227
This adds very basic device tree files for the Marvell Armada 1500 SoC (Berlin BG2) and the Sony NSZ-GS7 GoogleTV board. Currently, SoC only has nodes for cpus, some clocks, l2 cache controller, local timer, apb timers, uart, and interrupt controllers. The Sony NSZ-GS7 is a GoogleTV consumer device comprising the Armada 1500 SoC above. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Reviewed-by: Jason Cooper <jason@lakedaemon.net> Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Jisheng Zhang <jszhang@marvell.com>
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