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path: root/arch/arm/boot/dts/at91sam9g20.dtsi
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* ARM: dts: add twi nodes for atmel SoCsLudovic Desroches2012-09-121-0/+4
| | | | | | | | | Add TWI nodes for atmel SoCs but keep i2c-gpio ones in order to let the choice to the user in dts files. Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
* ARM: at91: Add ADC driver to at91sam9260/at91sam9g20 dtsi filesNicolas Ferre2012-05-181-0/+8
| | | | | | | | Now that the bulk of at91sam9g20-related nodes are located in at91sam9260.dtsi, we have to re-create the path to this ADC node for SoC specific parts. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* ARM: at91: add at91sam9260 DT supportJean-Christophe PLAGNIOL-VILLARD2012-04-201-223/+3
| | | | | | | | The at91sam9260 and at91sam9g20 share most of the same IP. So udpate the node property in the at91sam9g20 only. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
* ARM: dts: remove blank interrupt-parent propertiesRob Herring2012-04-141-1/+0
| | | | | | | | | | | | These were incorrectly introduced and can cause problems for of_irq_init. The correct way to define a root controller is no interrupt-parent set at all or the interrupt-parent is set to the root controller itself when inherited from a parent node. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Tested-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Olof Johansson <olof@lixom.net>
* ARM: at91: dt: remove unit-address part for memory nodesLudovic Desroches2012-04-041-1/+1
| | | | | | | | | | | | | Because of the inclusion of skeleton.dtsi, the memory node is named "memory" we where not modifying the already included one but creating a new one. It caused bad memory node detection during early_init_dt_scan_memory() so we modify them. Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: devicetree-discuss@lists.ozlabs.org
* ARM: at91: sam9g20 udc add dt supportJean-Christophe PLAGNIOL-VILLARD2012-03-161-0/+7
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* ARM: at91: dt: enable usb ohci for sam9g20, sam9g45 amd sam9x5Jean-Christophe PLAGNIOL-VILLARD2012-03-161-0/+7
| | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: devicetree-discuss@lists.ozlabs.org
* ARM: at91: add Shutdown Controller (SHDWC) DT supportJean-Christophe PLAGNIOL-VILLARD2012-03-151-0/+5
| | | | | | | | | | | Use a string to specific the wakeup mode to make it more readable. Add the Real-time Clock Wake-up support too for sam9g45 and sam9x5. Add AT91_SHDW_CPTWK0_MAX to specific the Max of the Wakeup Counter. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
* ARM: at91: add ram controller DT supportJean-Christophe PLAGNIOL-VILLARD2012-03-151-0/+5
| | | | | | | | | | | We can now drop the call to ioremap_registers() as we have the binding for the SDRAM/DDR Controller. Drop ioremap_registers() for sam9x5 too. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
* ARM: at91: add RSTC (Reset Controller) dt supportJean-Christophe PLAGNIOL-VILLARD2012-03-151-0/+5
| | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
* ARM: at91: add pmc DT supportJean-Christophe PLAGNIOL-VILLARD2012-03-151-0/+5
| | | | | | | | | Specified the main Oscillator via clock binding. This will allow to do not hardcode it anymore in the DT board at 12MHz. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
* ARM: at91: sam9g20 add i2c DT supportJean-Christophe PLAGNIOL-VILLARD2012-03-151-0/+13
| | | | | | | | | For now on use i2c-gpio driver on the same pin as the hardware IP. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: Rob Herring <rob.herring@calxeda.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
* atmel/nand: add DT supportJean-Christophe PLAGNIOL-VILLARD2012-03-151-0/+16
| | | | | | | | Use a local copy of board informatin and fill with DT data. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
* ARM: at91/tc: add device tree support to atmel_tclibNicolas Ferre2012-03-011-0/+14
| | | | | | | | | | | | | | Device tree support added to atmel_tclib: the generic Timer Counter library. This is used by the clocksource/clockevent driver tcb_clksrc. The current DT enabled platforms are also modified to use it: - .dtsi files are modified to add Timer Counter Block entries - alias are created to allow identification of each block - clkdev lookup tables are added for clocks identification. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Grant Likely <grant.likely@secretlab.ca>
* ARM: at91: pit add DT supportJean-Christophe PLAGNIOL-VILLARD2012-03-011-0/+6
| | | | | | | | | | Retreive registers address and IRQ from device tree entry. Called from at91_dt_init_irq() so that timers are up-n-running when timers initialization will occur. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> [nicolas.ferre@atmel.com: change error path and interrupts property handling] Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
* ARM: at91/gpio: add irqdomain and DT supportNicolas Ferre2012-03-011-0/+30
| | | | | | | | | | Add "legacy" type of irqdomain to preserve old-style numbering and allow smooth transition for both DT and non-DT cases. Original idea and code by Jean-Christophe Plagniol-Villard. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* ARM: at91/aic: add irq domain and device tree supportNicolas Ferre2012-03-011-9/+9
| | | | | | | | | | | | | Add an irqdomain for the AIC interrupt controller. The device tree support is mapping the registers and is using the irq_domain_add_legacy() to manage hwirq translation. The documentation is describing the meaning of the two cells required for using this "interrupt-controller" in a device tree node. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* ARM: at91/net: add macb ethernet controller in 9g45/9g20 DTNicolas Ferre2011-12-161-0/+7
| | | | | | | | Add the Cadence macb ethernet controller in at91sam9g45 and at91sam9g20 .dtsi and enable it in at91sam9m10g45ek and usb_a9g20 board device tree file. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* ARM: at91: add at91sam9g20 and Calao USB A9G20 DT supportJean-Christophe PLAGNIOL-VILLARD2011-10-251-0/+119
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Reviewed-by: Rob Herring <rob.herring@calxeda.com>
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